1 /* 2 * Access various peripherals on a board using the JZ4780. 3 * 4 * Copyright (C) 2023, 2024 Paul Boddie <paul@boddie.org.uk> 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License as 8 * published by the Free Software Foundation; either version 2 of 9 * the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, 19 * Boston, MA 02110-1301, USA 20 */ 21 22 /* NOTE: AIC support should be replaced. The CI20 should be able to send I2S 23 audio over HDMI or via its internal codec to the headphone socket. */ 24 25 #include <l4/devices/aic-x1600.h> 26 27 #include <l4/devices/cpm-jz4780.h> 28 #include <l4/devices/dma-jz4780.h> 29 #include <l4/devices/gpio-jz4780.h> 30 #include <l4/devices/i2c-jz4780.h> 31 #include <l4/devices/msc-jz4780.h> 32 33 /* The X1600 RTC functionality is a subset of that in the JZ4780. */ 34 35 #include <l4/devices/rtc-x1600.h> 36 37 /* GPIO-based SPI can use arbitrary pins, whereas on the CI20 only the secondary 38 header provides pins like GPC. */ 39 40 #include <l4/devices/spi-gpio.h> 41 #include <l4/devices/spi-hybrid.h> 42 #include <l4/devices/spi-jz4780.h> 43 #include <l4/devices/tcu-jz4780.h> 44 #include "common.h" 45 46 47 48 /* AIC adapter functions. */ 49 50 void *aic_init(l4_addr_t aic_start, l4_addr_t start, l4_addr_t end, void *cpm) 51 { 52 return x1600_aic_init(aic_start, start, end, cpm); 53 } 54 55 void *aic_get_channel(void *aic, int num, void *channel) 56 { 57 return x1600_aic_get_channel(aic, num, channel); 58 } 59 60 unsigned int aic_transfer(void *channel, l4re_dma_space_dma_addr_t paddr, 61 uint32_t count, uint32_t sample_rate, 62 uint8_t sample_size) 63 { 64 return x1600_aic_transfer(channel, paddr, count, sample_rate, sample_size); 65 } 66 67 68 69 /* CPM adapter functions. */ 70 71 void *cpm_init(l4_addr_t cpm_base) 72 { 73 return jz4780_cpm_init(cpm_base); 74 } 75 76 const char *cpm_clock_type(void *cpm, enum Clock_identifiers clock) 77 { 78 return jz4780_cpm_clock_type(cpm, clock); 79 } 80 81 int cpm_have_clock(void *cpm, enum Clock_identifiers clock) 82 { 83 return jz4780_cpm_have_clock(cpm, clock); 84 } 85 86 void cpm_start_clock(void *cpm, enum Clock_identifiers clock) 87 { 88 jz4780_cpm_start_clock(cpm, clock); 89 } 90 91 void cpm_stop_clock(void *cpm, enum Clock_identifiers clock) 92 { 93 jz4780_cpm_stop_clock(cpm, clock); 94 } 95 96 int cpm_get_parameters(void *cpm, enum Clock_identifiers clock, 97 uint32_t parameters[]) 98 { 99 return jz4780_cpm_get_parameters(cpm, clock, parameters); 100 } 101 102 int cpm_set_parameters(void *cpm, enum Clock_identifiers clock, 103 int num_parameters, uint32_t parameters[]) 104 { 105 return jz4780_cpm_set_parameters(cpm, clock, num_parameters, parameters); 106 } 107 108 uint8_t cpm_get_source(void *cpm, enum Clock_identifiers clock) 109 { 110 return jz4780_cpm_get_source(cpm, clock); 111 } 112 113 void cpm_set_source(void *cpm, enum Clock_identifiers clock, uint8_t source) 114 { 115 jz4780_cpm_set_source(cpm, clock, source); 116 } 117 118 enum Clock_identifiers cpm_get_source_clock(void *cpm, enum Clock_identifiers clock) 119 { 120 return jz4780_cpm_get_source_clock(cpm, clock); 121 } 122 123 void cpm_set_source_clock(void *cpm, enum Clock_identifiers clock, enum Clock_identifiers source) 124 { 125 jz4780_cpm_set_source_clock(cpm, clock, source); 126 } 127 128 uint64_t cpm_get_source_frequency(void *cpm, enum Clock_identifiers clock) 129 { 130 return jz4780_cpm_get_source_frequency(cpm, clock); 131 } 132 133 uint64_t cpm_get_frequency(void *cpm, enum Clock_identifiers clock) 134 { 135 return jz4780_cpm_get_frequency(cpm, clock); 136 } 137 138 int cpm_set_frequency(void *cpm, enum Clock_identifiers clock, uint64_t frequency) 139 { 140 return jz4780_cpm_set_frequency(cpm, clock, frequency); 141 } 142 143 144 145 /* DMA adapter functions. */ 146 147 void *dma_init(l4_addr_t start, l4_addr_t end, void *cpm) 148 { 149 return jz4780_dma_init(start, end, cpm); 150 } 151 152 void dma_disable(void *dma_chip) 153 { 154 jz4780_dma_disable(dma_chip); 155 } 156 157 void dma_enable(void *dma_chip) 158 { 159 jz4780_dma_enable(dma_chip); 160 } 161 162 void *dma_get_channel(void *dma, uint8_t channel, l4_cap_idx_t irq) 163 { 164 return jz4780_dma_get_channel(dma, channel, irq); 165 } 166 167 unsigned int dma_transfer(void *dma_channel, 168 uint32_t source, uint32_t destination, 169 unsigned int count, 170 int source_increment, int destination_increment, 171 uint8_t source_width, uint8_t destination_width, 172 uint8_t transfer_unit_size, 173 int type) 174 { 175 return jz4780_dma_transfer(dma_channel, source, destination, count, 176 source_increment, destination_increment, 177 source_width, destination_width, 178 transfer_unit_size, type); 179 } 180 181 unsigned int dma_wait(void *dma_channel) 182 { 183 return jz4780_dma_wait(dma_channel); 184 } 185 186 187 188 /* GPIO adapter functions. */ 189 190 void *gpio_init(l4_addr_t start, l4_addr_t end, unsigned pins, 191 l4_uint32_t pull_ups, l4_uint32_t pull_downs) 192 { 193 return jz4780_gpio_init(start, end, pins, pull_ups, pull_downs); 194 } 195 196 void *gpio_init_shadow(l4_addr_t start, l4_addr_t end, unsigned pins, 197 l4_uint32_t pull_ups, l4_uint32_t pull_downs, 198 l4_addr_t shadow_start, l4_addr_t shadow_end, 199 uint8_t port_number) 200 { 201 (void) shadow_start; (void) shadow_end; (void) port_number; 202 return jz4780_gpio_init(start, end, pins, pull_ups, pull_downs); 203 } 204 205 void gpio_setup(void *gpio, unsigned pin, unsigned mode, int value) 206 { 207 jz4780_gpio_setup(gpio, pin, mode, value); 208 } 209 210 void gpio_config_pull(void *gpio, unsigned pin, unsigned mode) 211 { 212 jz4780_gpio_config_pull(gpio, pin, mode); 213 } 214 215 void gpio_config_pad(void *gpio, unsigned pin, unsigned func, unsigned value) 216 { 217 jz4780_gpio_config_pad(gpio, pin, func, value); 218 } 219 220 void gpio_config_get(void *gpio, unsigned pin, unsigned reg, unsigned *value) 221 { 222 jz4780_gpio_config_get(gpio, pin, reg, value); 223 } 224 225 void gpio_config_pad_get(void *gpio, unsigned pin, unsigned *func, unsigned *value) 226 { 227 jz4780_gpio_config_pad_get(gpio, pin, func, value); 228 } 229 230 void gpio_multi_setup(void *gpio, Pin_slice const *mask, unsigned mode, unsigned outvalues) 231 { 232 jz4780_gpio_multi_setup(gpio, mask, mode, outvalues); 233 } 234 235 void gpio_multi_config_pad(void *gpio, Pin_slice const *mask, unsigned func, unsigned value) 236 { 237 jz4780_gpio_multi_config_pad(gpio, mask, func, value); 238 } 239 240 void gpio_multi_set(void *gpio, Pin_slice const *mask, unsigned data) 241 { 242 jz4780_gpio_multi_set(gpio, mask, data); 243 } 244 245 unsigned gpio_multi_get(void *gpio, unsigned offset) 246 { 247 return jz4780_gpio_multi_get(gpio, offset); 248 } 249 250 int gpio_get(void *gpio, unsigned pin) 251 { 252 return jz4780_gpio_get(gpio, pin); 253 } 254 255 void gpio_set(void *gpio, unsigned pin, int value) 256 { 257 jz4780_gpio_set(gpio, pin, value); 258 } 259 260 void *gpio_get_irq(void *gpio, unsigned pin) 261 { 262 return jz4780_gpio_get_irq(gpio, pin); 263 } 264 265 bool gpio_irq_set_mode(void *gpio_irq, unsigned mode) 266 { 267 return jz4780_gpio_irq_set_mode(gpio_irq, mode); 268 } 269 270 271 272 /* I2C adapter functions. */ 273 274 void *i2c_init(l4_addr_t start, l4_addr_t end, void *cpm, 275 uint32_t frequency) 276 { 277 return jz4780_i2c_init(start, end, cpm, frequency); 278 } 279 280 void *i2c_get_channel(void *i2c, uint8_t channel) 281 { 282 return jz4780_i2c_get_channel(i2c, channel); 283 } 284 285 uint32_t i2c_get_frequency(void *i2c_channel) 286 { 287 return jz4780_i2c_get_frequency(i2c_channel); 288 } 289 290 void i2c_set_target(void *i2c_channel, uint8_t addr) 291 { 292 return jz4780_i2c_set_target(i2c_channel, addr); 293 } 294 295 void i2c_start_read(void *i2c_channel, uint8_t buf[], unsigned int total, 296 int stop) 297 { 298 jz4780_i2c_start_read(i2c_channel, buf, total, stop); 299 } 300 301 void i2c_read(void *i2c_channel) 302 { 303 jz4780_i2c_read(i2c_channel); 304 } 305 306 void i2c_start_write(void *i2c_channel, uint8_t buf[], unsigned int total, 307 int stop) 308 { 309 jz4780_i2c_start_write(i2c_channel, buf, total, stop); 310 } 311 312 void i2c_write(void *i2c_channel) 313 { 314 jz4780_i2c_write(i2c_channel); 315 } 316 317 int i2c_read_done(void *i2c_channel) 318 { 319 return jz4780_i2c_read_done(i2c_channel); 320 } 321 322 int i2c_write_done(void *i2c_channel) 323 { 324 return jz4780_i2c_write_done(i2c_channel); 325 } 326 327 unsigned int i2c_have_read(void *i2c_channel) 328 { 329 return jz4780_i2c_have_read(i2c_channel); 330 } 331 332 unsigned int i2c_have_written(void *i2c_channel) 333 { 334 return jz4780_i2c_have_written(i2c_channel); 335 } 336 337 int i2c_failed(void *i2c_channel) 338 { 339 return jz4780_i2c_failed(i2c_channel); 340 } 341 342 void i2c_stop(void *i2c_channel) 343 { 344 jz4780_i2c_stop(i2c_channel); 345 } 346 347 348 349 /* MSC adapter functions. */ 350 351 void *msc_init(l4_addr_t msc_start, l4_addr_t start, l4_addr_t end, void *cpm) 352 { 353 return jz4780_msc_init(msc_start, start, end, cpm); 354 } 355 356 void *msc_get_channel(void *msc, uint8_t channel, l4_cap_idx_t irq, void *dma) 357 { 358 return jz4780_msc_get_channel(msc, channel, irq, dma); 359 } 360 361 struct msc_card *msc_get_cards(void *msc_channel) 362 { 363 return jz4780_msc_get_cards(msc_channel); 364 } 365 366 uint8_t msc_num_cards(void *msc_channel) 367 { 368 return jz4780_msc_num_cards(msc_channel); 369 } 370 371 void msc_enable(void *msc_channel) 372 { 373 jz4780_msc_enable(msc_channel); 374 } 375 376 uint32_t msc_read_blocks(void *msc_channel, uint8_t card, 377 struct dma_region *region, 378 uint32_t block_address, uint32_t block_count) 379 { 380 return jz4780_msc_read_blocks(msc_channel, card, region, block_address, 381 block_count); 382 } 383 384 385 386 /* RTC adapter functions. */ 387 388 void *rtc_init(l4_addr_t start, void *cpm) 389 { 390 /* Ignore the CPM requirement for the JZ4780. */ 391 392 (void) cpm; 393 return x1600_rtc_init(start, NULL); 394 } 395 396 void rtc_disable(void *rtc) 397 { 398 x1600_rtc_disable(rtc); 399 } 400 401 void rtc_enable(void *rtc) 402 { 403 x1600_rtc_enable(rtc); 404 } 405 406 void rtc_alarm_disable(void *rtc) 407 { 408 x1600_rtc_alarm_disable(rtc); 409 } 410 411 void rtc_alarm_enable(void *rtc) 412 { 413 x1600_rtc_alarm_enable(rtc); 414 } 415 416 uint32_t rtc_get_seconds(void *rtc) 417 { 418 return x1600_rtc_get_seconds(rtc); 419 } 420 421 void rtc_set_seconds(void *rtc, uint32_t seconds) 422 { 423 x1600_rtc_set_seconds(rtc, seconds); 424 } 425 426 uint32_t rtc_get_alarm_seconds(void *rtc) 427 { 428 return x1600_rtc_get_alarm_seconds(rtc); 429 } 430 431 void rtc_set_alarm_seconds(void *rtc, uint32_t seconds) 432 { 433 x1600_rtc_set_alarm_seconds(rtc, seconds); 434 } 435 436 void rtc_hibernate(void *rtc) 437 { 438 x1600_rtc_hibernate(rtc); 439 } 440 441 void rtc_power_down(void *rtc) 442 { 443 x1600_rtc_power_down(rtc); 444 } 445 446 void rtc_set_regulator(void *rtc, uint32_t base, uint32_t adjustment) 447 { 448 x1600_rtc_set_regulator(rtc, base, adjustment); 449 } 450 451 452 453 /* SPI adapter functions. */ 454 455 void *spi_init(l4_addr_t spi_start, l4_addr_t start, l4_addr_t end, void *cpm) 456 { 457 return jz4780_spi_init(spi_start, start, end, cpm); 458 } 459 460 void *spi_get_channel(void *spi, uint8_t num, void *channel, uint64_t frequency, 461 void *control_chip, int control_pin, int control_alt_func) 462 { 463 void *ch = jz4780_spi_get_channel(spi, num, channel, frequency); 464 465 return spi_hybrid_get_channel(ch, control_chip, control_pin, control_alt_func); 466 } 467 468 void *spi_get_channel_gpio(uint64_t frequency, 469 void *clock_chip, int clock_pin, 470 void *data_chip, int data_pin, 471 void *enable_chip, int enable_pin, 472 void *control_chip, int control_pin) 473 { 474 void *ch = spi_gpio_get_channel(frequency, clock_chip, clock_pin, data_chip, 475 data_pin, enable_chip, enable_pin, control_chip, 476 control_pin); 477 478 return spi_hybrid_get_channel(ch, control_chip, control_pin, -1); 479 } 480 481 void spi_acquire_control(void *channel, int level) 482 { 483 spi_hybrid_acquire_control(channel, level); 484 } 485 486 void spi_release_control(void *channel) 487 { 488 spi_hybrid_release_control(channel); 489 } 490 491 void spi_send(void *channel, uint32_t bytes, const uint8_t data[]) 492 { 493 spi_hybrid_send(channel, bytes, data); 494 } 495 496 void spi_send_units(void *channel, uint32_t bytes, const uint8_t data[], 497 uint8_t unit_size, uint8_t char_size, int big_endian) 498 { 499 spi_hybrid_send_units(channel, bytes, data, unit_size, char_size, big_endian); 500 } 501 502 uint32_t spi_transfer(void *channel, l4_addr_t vaddr, 503 l4re_dma_space_dma_addr_t paddr, uint32_t count, 504 uint8_t unit_size, uint8_t char_size, 505 l4_addr_t desc_vaddr, l4re_dma_space_dma_addr_t desc_paddr) 506 { 507 return spi_hybrid_transfer_descriptor(channel, vaddr, paddr, count, unit_size, 508 char_size, desc_vaddr, desc_paddr); 509 } 510 511 512 513 /* TCU adapter functions. */ 514 515 void *tcu_init(l4_addr_t start, l4_addr_t end) 516 { 517 return jz4780_tcu_init(start, end); 518 } 519 520 void *tcu_get_channel(void *tcu, uint8_t channel, l4_cap_idx_t irq) 521 { 522 return jz4780_tcu_get_channel(tcu, channel, irq); 523 } 524 525 void tcu_disable(void *tcu_channel) 526 { 527 jz4780_tcu_disable(tcu_channel); 528 } 529 530 void tcu_enable(void *tcu_channel) 531 { 532 jz4780_tcu_enable(tcu_channel); 533 } 534 535 int tcu_is_enabled(void *tcu_channel) 536 { 537 return jz4780_tcu_is_enabled(tcu_channel); 538 } 539 540 uint8_t tcu_get_clock(void *tcu_channel) 541 { 542 return jz4780_tcu_get_clock(tcu_channel); 543 } 544 545 void tcu_set_clock(void *tcu_channel, uint8_t clock) 546 { 547 jz4780_tcu_set_clock(tcu_channel, clock); 548 } 549 550 uint32_t tcu_get_prescale(void *tcu_channel) 551 { 552 return jz4780_tcu_get_prescale(tcu_channel); 553 } 554 555 void tcu_set_prescale(void *tcu_channel, uint32_t prescale) 556 { 557 jz4780_tcu_set_prescale(tcu_channel, prescale); 558 } 559 560 uint32_t tcu_get_counter(void *tcu_channel) 561 { 562 return jz4780_tcu_get_counter(tcu_channel); 563 } 564 565 void tcu_set_counter(void *tcu_channel, uint32_t value) 566 { 567 jz4780_tcu_set_counter(tcu_channel, value); 568 } 569 570 uint8_t tcu_get_count_mode(void *tcu_channel) 571 { 572 return jz4780_tcu_get_count_mode(tcu_channel); 573 } 574 575 void tcu_set_count_mode(void *tcu_channel, uint8_t mode) 576 { 577 jz4780_tcu_set_count_mode(tcu_channel, mode); 578 } 579 580 uint32_t tcu_get_full_data_value(void *tcu_channel) 581 { 582 return jz4780_tcu_get_full_data_value(tcu_channel); 583 } 584 585 void tcu_set_full_data_value(void *tcu_channel, uint32_t value) 586 { 587 jz4780_tcu_set_full_data_value(tcu_channel, value); 588 } 589 590 uint32_t tcu_get_half_data_value(void *tcu_channel) 591 { 592 return jz4780_tcu_get_half_data_value(tcu_channel); 593 } 594 595 void tcu_set_half_data_value(void *tcu_channel, uint32_t value) 596 { 597 jz4780_tcu_set_half_data_value(tcu_channel, value); 598 } 599 600 int tcu_get_full_data_mask(void *tcu_channel) 601 { 602 return jz4780_tcu_get_full_data_mask(tcu_channel); 603 } 604 605 void tcu_set_full_data_mask(void *tcu_channel, int masked) 606 { 607 jz4780_tcu_set_full_data_mask(tcu_channel, masked); 608 } 609 610 int tcu_get_half_data_mask(void *tcu_channel) 611 { 612 return jz4780_tcu_get_half_data_mask(tcu_channel); 613 } 614 615 void tcu_set_half_data_mask(void *tcu_channel, int masked) 616 { 617 jz4780_tcu_set_half_data_mask(tcu_channel, masked); 618 } 619 620 int tcu_have_interrupt(void *tcu_channel) 621 { 622 return jz4780_tcu_have_interrupt(tcu_channel); 623 } 624 625 int tcu_wait_for_irq(void *tcu_channel, uint32_t timeout) 626 { 627 return jz4780_tcu_wait_for_irq(tcu_channel, timeout); 628 } 629 630 631 632 /* Memory regions. */ 633 634 const char *io_memory_regions[] = { 635 [AIC] = "jz4780-aic", 636 [CPM] = "jz4780-cpm", 637 [DMA] = "jz4780-dma", 638 [GPIO] = "jz4780-gpio", 639 [I2C] = "jz4780-i2c", 640 [MSC] = "jz4780-msc", 641 [RTC] = "jz4780-rtc", 642 [SSI] = "jz4780-ssi", 643 [TCU] = "jz4780-tcu", 644 }; 645 646 647 648 /* AIC definitions. */ 649 650 void *aic_channels[] = {NULL, NULL}; 651 652 const unsigned int num_aic_channels = 2; 653 654 l4_cap_idx_t aic_irqs[] = {L4_INVALID_CAP}; 655 656 657 658 /* CPM definitions. */ 659 660 struct clock_info clocks[] = { 661 {"ext", Clock_external, "EXCLK"}, 662 {"ext_512", Clock_external_div_512, "EXCLK/512"}, 663 {"rtc_ext", Clock_rtc_external, "RTCLK"}, 664 {"plla", Clock_pll_A, "PLL A"}, 665 {"plle", Clock_pll_E, "PLL E"}, 666 {"pllm", Clock_pll_M, "PLL M"}, 667 {"pllv", Clock_pll_V, "PLL V"}, 668 {"main", Clock_main, "Main (SCLK_A)"}, 669 {"cpu", Clock_cpu, "CPU"}, 670 {"l2c", Clock_l2cache, "L2 cache"}, 671 {"h2p", Clock_hclock2_pclock, "AHB2/APB"}, 672 {"ahb0", Clock_hclock0, "AHB0"}, 673 {"ahb2", Clock_hclock2, "AHB2"}, 674 {"apb", Clock_pclock, "APB"}, 675 {"dma", Clock_dma, "DMA"}, 676 {"hdmi", Clock_lcd, "HDMI"}, 677 {"lcd", Clock_lcd, "LCD"}, 678 {"lcd0", Clock_lcd_pixel0, "LCD0 pixel"}, 679 {"lcd1", Clock_lcd_pixel1, "LCD1 pixel"}, 680 {"msc", Clock_msc, "MSC"}, 681 {"msc0", Clock_msc0, "MSC0"}, 682 {"msc1", Clock_msc1, "MSC1"}, 683 {"msc2", Clock_msc1, "MSC2"}, 684 {"otg0", Clock_otg0, "USB OTG0"}, 685 {"otg1", Clock_otg1, "USB OTG1"}, 686 {"i2c0", Clock_i2c0, "I2C0"}, 687 {"i2c1", Clock_i2c1, "I2C1"}, 688 {"i2c2", Clock_i2c2, "I2C2"}, 689 {"i2c3", Clock_i2c3, "I2C3"}, 690 {"i2c4", Clock_i2c4, "I2C4"}, 691 {"i2s0", Clock_i2s0, "I2S0"}, 692 {"i2s1", Clock_i2s1, "I2S1"}, 693 {"pcm", Clock_pcm, "PCM"}, 694 {"rtc", Clock_rtc, "RTC"}, 695 {"ssi", Clock_ssi, "SSI"}, 696 {"ssi0", Clock_ssi0, "SSI0"}, 697 {"ssi1", Clock_ssi1, "SSI1"}, 698 {"uart0", Clock_uart0, "UART0"}, 699 {"uart1", Clock_uart1, "UART1"}, 700 {"uart2", Clock_uart2, "UART2"}, 701 {"uart3", Clock_uart3, "UART3"}, 702 {"uart4", Clock_uart4, "UART4"}, 703 {"usbphy", Clock_usb_phy, "USB PHY"}, 704 {NULL, Clock_none, NULL}, 705 }; 706 707 708 709 /* DMA definitions. */ 710 711 void *dma_channels[32] = {NULL}; 712 713 const unsigned int num_dma_channels = 32; 714 715 struct dma_region dma_regions[8]; 716 717 const unsigned int num_dma_regions = 8; 718 719 l4_cap_idx_t dma_irq = L4_INVALID_CAP; 720 721 722 723 /* GPIO definitions. */ 724 725 struct gpio_port gpio_ports[] = { 726 {0x3fff00ff, 0x00000000}, 727 {0xfff0f3fc, 0x000f0c03}, 728 {0x0fffffff, 0x00000000}, 729 {0xffff4fff, 0x0000b000}, 730 {0xf0fff37c, 0x00000483}, 731 {0x7fa7f00f, 0x00580ff0}, 732 }; 733 734 const unsigned int num_gpio_ports = 6; 735 736 const char gpio_port_labels[] = "ABCDEF"; 737 738 739 740 /* I2C definitions. */ 741 742 void *i2c_channels[] = {NULL, NULL, NULL, NULL, NULL}; 743 744 const unsigned int num_i2c_channels = 5; 745 746 l4_cap_idx_t i2c_irqs[] = {L4_INVALID_CAP, L4_INVALID_CAP}; 747 748 749 750 /* MSC definitions. */ 751 752 void *msc_channels[] = {NULL, NULL, NULL}; 753 754 const unsigned int num_msc_channels = 3; 755 756 l4_cap_idx_t msc_irqs[] = {L4_INVALID_CAP, L4_INVALID_CAP, L4_INVALID_CAP}; 757 758 759 760 /* SPI definitions. */ 761 762 void *spi_channels[] = {NULL, NULL}; 763 764 const unsigned int num_spi_channels = 2; 765 766 767 768 /* TCU definitions. */ 769 770 void *tcu_channels[] = {NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL}; 771 772 const unsigned int num_tcu_channels = 8; 773 774 l4_cap_idx_t tcu_irq = L4_INVALID_CAP;