1 /* 2 * GPIO driver for Ingenic JZ4740. 3 * (See below for additional copyright and licensing notices.) 4 * 5 * Copyright (C) 2017, 2018 Paul Boddie <paul@boddie.org.uk> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License as 9 * published by the Free Software Foundation; either version 2 of 10 * the License, or (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, 20 * Boston, MA 02110-1301, USA 21 * 22 * 23 * Subject to other copyrights, being derived from the bcm2835.cc and 24 * omap.cc GPIO driver implementations. 25 * 26 * This file is part of TUD:OS and distributed under the terms of the 27 * GNU General Public License 2. 28 * Please see the COPYING-GPL-2 file for details. 29 */ 30 31 #pragma once 32 33 #include <l4/sys/err.h> 34 #include <l4/sys/types.h> 35 #include <stdint.h> 36 #include "gpio.h" 37 38 39 40 #ifdef __cplusplus 41 42 #include <l4/devices/hw_mmio_register_block.h> 43 44 // GPIO device control. 45 46 class Gpio_jz4740_irq_pin : public Hw::Gpio_irq_pin 47 { 48 unsigned _pin; 49 Hw::Register_block<32> _regs; 50 51 // Convenience method for obtaining the bit corresponding to a pin. 52 53 l4_uint32_t _pin_bit(unsigned pin) 54 { return 1 << (pin & 31); } 55 56 void write_reg_pin(unsigned reg); 57 58 public: 59 Gpio_jz4740_irq_pin(unsigned pin, Hw::Register_block<32> const ®s); 60 61 void do_mask(); 62 void do_unmask(); 63 bool do_set_mode(unsigned mode); 64 int clear(); 65 bool enabled(); 66 }; 67 68 class Gpio_jz4740_chip : public Hw::Gpio_chip 69 { 70 private: 71 Hw::Register_block<32> _regs; 72 73 l4_addr_t _start, _end; 74 unsigned _nr_pins; 75 76 // Convenience method for obtaining the bit corresponding to a pin. 77 78 l4_uint32_t _pin_bit(unsigned pin) 79 { return 1 << (pin & 31); } 80 81 // Convenience method for obtaining the bit position of a pin. 82 83 unsigned _pin_shift(unsigned pin) 84 { return pin % 32; } 85 86 // Permit only "aligned" accesses to registers. 87 88 unsigned _reg_offset_check(unsigned pin_offset) const 89 { 90 switch (pin_offset) 91 { 92 case 0: 93 return 0; 94 95 default: 96 throw -L4_EINVAL; 97 } 98 } 99 100 // General configuration register updates. 101 102 void _config(unsigned bitmap, unsigned mode); 103 104 // General pull-up register updates. 105 106 void _config_pull(unsigned bitmap, unsigned mode); 107 108 // General pad register updates. 109 110 void _config_pad(unsigned bitmap, unsigned func, unsigned value); 111 112 public: 113 Gpio_jz4740_chip(l4_addr_t start, l4_addr_t end, 114 unsigned nr_pins); 115 116 // Obtain the number of pins. 117 118 unsigned nr_pins() const { return _nr_pins; } 119 120 // Unnecessary operations. 121 122 void request(unsigned) {} 123 void free(unsigned) {} 124 125 // Configuration methods. 126 127 void setup(unsigned pin, unsigned mode, int value = 0); 128 void config_pull(unsigned pin, unsigned mode); 129 void config_pad(unsigned pin, unsigned func, unsigned value); 130 void config_get(unsigned pin, unsigned reg, unsigned *value); 131 132 // Multiple pin configuration methods. 133 134 void multi_setup(Pin_slice const &mask, unsigned mode, unsigned outvalues = 0); 135 void multi_config_pull(Pin_slice const &mask, unsigned mode); 136 void multi_config_pad(Pin_slice const &mask, unsigned func, unsigned value = 0); 137 void multi_set(Pin_slice const &mask, unsigned data); 138 unsigned multi_get(unsigned offset); 139 140 // IRQ pin configuration. 141 142 Hw::Gpio_irq_pin *get_irq(unsigned pin); 143 144 // Pin/port data methods. 145 146 int get(unsigned pin); 147 void set(unsigned pin, int value); 148 149 private: 150 void config(unsigned pin, unsigned mode); 151 }; 152 153 #endif /* __cplusplus */ 154 155 156 157 /* C language interface. */ 158 159 EXTERN_C_BEGIN 160 161 void *jz4740_gpio_init(l4_addr_t start, l4_addr_t end, unsigned pins); 162 163 void jz4740_gpio_setup(void *gpio, unsigned pin, unsigned mode, int value); 164 void jz4740_gpio_config_pull(void *gpio, unsigned pin, unsigned mode); 165 void jz4740_gpio_config_pad(void *gpio, unsigned pin, unsigned func, unsigned value); 166 void jz4740_gpio_config_get(void *gpio, unsigned pin, unsigned reg, unsigned *value); 167 168 void jz4740_gpio_multi_setup(void *gpio, Pin_slice const *mask, unsigned mode, unsigned outvalues); 169 void jz4740_gpio_multi_config_pull(void *gpio, Pin_slice const *mask, unsigned mode); 170 void jz4740_gpio_multi_config_pad(void *gpio, Pin_slice const *mask, unsigned func, unsigned value); 171 void jz4740_gpio_multi_set(void *gpio, Pin_slice const *mask, unsigned data); 172 unsigned jz4740_gpio_multi_get(void *gpio, unsigned offset); 173 174 int jz4740_gpio_get(void *gpio, unsigned pin); 175 void jz4740_gpio_set(void *gpio, unsigned pin, int value); 176 177 void *jz4740_gpio_get_irq(void *gpio, unsigned pin); 178 bool jz4740_gpio_irq_set_mode(void *gpio_irq, unsigned mode); 179 180 EXTERN_C_END