1 /* 2 * Access various peripherals on a board using the X1600. 3 * 4 * Copyright (C) 2023, 2024 Paul Boddie <paul@boddie.org.uk> 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License as 8 * published by the Free Software Foundation; either version 2 of 9 * the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, 19 * Boston, MA 02110-1301, USA 20 */ 21 22 #include <l4/devices/aic-x1600.h> 23 #include <l4/devices/cpm-x1600.h> 24 #include <l4/devices/dma-x1600.h> 25 #include <l4/devices/gpio-x1600.h> 26 #include <l4/devices/i2c-x1600.h> 27 #include <l4/devices/msc-x1600.h> 28 #include <l4/devices/rtc-x1600.h> 29 #include <l4/devices/spi-gpio.h> 30 #include <l4/devices/spi-hybrid.h> 31 #include <l4/devices/spi-jz4780.h> 32 #include <l4/devices/tcu-x1600.h> 33 #include "common.h" 34 35 36 37 /* AIC adapter functions. */ 38 39 void *aic_init(l4_addr_t aic_start, l4_addr_t start, l4_addr_t end, void *cpm) 40 { 41 return x1600_aic_init(aic_start, start, end, cpm); 42 } 43 44 void *aic_get_channel(void *aic, int num, void *channel) 45 { 46 return x1600_aic_get_channel(aic, num, channel); 47 } 48 49 unsigned int aic_transfer(void *channel, l4re_dma_space_dma_addr_t paddr, 50 uint32_t count, uint32_t sample_rate, 51 uint8_t sample_size) 52 { 53 return x1600_aic_transfer(channel, paddr, count, sample_rate, sample_size); 54 } 55 56 57 58 /* CPM adapter functions. */ 59 60 void *cpm_init(l4_addr_t cpm_base) 61 { 62 return x1600_cpm_init(cpm_base); 63 } 64 65 const char *cpm_clock_type(void *cpm, enum Clock_identifiers clock) 66 { 67 return x1600_cpm_clock_type(cpm, clock); 68 } 69 70 int cpm_have_clock(void *cpm, enum Clock_identifiers clock) 71 { 72 return x1600_cpm_have_clock(cpm, clock); 73 } 74 75 void cpm_start_clock(void *cpm, enum Clock_identifiers clock) 76 { 77 x1600_cpm_start_clock(cpm, clock); 78 } 79 80 void cpm_stop_clock(void *cpm, enum Clock_identifiers clock) 81 { 82 x1600_cpm_stop_clock(cpm, clock); 83 } 84 85 int cpm_get_parameters(void *cpm, enum Clock_identifiers clock, 86 uint32_t parameters[]) 87 { 88 return x1600_cpm_get_parameters(cpm, clock, parameters); 89 } 90 91 int cpm_set_parameters(void *cpm, enum Clock_identifiers clock, 92 int num_parameters, uint32_t parameters[]) 93 { 94 return x1600_cpm_set_parameters(cpm, clock, num_parameters, parameters); 95 } 96 97 uint8_t cpm_get_source(void *cpm, enum Clock_identifiers clock) 98 { 99 return x1600_cpm_get_source(cpm, clock); 100 } 101 102 void cpm_set_source(void *cpm, enum Clock_identifiers clock, uint8_t source) 103 { 104 x1600_cpm_set_source(cpm, clock, source); 105 } 106 107 enum Clock_identifiers cpm_get_source_clock(void *cpm, enum Clock_identifiers clock) 108 { 109 return x1600_cpm_get_source_clock(cpm, clock); 110 } 111 112 void cpm_set_source_clock(void *cpm, enum Clock_identifiers clock, enum Clock_identifiers source) 113 { 114 x1600_cpm_set_source_clock(cpm, clock, source); 115 } 116 117 uint64_t cpm_get_source_frequency(void *cpm, enum Clock_identifiers clock) 118 { 119 return x1600_cpm_get_source_frequency(cpm, clock); 120 } 121 122 uint64_t cpm_get_frequency(void *cpm, enum Clock_identifiers clock) 123 { 124 return x1600_cpm_get_frequency(cpm, clock); 125 } 126 127 int cpm_set_frequency(void *cpm, enum Clock_identifiers clock, uint64_t frequency) 128 { 129 return x1600_cpm_set_frequency(cpm, clock, frequency); 130 } 131 132 133 134 /* DMA adapter functions. */ 135 136 void *dma_init(l4_addr_t start, l4_addr_t end, void *cpm) 137 { 138 return x1600_dma_init(start, end, cpm); 139 } 140 141 void dma_disable(void *dma_chip) 142 { 143 x1600_dma_disable(dma_chip); 144 } 145 146 void dma_enable(void *dma_chip) 147 { 148 x1600_dma_enable(dma_chip); 149 } 150 151 void *dma_get_channel(void *dma, uint8_t channel, l4_cap_idx_t irq) 152 { 153 return x1600_dma_get_channel(dma, channel, irq); 154 } 155 156 unsigned int dma_transfer(void *dma_channel, 157 uint32_t source, uint32_t destination, 158 unsigned int count, 159 int source_increment, int destination_increment, 160 uint8_t source_width, uint8_t destination_width, 161 uint8_t transfer_unit_size, 162 int type) 163 { 164 return x1600_dma_transfer(dma_channel, source, destination, count, 165 source_increment, destination_increment, 166 source_width, destination_width, 167 transfer_unit_size, type); 168 } 169 170 unsigned int dma_wait(void *dma_channel) 171 { 172 return x1600_dma_wait(dma_channel); 173 } 174 175 176 177 /* GPIO adapter functions. */ 178 179 void *gpio_init(l4_addr_t start, l4_addr_t end, unsigned pins, 180 l4_uint32_t pull_ups, l4_uint32_t pull_downs) 181 { 182 return x1600_gpio_init(start, end, pins, pull_ups, pull_downs); 183 } 184 185 void *gpio_init_shadow(l4_addr_t start, l4_addr_t end, unsigned pins, 186 l4_uint32_t pull_ups, l4_uint32_t pull_downs, 187 l4_addr_t shadow_start, l4_addr_t shadow_end, 188 uint8_t port_number) 189 { 190 return x1600_gpio_init_shadow(start, end, pins, pull_ups, pull_downs, 191 shadow_start, shadow_end, port_number); 192 } 193 194 void gpio_setup(void *gpio, unsigned pin, unsigned mode, int value) 195 { 196 x1600_gpio_setup(gpio, pin, mode, value); 197 } 198 199 void gpio_config_pull(void *gpio, unsigned pin, unsigned mode) 200 { 201 x1600_gpio_config_pull(gpio, pin, mode); 202 } 203 204 void gpio_config_pad(void *gpio, unsigned pin, unsigned func, unsigned value) 205 { 206 x1600_gpio_config_pad(gpio, pin, func, value); 207 } 208 209 void gpio_config_get(void *gpio, unsigned pin, unsigned reg, unsigned *value) 210 { 211 x1600_gpio_config_get(gpio, pin, reg, value); 212 } 213 214 void gpio_config_pad_get(void *gpio, unsigned pin, unsigned *func, unsigned *value) 215 { 216 x1600_gpio_config_pad_get(gpio, pin, func, value); 217 } 218 219 void gpio_multi_setup(void *gpio, Pin_slice const *mask, unsigned mode, unsigned outvalues) 220 { 221 x1600_gpio_multi_setup(gpio, mask, mode, outvalues); 222 } 223 224 void gpio_multi_config_pad(void *gpio, Pin_slice const *mask, unsigned func, unsigned value) 225 { 226 x1600_gpio_multi_config_pad(gpio, mask, func, value); 227 } 228 229 void gpio_multi_set(void *gpio, Pin_slice const *mask, unsigned data) 230 { 231 x1600_gpio_multi_set(gpio, mask, data); 232 } 233 234 unsigned gpio_multi_get(void *gpio, unsigned offset) 235 { 236 return x1600_gpio_multi_get(gpio, offset); 237 } 238 239 int gpio_get(void *gpio, unsigned pin) 240 { 241 return x1600_gpio_get(gpio, pin); 242 } 243 244 void gpio_set(void *gpio, unsigned pin, int value) 245 { 246 x1600_gpio_set(gpio, pin, value); 247 } 248 249 void *gpio_get_irq(void *gpio, unsigned pin) 250 { 251 return x1600_gpio_get_irq(gpio, pin); 252 } 253 254 bool gpio_irq_set_mode(void *gpio_irq, unsigned mode) 255 { 256 return x1600_gpio_irq_set_mode(gpio_irq, mode); 257 } 258 259 260 261 /* I2C adapter functions. */ 262 263 void *i2c_init(l4_addr_t start, l4_addr_t end, void *cpm, 264 uint32_t frequency) 265 { 266 return x1600_i2c_init(start, end, cpm, frequency); 267 } 268 269 void *i2c_get_channel(void *i2c, uint8_t channel) 270 { 271 return x1600_i2c_get_channel(i2c, channel); 272 } 273 274 uint32_t i2c_get_frequency(void *i2c_channel) 275 { 276 return x1600_i2c_get_frequency(i2c_channel); 277 } 278 279 void i2c_set_target(void *i2c_channel, uint8_t addr) 280 { 281 return x1600_i2c_set_target(i2c_channel, addr); 282 } 283 284 void i2c_start_read(void *i2c_channel, uint8_t buf[], unsigned int total, 285 int stop) 286 { 287 x1600_i2c_start_read(i2c_channel, buf, total, stop); 288 } 289 290 void i2c_read(void *i2c_channel) 291 { 292 x1600_i2c_read(i2c_channel); 293 } 294 295 void i2c_start_write(void *i2c_channel, uint8_t buf[], unsigned int total, 296 int stop) 297 { 298 x1600_i2c_start_write(i2c_channel, buf, total, stop); 299 } 300 301 void i2c_write(void *i2c_channel) 302 { 303 x1600_i2c_write(i2c_channel); 304 } 305 306 int i2c_read_done(void *i2c_channel) 307 { 308 return x1600_i2c_read_done(i2c_channel); 309 } 310 311 int i2c_write_done(void *i2c_channel) 312 { 313 return x1600_i2c_write_done(i2c_channel); 314 } 315 316 unsigned int i2c_have_read(void *i2c_channel) 317 { 318 return x1600_i2c_have_read(i2c_channel); 319 } 320 321 unsigned int i2c_have_written(void *i2c_channel) 322 { 323 return x1600_i2c_have_written(i2c_channel); 324 } 325 326 int i2c_failed(void *i2c_channel) 327 { 328 return x1600_i2c_failed(i2c_channel); 329 } 330 331 void i2c_stop(void *i2c_channel) 332 { 333 x1600_i2c_stop(i2c_channel); 334 } 335 336 337 338 /* MSC adapter functions. */ 339 340 void *msc_init(l4_addr_t msc_start, l4_addr_t start, l4_addr_t end, void *cpm) 341 { 342 return x1600_msc_init(msc_start, start, end, cpm); 343 } 344 345 void *msc_get_channel(void *msc, uint8_t channel, l4_cap_idx_t irq, void *dma) 346 { 347 return x1600_msc_get_channel(msc, channel, irq, dma); 348 } 349 350 struct msc_card *msc_get_cards(void *msc_channel) 351 { 352 return x1600_msc_get_cards(msc_channel); 353 } 354 355 uint8_t msc_num_cards(void *msc_channel) 356 { 357 return x1600_msc_num_cards(msc_channel); 358 } 359 360 void msc_enable(void *msc_channel) 361 { 362 return x1600_msc_enable(msc_channel); 363 } 364 365 uint32_t msc_read_blocks(void *msc_channel, uint8_t card, 366 struct dma_region *region, 367 uint32_t block_address, uint32_t block_count) 368 { 369 return x1600_msc_read_blocks(msc_channel, card, region, block_address, 370 block_count); 371 } 372 373 374 375 /* RTC adapter functions. */ 376 377 void *rtc_init(l4_addr_t start, void *cpm) 378 { 379 return x1600_rtc_init(start, cpm); 380 } 381 382 void rtc_disable(void *rtc) 383 { 384 x1600_rtc_disable(rtc); 385 } 386 387 void rtc_enable(void *rtc) 388 { 389 x1600_rtc_enable(rtc); 390 } 391 392 void rtc_alarm_disable(void *rtc) 393 { 394 x1600_rtc_alarm_disable(rtc); 395 } 396 397 void rtc_alarm_enable(void *rtc) 398 { 399 x1600_rtc_alarm_enable(rtc); 400 } 401 402 uint32_t rtc_get_seconds(void *rtc) 403 { 404 return x1600_rtc_get_seconds(rtc); 405 } 406 407 void rtc_set_seconds(void *rtc, uint32_t seconds) 408 { 409 x1600_rtc_set_seconds(rtc, seconds); 410 } 411 412 uint32_t rtc_get_alarm_seconds(void *rtc) 413 { 414 return x1600_rtc_get_alarm_seconds(rtc); 415 } 416 417 void rtc_set_alarm_seconds(void *rtc, uint32_t seconds) 418 { 419 x1600_rtc_set_alarm_seconds(rtc, seconds); 420 } 421 422 void rtc_hibernate(void *rtc) 423 { 424 x1600_rtc_hibernate(rtc); 425 } 426 427 void rtc_power_down(void *rtc) 428 { 429 x1600_rtc_power_down(rtc); 430 } 431 432 void rtc_set_regulator(void *rtc, uint32_t base, uint32_t adjustment) 433 { 434 x1600_rtc_set_regulator(rtc, base, adjustment); 435 } 436 437 438 439 /* SPI adapter functions. */ 440 441 void *spi_init(l4_addr_t spi_start, l4_addr_t start, l4_addr_t end, void *cpm) 442 { 443 return jz4780_spi_init(spi_start, start, end, cpm); 444 } 445 446 void *spi_get_channel(void *spi, uint8_t num, void *channel, uint64_t frequency, 447 void *control_chip, int control_pin, int control_alt_func) 448 { 449 void *ch = jz4780_spi_get_channel(spi, num, channel, frequency); 450 451 return spi_hybrid_get_channel(ch, control_chip, control_pin, control_alt_func); 452 } 453 454 void *spi_get_channel_gpio(uint64_t frequency, 455 void *clock_chip, int clock_pin, 456 void *data_chip, int data_pin, 457 void *enable_chip, int enable_pin, 458 void *control_chip, int control_pin) 459 { 460 void *ch = spi_gpio_get_channel(frequency, clock_chip, clock_pin, data_chip, 461 data_pin, enable_chip, enable_pin, control_chip, 462 control_pin); 463 464 return spi_hybrid_get_channel(ch, control_chip, control_pin, -1); 465 } 466 467 void spi_acquire_control(void *channel, int level) 468 { 469 spi_hybrid_acquire_control(channel, level); 470 } 471 472 void spi_release_control(void *channel) 473 { 474 spi_hybrid_release_control(channel); 475 } 476 477 void spi_send(void *channel, uint32_t bytes, const uint8_t data[]) 478 { 479 spi_hybrid_send(channel, bytes, data); 480 } 481 482 void spi_send_units(void *channel, uint32_t bytes, const uint8_t data[], uint8_t unit_size, 483 uint8_t char_size, int big_endian) 484 { 485 spi_hybrid_send_units(channel, bytes, data, unit_size, char_size, big_endian); 486 } 487 488 uint32_t spi_transfer(void *channel, l4_addr_t vaddr, 489 l4re_dma_space_dma_addr_t paddr, uint32_t count, 490 uint8_t unit_size, uint8_t char_size, 491 l4_addr_t desc_vaddr, l4re_dma_space_dma_addr_t desc_paddr) 492 { 493 return spi_hybrid_transfer_descriptor(channel, vaddr, paddr, count, unit_size, 494 char_size, desc_vaddr, desc_paddr); 495 } 496 497 498 499 /* TCU adapter functions. */ 500 501 void *tcu_init(l4_addr_t start, l4_addr_t end) 502 { 503 return x1600_tcu_init(start, end); 504 } 505 506 void *tcu_get_channel(void *tcu, uint8_t channel, l4_cap_idx_t irq) 507 { 508 return x1600_tcu_get_channel(tcu, channel, irq); 509 } 510 511 void tcu_disable(void *tcu_channel) 512 { 513 x1600_tcu_disable(tcu_channel); 514 } 515 516 void tcu_enable(void *tcu_channel) 517 { 518 x1600_tcu_enable(tcu_channel); 519 } 520 521 int tcu_is_enabled(void *tcu_channel) 522 { 523 return x1600_tcu_is_enabled(tcu_channel); 524 } 525 526 uint8_t tcu_get_clock(void *tcu_channel) 527 { 528 return x1600_tcu_get_clock(tcu_channel); 529 } 530 531 void tcu_set_clock(void *tcu_channel, uint8_t clock) 532 { 533 x1600_tcu_set_clock(tcu_channel, clock); 534 } 535 536 uint32_t tcu_get_prescale(void *tcu_channel) 537 { 538 return x1600_tcu_get_prescale(tcu_channel); 539 } 540 541 void tcu_set_prescale(void *tcu_channel, uint32_t prescale) 542 { 543 x1600_tcu_set_prescale(tcu_channel, prescale); 544 } 545 546 uint32_t tcu_get_counter(void *tcu_channel) 547 { 548 return x1600_tcu_get_counter(tcu_channel); 549 } 550 551 void tcu_set_counter(void *tcu_channel, uint32_t value) 552 { 553 x1600_tcu_set_counter(tcu_channel, value); 554 } 555 556 uint8_t tcu_get_count_mode(void *tcu_channel) 557 { 558 return x1600_tcu_get_count_mode(tcu_channel); 559 } 560 561 void tcu_set_count_mode(void *tcu_channel, uint8_t mode) 562 { 563 x1600_tcu_set_count_mode(tcu_channel, mode); 564 } 565 566 uint32_t tcu_get_full_data_value(void *tcu_channel) 567 { 568 return x1600_tcu_get_full_data_value(tcu_channel); 569 } 570 571 void tcu_set_full_data_value(void *tcu_channel, uint32_t value) 572 { 573 x1600_tcu_set_full_data_value(tcu_channel, value); 574 } 575 576 uint32_t tcu_get_half_data_value(void *tcu_channel) 577 { 578 return x1600_tcu_get_half_data_value(tcu_channel); 579 } 580 581 void tcu_set_half_data_value(void *tcu_channel, uint32_t value) 582 { 583 x1600_tcu_set_half_data_value(tcu_channel, value); 584 } 585 586 int tcu_get_full_data_mask(void *tcu_channel) 587 { 588 return x1600_tcu_get_full_data_mask(tcu_channel); 589 } 590 591 void tcu_set_full_data_mask(void *tcu_channel, int masked) 592 { 593 x1600_tcu_set_full_data_mask(tcu_channel, masked); 594 } 595 596 int tcu_get_half_data_mask(void *tcu_channel) 597 { 598 return x1600_tcu_get_half_data_mask(tcu_channel); 599 } 600 601 void tcu_set_half_data_mask(void *tcu_channel, int masked) 602 { 603 x1600_tcu_set_half_data_mask(tcu_channel, masked); 604 } 605 606 int tcu_have_interrupt(void *tcu_channel) 607 { 608 return x1600_tcu_have_interrupt(tcu_channel); 609 } 610 611 int tcu_wait_for_irq(void *tcu_channel, uint32_t timeout) 612 { 613 return x1600_tcu_wait_for_irq(tcu_channel, timeout); 614 } 615 616 617 618 /* Memory regions. */ 619 620 const char *io_memory_regions[] = { 621 [AIC] = "x1600-aic", 622 [CPM] = "x1600-cpm", 623 [DMA] = "x1600-dma", 624 [GPIO] = "x1600-gpio", 625 [I2C] = "x1600-i2c", 626 [MSC] = "x1600-msc", 627 [RTC] = "x1600-rtc", 628 [SSI] = "x1600-ssi", 629 [TCU] = "x1600-tcu", 630 }; 631 632 633 634 /* AIC definitions. */ 635 636 void *aic_channels[] = {NULL}; 637 638 const unsigned int num_aic_channels = 1; 639 640 l4_cap_idx_t aic_irqs[] = {L4_INVALID_CAP}; 641 642 643 644 /* CPM definitions. */ 645 646 struct clock_info clocks[] = { 647 {"ext", Clock_external, "EXCLK"}, 648 {"ext_512", Clock_external_div_512, "EXCLK/512"}, 649 {"rtc_ext", Clock_rtc_external, "RTCLK"}, 650 {"plla", Clock_pll_A, "PLL A"}, 651 {"plle", Clock_pll_E, "PLL E"}, 652 {"pllm", Clock_pll_M, "PLL M"}, 653 {"main", Clock_main, "Main (SCLK_A)"}, 654 {"cpu", Clock_cpu, "CPU"}, 655 {"l2c", Clock_l2cache, "L2 cache"}, 656 {"ahb0", Clock_hclock0, "AHB0"}, 657 {"ahb2", Clock_hclock2, "AHB2"}, 658 {"apb", Clock_pclock, "APB"}, 659 {"aic", Clock_aic, "AIC"}, 660 {"dma", Clock_dma, "DMA"}, 661 {"lcd0", Clock_lcd_pixel0, "LCD pixel"}, 662 {"msc0", Clock_msc0, "MSC0"}, 663 {"msc1", Clock_msc1, "MSC1"}, 664 {"otg", Clock_otg0, "USB OTG"}, 665 {"i2c0", Clock_i2c0, "I2C0"}, 666 {"i2c1", Clock_i2c1, "I2C1"}, 667 {"i2s0", Clock_i2s0, "I2S0"}, 668 {"i2s1", Clock_i2s1, "I2S1"}, 669 {"i2s0r", Clock_i2s0_rx, "I2S0 RX"}, 670 {"i2s0t", Clock_i2s0_tx, "I2S0 TX"}, 671 {"rtc", Clock_rtc, "RTC"}, 672 {"ssi0", Clock_ssi0, "SSI"}, 673 {"uart0", Clock_uart0, "UART0"}, 674 {"uart1", Clock_uart1, "UART1"}, 675 {"uart2", Clock_uart2, "UART2"}, 676 {"uart3", Clock_uart3, "UART3"}, 677 {"usbphy", Clock_usb_phy, "USB PHY"}, 678 {NULL, Clock_none, NULL}, 679 }; 680 681 682 683 /* DMA definitions. */ 684 685 void *dma_channels[32] = {NULL}; 686 687 const unsigned int num_dma_channels = 32; 688 689 struct dma_region dma_regions[8]; 690 691 const unsigned int num_dma_regions = 8; 692 693 l4_cap_idx_t dma_irq = L4_INVALID_CAP; 694 695 696 697 /* GPIO definitions. */ 698 699 struct gpio_port gpio_ports[] = { 700 {0xffffffff, 0x00000000}, 701 {0xdffbf7bf, 0x00000000}, 702 {0x987e0000, 0x07000007}, 703 {0x0000003f, 0x00000000} 704 }; 705 706 const unsigned int num_gpio_ports = 4; 707 708 const char gpio_port_labels[] = "ABCD"; 709 710 711 712 /* I2C definitions. */ 713 714 void *i2c_channels[] = {NULL, NULL}; 715 716 const unsigned int num_i2c_channels = 2; 717 718 l4_cap_idx_t i2c_irqs[] = {L4_INVALID_CAP, L4_INVALID_CAP}; 719 720 721 722 /* MSC definitions. */ 723 724 void *msc_channels[] = {NULL, NULL}; 725 726 const unsigned int num_msc_channels = 2; 727 728 l4_cap_idx_t msc_irqs[] = {L4_INVALID_CAP, L4_INVALID_CAP}; 729 730 731 732 /* SPI definitions. */ 733 734 void *spi_channels[] = {NULL}; 735 736 const unsigned int num_spi_channels = 1; 737 738 739 740 /* TCU definitions. */ 741 742 void *tcu_channels[] = {NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL}; 743 744 const unsigned int num_tcu_channels = 8; 745 746 l4_cap_idx_t tcu_irq = L4_INVALID_CAP;