# HG changeset patch
# User Paul Boddie <paul@boddie.org.uk>
# Date 1697241205 -7200
# Node ID 4490bc9e507e05a6852cb63a137cf1c07dd2280e
# Parent  2dd556a42ffc29ea9ff2d333ed58bef57c90bf90
Added more diagnostics to try and determine how to get the peripheral to work.

diff -r 2dd556a42ffc -r 4490bc9e507e pkg/devices/lib/i2c/src/x1600.cc
--- a/pkg/devices/lib/i2c/src/x1600.cc	Fri Oct 13 00:49:21 2023 +0200
+++ b/pkg/devices/lib/i2c/src/x1600.cc	Sat Oct 14 01:53:25 2023 +0200
@@ -173,6 +173,12 @@
 : _cpm(cpm), _frequency(frequency)
 {
   _regs = new Hw::Mmio_register_block<32>(start);
+
+  // NOTE: Previously located in set_target.
+
+  disable();
+  set_frequency();
+  enable();
 }
 
 // Enable the channel.
@@ -223,10 +229,14 @@
                                         : (i2c_clk <= 400 ? I2c_speed_fast
                                                           : I2c_speed_high);
 
-  _regs[I2c_control] = _regs[I2c_control] | (speed << I2c_speed_bit) |
-                                            I2c_disable_slave  |
-                                            I2c_enable_restart |
-                                            I2c_enable_master;
+  // NOTE: Permit broader configuration elsewhere.
+
+  _regs[I2c_control] = (speed << I2c_speed_bit) |
+                       I2c_disable_slave  |
+                       I2c_enable_restart |
+                       I2c_enable_master;
+
+  printf("I2c_control = %02x\n", (uint32_t) _regs[I2c_control]);
 
   // According to the programming manual, if the PCLK period is T{I2C_DEV_CLK}
   // then the I2C clock period is...
@@ -383,16 +393,13 @@
 I2c_x1600_channel::set_target(uint8_t address)
 {
   //printf("set_target: %x\n", address);
-  disable();
-  set_frequency();
   _regs[I2c_target_address] = address & I2c_target_7bits;
-  enable();
   init_parameters();
   //printf("I2c_enable_status: %x\n", (uint32_t) _regs[I2c_enable_status]);
   //printf("I2c_status: %x\n", (uint32_t) _regs[I2c_status]);
   //printf("Int_mask: %x\n", (uint32_t) _regs[Int_mask]);
   //printf("Int_status: %x\n", (uint32_t) _regs[Int_status]);
-  printf("Int_raw_status: %x\n", (uint32_t) _regs[Int_raw_status]);
+  //printf("Int_raw_status: %x\n", (uint32_t) _regs[Int_raw_status]);
 }
 
 
@@ -483,7 +490,7 @@
 int
 I2c_x1600_channel::write_done()
 {
-  return _reqpos == _total;
+  return (_reqpos == _total) && !have_output();
 }
 
 unsigned
@@ -612,11 +619,15 @@
   _fail = 0;
   _stop = stop;
 
+  printf("Int_raw_status: %x\n", (uint32_t) _regs[Int_raw_status]);
+  printf("Trans_abort_status: %x\n", (uint32_t) _regs[Trans_abort_status]);
   printf("start_read: %d\n", total);
 
-  _regs[Int_mask] = Int_rx_full  | // read condition (reading needed)
-                    Int_rx_of    | // abort condition
-                    Int_tx_abort;  // abort condition
+  reset_flags();
+
+  _regs[Int_mask] = Int_rx_full | // read condition (reading needed)
+                    Int_rx_of   | // abort condition
+                    Int_tx_abort; // general abort condition
 
   // Perform initial read requests.
 
@@ -630,6 +641,8 @@
   printf("Int_raw_status: %x\n", (uint32_t) _regs[Int_raw_status]);
   printf("Trans_abort_status: %x\n", (uint32_t) _regs[Trans_abort_status]);
 
+  // Test for the general transfer abort condition.
+
   if (read_failed() || write_failed())
   {
     _fail = 1;
@@ -656,8 +669,12 @@
   _fail = 0;
   _stop = stop;
 
+  printf("Int_raw_status: %x\n", (uint32_t) _regs[Int_raw_status]);
+  printf("Trans_abort_status: %x\n", (uint32_t) _regs[Trans_abort_status]);
   printf("start_write: %d\n", total);
 
+  reset_flags();
+
   // Enable interrupts for further writes.
 
   _regs[Int_mask] = Int_tx_empty |  // write condition (writing needed)