# HG changeset patch
# User Paul Boddie <paul@boddie.org.uk>
# Date 1608831888 -3600
# Node ID 783012e3298def8a97c7f2b73dee96185f639a89
# Parent  d0f2d6374b42d37bba07a751d20802fa4cd998b4
Removed debugging statements.

diff -r d0f2d6374b42 -r 783012e3298d pkg/devices/lib/hdmi/src/jz4780.cc
--- a/pkg/devices/lib/hdmi/src/jz4780.cc	Sun Jun 21 19:22:01 2020 +0200
+++ b/pkg/devices/lib/hdmi/src/jz4780.cc	Thu Dec 24 18:44:48 2020 +0100
@@ -53,8 +53,6 @@
 #include <l4/sys/irq.h>
 #include <l4/util/util.h>
 
-#include <cstdio>
-
 /*
 I2C pins:
 
@@ -982,8 +980,6 @@
   while (p->pixelclock && (pixelclock > p->pixelclock))
     p++;
 
-  printf("MPLL for %ld; CURR_CTRL for %ld; PHY for %ld\n", m->pixelclock, c->pixelclock, p->pixelclock);
-
   if (!m->pixelclock || !c->pixelclock || !p->pixelclock)
     return -L4_EINVAL;
 
@@ -1016,8 +1012,6 @@
 
 long Hdmi_jz4780_chip::phy_init()
 {
-  printf("phy_init...\n");
-
   long err;
   int i;
 
@@ -1042,8 +1036,6 @@
 
 void Hdmi_jz4780_chip::phy_power_off()
 {
-  printf("phy_power_off...\n");
-
   if (_phy_def && (_phy_def->gen == 1))
   {
     phy_enable_tmds(false);
@@ -1060,8 +1052,6 @@
 
 void Hdmi_jz4780_chip::phy_power_on()
 {
-  printf("phy_power_on...\n");
-
   if (_phy_def && (_phy_def->gen == 1))
   {
     phy_enable_powerdown(false);
@@ -1123,8 +1113,6 @@
     // An event is handled when detected and when the status differs from
     // the unchanged state.
 
-    printf("Status: %x versus %x\n", status & status_flags, status_unchanged);
-
   } while (!((int_status & int_status_flags) &&
              ((status & status_flags) ^ status_unchanged)));
 
@@ -1215,8 +1203,6 @@
 
 void Hdmi_jz4780_chip::frame_init()
 {
-  printf("frame_init...\n");
-
   // Initialise the video configuration. This is rather like the initialisation
   // of the LCD controller. The sync and data enable polarities are set up, plus
   // extras like HDCP, DVI mode, progressive/interlace.
@@ -1252,8 +1238,6 @@
 
   _regs[Fc_video_config] = config;
 
-  printf("Fc_video_config (%x) = %x\n", Fc_video_config, (uint8_t) _regs[Fc_video_config]);
-
   // Then, the frame characteristics (visible area, sync pulse) are set. Indeed,
   // the frame area details should be practically the same as those used by the
   // LCD controller.
@@ -1289,8 +1273,6 @@
 
 void Hdmi_jz4780_chip::data_path_init()
 {
-  printf("data_path_init...\n");
-
   // Initialise the path of the video data. Here, the elements of the data
   // stream are defined such as the control period duration, data channel
   // characteristics, pixel and TMDS clocks, and the involvement of colour space
@@ -1332,8 +1314,6 @@
 
 void Hdmi_jz4780_chip::packet_init()
 {
-  printf("packet_init...\n");
-
   // Initialise the video packet details.
   // NOTE: With 24bpp RGB output only for now, no pixel repetition.
 
@@ -1365,8 +1345,6 @@
 
 void Hdmi_jz4780_chip::csc_init()
 {
-  printf("csc_init...\n");
-
   // Initialise the colour space conversion details.
   // NOTE: No conversion will be done yet (see data_path_init).
 
@@ -1382,8 +1360,6 @@
 
 void Hdmi_jz4780_chip::sample_init()
 {
-  printf("sample_init...\n");
-
   // Initialise the mapping of video input data.
   // NOTE: With 24bpp RGB input only for now.
 
@@ -1409,8 +1385,6 @@
 
 void Hdmi_jz4780_chip::hdcp_init()
 {
-  printf("hdcp_init...\n");
-
   // Initialise HDCP registers, mostly turning things off.
 
   reg_update(Hdcp_config0, Hdcp_config0_rxdetect_enable, false);