# HG changeset patch # User Paul Boddie # Date 1527628378 -7200 # Node ID 8d44aeecd9c54971afa560f60a5a6c5b72fc8bac # Parent b99553d569c044d36626291f48eff28464c76ced Removed the LCD example for the Ben NanoNote since this is only useful for diagnostic purposes. Updated the copyright information and noted that the Unifont binary is not distributed by default: it is generated by the tools from Unifont sources. diff -r b99553d569c0 -r 8d44aeecd9c5 conf/landfall-examples/mips-qi_lb60-lcd.cfg --- a/conf/landfall-examples/mips-qi_lb60-lcd.cfg Tue May 29 22:26:18 2018 +0200 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,30 +0,0 @@ --- vim: ft=lua ts=2 et sw=2 - --- Test LCD peripheral. The target platform is the Ben NanoNote. - -local L4 = require("L4"); - -local l = L4.default_loader; - -local io_buses = { - devices = l:new_channel(); -- exposes CPM, GPIO, LCD - }; - -l:start({ - caps = { - devices = io_buses.devices:svr(), - icu = L4.Env.icu, - sigma0 = L4.cast(L4.Proto.Factory, L4.Env.sigma0):create(L4.Proto.Sigma0), - }, - log = { "IO", "y" }, - l4re_dbg = L4.Dbg.Warn, - }, - "rom/io -vvvv rom/hw_devices.io rom/mips-qi_lb60-lcd.io"); - -l:start({ - caps = { - icu = L4.Env.icu, - vbus = io_buses.devices, - }, - }, - "rom/ex_qi_lb60_lcd"); diff -r b99553d569c0 -r 8d44aeecd9c5 conf/landfall-examples/mips-qi_lb60-lcd.io --- a/conf/landfall-examples/mips-qi_lb60-lcd.io Tue May 29 22:26:18 2018 +0200 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,12 +0,0 @@ --- vim: ft=lua ts=2 et sw=2 - --- Configuration file for Io. - -local hw = Io.system_bus() - -Io.add_vbus("devices", Io.Vi.System_bus -{ - CPM = wrap(hw:match("jz4740-cpm")); - GPIO = wrap(hw:match("jz4740-gpio")); - LCD = wrap(hw:match("jz4740-lcd")); -}) diff -r b99553d569c0 -r 8d44aeecd9c5 conf/landfall-examples/mips-qi_lb60-lcd.list --- a/conf/landfall-examples/mips-qi_lb60-lcd.list Tue May 29 22:26:18 2018 +0200 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,14 +0,0 @@ - -modaddr 0x1100000 - -entry mips-qi_lb60-lcd-example -bootstrap bootstrap -serial -kernel fiasco -serial_esc -roottask moe rom/mips-qi_lb60-lcd.cfg -module mips-qi_lb60-lcd.cfg -module mips-qi_lb60-lcd.io -module plat-qi_lb60/hw_devices.io -module l4re -module io -module ned -module ex_qi_lb60_lcd diff -r b99553d569c0 -r 8d44aeecd9c5 docs/COPYING.txt --- a/docs/COPYING.txt Tue May 29 22:26:18 2018 +0200 +++ b/docs/COPYING.txt Tue May 29 23:12:58 2018 +0200 @@ -1,8 +1,8 @@ Licence Agreement ----------------- -All original work in this distribution is covered by the following -copyright and licensing information: +All original work in this distribution is covered by the following copyright +and licensing information: Copyright (C) 2015, 2016, 2017, 2018 Paul Boddie @@ -23,22 +23,15 @@ -Other code has been incorporated into this distribution and is -covered by the following copyrights: +Other code has been incorporated into this distribution and is covered by the +following copyrights: pkg/devices/lib/common/include: (c) 2014 Alexander Warg -pkg/landfall-examples/qi_lb60_lcd: - - Copyright (C) 2001 Wolfgang Denk, DENX Software Engineering, wd@denx.de. - Copyright (C) 2005-2007, Ingenic Semiconductor Inc. - Copyright (C) 2009 Qi Hardware Inc. - Copyright (C) Xiangfu Liu - -Note that due to the incorporation of code from L4Re, the following -files are actually licensed under the GPL version 2 only: +Note that due to the incorporation of code from L4Re, the following files are +actually licensed under the GPL version 2 only: pkg/devices/lib/common/include/hw_mmio_register_block.h pkg/devices/lib/common/include/hw_register_block.h @@ -50,13 +43,15 @@ pkg/devices/lib/gpio/src/jz4740.cc pkg/devices/lib/gpio/src/jz4780.cc -No clear copyright statements are provided in the L4Re distribution -for such files. +No clear copyright statements are provided in the L4Re distribution for such +files. -Font definitions and licence (see unifont.tff for bitmap data -derived from GNU Unifont's unifont.hex file): +Font definitions and licence when bitmap data has been generated by the +appropriate tool (see unifont.tff for bitmap data derived from GNU Unifont's +unifont.hex file) and is distributed with this software (which is not the case +by default): Copyright (C) 1998-2003 Roman Czyborra (http://czyborra.com/) diff -r b99553d569c0 -r 8d44aeecd9c5 pkg/landfall-examples/qi_lb60_lcd/Makefile --- a/pkg/landfall-examples/qi_lb60_lcd/Makefile Tue May 29 22:26:18 2018 +0200 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,8 +0,0 @@ -PKGDIR ?= .. -L4DIR ?= $(PKGDIR)/../.. - -TARGET = ex_qi_lb60_lcd -SRC_C = qi_lb60_lcd.c jzlcd.c nanonote_gpm940b0.c memory.c -REQUIRES_LIBS = libio l4re_c-util libdrivers-cpm libdrivers-gpio - -include $(L4DIR)/mk/prog.mk diff -r b99553d569c0 -r 8d44aeecd9c5 pkg/landfall-examples/qi_lb60_lcd/jzlcd.c --- a/pkg/landfall-examples/qi_lb60_lcd/jzlcd.c Tue May 29 22:26:18 2018 +0200 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,565 +0,0 @@ -/* - * jz4740 LCD controller configuration. - * - * Copyright (C) Xiangfu Liu - * Copyright (C) 2015, 2016, 2017, 2018 Paul Boddie - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, - * Boston, MA 02110-1301, USA - */ - -#include "jzlcd.h" -#include "xburst_types.h" /* for REG32 */ -#include /* for l4_cache functions */ - -/* Useful alignment operations. */ - -static inline void align2(uint32_t *n) -{ - *n = (((*n)+1)>>1)<<1; -} - -static inline void align4(uint32_t *n) -{ - *n = (((*n)+3)>>2)<<2; -} - -static inline void align8(uint32_t *n) -{ - *n = (((*n)+7)>>3)<<3; -} - - - -/* Register operations. */ - -static inline uint32_t lcd_ctrl_get(vidinfo_t *vid, uint32_t reg) -{ - return REG32(vid->lcd + reg); -} - -static inline void lcd_ctrl_set(vidinfo_t *vid, uint32_t reg, uint32_t value) -{ - REG32(vid->lcd + reg) = value; -} - - - -/* Configuration operations. */ - -/* Return the number of panels available. */ - -static uint8_t lcd_get_panels(vidinfo_t *vid) -{ - struct jzfb_info *jzfb = vid->jz_fb; - uint32_t mode = jzfb->cfg & MODE_MASK; - - return (mode == MODE_STN_MONO_DUAL) || - (mode == MODE_STN_COLOR_DUAL) ? 2 : 1; -} - -/* Calculate and return the pixel clock frequency. */ - -static uint32_t lcd_get_pixel_clock(vidinfo_t *vid) -{ - struct jzfb_info *jzfb = vid->jz_fb; - uint32_t pclk, width_cycles, mode = jzfb->cfg & MODE_MASK; - - /* - Serial mode: 3 pixel clock cycles per pixel (one per channel). - Parallel mode: 1 pixel clock cycle per pixel. - */ - - if (mode == MODE_8BIT_SERIAL_TFT) - width_cycles = jzfb->w * 3; - else - width_cycles = jzfb->w; - - /* Derive pixel clock from frame clock. */ - - pclk = jzfb->fclk * - (width_cycles + jzfb->hsw + jzfb->elw + jzfb->blw) * - (jzfb->h + jzfb->vsw + jzfb->efw + jzfb->bfw); - - if ((mode == MODE_STN_COLOR_SINGLE) || (mode == MODE_STN_COLOR_DUAL)) - pclk = (pclk * 3); - - if ((mode == MODE_STN_COLOR_SINGLE) || (mode == MODE_STN_COLOR_DUAL) || - (mode == MODE_STN_MONO_SINGLE) || (mode == MODE_STN_MONO_DUAL)) - pclk = pclk >> ((jzfb->cfg & STN_DAT_PINMASK) >> 4); - - if ((mode == MODE_STN_COLOR_DUAL) || (mode == MODE_STN_MONO_DUAL)) - pclk >>= 1; - - return pclk; -} - - - -/* Functions returning region sizes. */ - -static uint32_t lcd_get_line_size(vidinfo_t *vid) -{ - /* Lines must be aligned to a word boundary. */ - - return ALIGN((vid->jz_fb->w * vid->jz_fb->bpp) / 8, sizeof(uint32_t)); -} - -static uint32_t lcd_get_size(vidinfo_t *vid) -{ - return lcd_get_line_size(vid) * vid->jz_fb->h; -} - -static uint32_t lcd_get_aligned_size(vidinfo_t *vid) -{ - /* LCD_CTRL_BST_16 requires 16-word alignment. */ - - return ALIGN(lcd_get_size(vid), 16 * sizeof(uint32_t)); -} - -static uint32_t lcd_get_palette_size(vidinfo_t *vid) -{ - /* Get a collection of two-byte entries, one per colour. */ - - if (vid->jz_fb->bpp < 12) - return (1 << (vid->jz_fb->bpp)) * sizeof(uint16_t); - else - return 0; -} - -static uint32_t lcd_get_aligned_palette_size(vidinfo_t *vid) -{ - /* LCD_CTRL_BST_16 requires 16-word alignment. */ - - return ALIGN(lcd_get_palette_size(vid), 16 * sizeof(uint32_t)); -} - -static uint32_t lcd_get_descriptors_size(vidinfo_t *vid) -{ - return 3 * sizeof(struct jz_fb_dma_descriptor); -} - - - -/* Functions returning addresses of each data region. -The screen parameter permits the retrieval of virtual or physical addresses. */ - -static uint32_t lcd_get_palette(vidinfo_t *vid, uint32_t screen) -{ - /* Use memory at the end of the allocated region for the palette. */ - - return screen + jz4740_lcd_get_screen_size(vid) - lcd_get_aligned_palette_size(vid); -} - -static uint32_t lcd_get_framebuffer(uint8_t panel, vidinfo_t *vid, uint32_t screen) -{ - /* Framebuffers for panels are allocated at the start of the region. */ - - return screen + (panel * lcd_get_aligned_size(vid)); -} - - - -/* Initialisation functions. */ - -static uint32_t jz_lcd_stn_init(uint32_t stnH, vidinfo_t *vid) -{ - struct jzfb_info *jzfb = vid->jz_fb; - uint32_t val = 0; - - switch (jzfb->bpp) { - case 1: - /* val |= LCD_CTRL_PEDN; */ - case 2: - val |= LCD_CTRL_FRC_2; - break; - - case 4: - val |= LCD_CTRL_FRC_4; - break; - - case 8: - default: - val |= LCD_CTRL_FRC_16; - break; - } - - switch (jzfb->cfg & STN_DAT_PINMASK) { - case STN_DAT_PIN1: - /* Do not adjust the hori-param value. */ - break; - - case STN_DAT_PIN2: - align2(&jzfb->hsw); - align2(&jzfb->elw); - align2(&jzfb->blw); - break; - - case STN_DAT_PIN4: - align4(&jzfb->hsw); - align4(&jzfb->elw); - align4(&jzfb->blw); - break; - - case STN_DAT_PIN8: - align8(&jzfb->hsw); - align8(&jzfb->elw); - align8(&jzfb->blw); - break; - } - - lcd_ctrl_set(vid, LCD_VSYNC, jzfb->vsw); - lcd_ctrl_set(vid, LCD_HSYNC, ((jzfb->blw + jzfb->w) << 16) | (jzfb->blw + jzfb->w + jzfb->hsw)); - - /* Screen setting */ - lcd_ctrl_set(vid, LCD_VAT, ((jzfb->blw + jzfb->w + jzfb->hsw + jzfb->elw) << 16) | (stnH + jzfb->vsw + jzfb->bfw + jzfb->efw)); - lcd_ctrl_set(vid, LCD_DAH, (jzfb->blw << 16) | (jzfb->blw + jzfb->w)); - lcd_ctrl_set(vid, LCD_DAV, stnH); - - /* AC BIAs signal */ - lcd_ctrl_set(vid, LCD_PS, stnH+jzfb->vsw+jzfb->efw+jzfb->bfw); - - return val; -} - -static void jz_lcd_tft_init(vidinfo_t *vid) -{ - struct jzfb_info *jzfb = vid->jz_fb; - - lcd_ctrl_set(vid, LCD_VSYNC, jzfb->vsw); - lcd_ctrl_set(vid, LCD_HSYNC, jzfb->hsw); - lcd_ctrl_set(vid, LCD_DAV, ((jzfb->vsw + jzfb->bfw) << 16) | (jzfb->vsw + jzfb->bfw + jzfb->h)); - lcd_ctrl_set(vid, LCD_DAH, ((jzfb->hsw + jzfb->blw) << 16) | (jzfb->hsw + jzfb->blw + jzfb->w)); - lcd_ctrl_set(vid, LCD_VAT, (((jzfb->blw + jzfb->w + jzfb->elw + jzfb->hsw)) << 16) | - (jzfb->vsw + jzfb->bfw + jzfb->h + jzfb->efw)); -} - -static void jz_lcd_samsung_init(vidinfo_t *vid) -{ - struct jzfb_info *jzfb = vid->jz_fb; - uint32_t pclk = lcd_get_pixel_clock(vid); - uint32_t total, tp_s, tp_e, ckv_s, ckv_e; - uint32_t rev_s, rev_e, inv_s, inv_e; - - jz_lcd_tft_init(vid); - - total = jzfb->blw + jzfb->w + jzfb->elw + jzfb->hsw; - tp_s = jzfb->blw + jzfb->w + 1; - tp_e = tp_s + 1; - /* ckv_s = tp_s - jz_clocks.pixclk/(1000000000/4100); */ - ckv_s = tp_s - pclk/(1000000000/4100); - ckv_e = tp_s + total; - rev_s = tp_s - 11; /* -11.5 clk */ - rev_e = rev_s + total; - inv_s = tp_s; - inv_e = inv_s + total; - lcd_ctrl_set(vid, LCD_CLS, (tp_s << 16) | tp_e); - lcd_ctrl_set(vid, LCD_PS, (ckv_s << 16) | ckv_e); - lcd_ctrl_set(vid, LCD_SPL, (rev_s << 16) | rev_e); - lcd_ctrl_set(vid, LCD_REV, (inv_s << 16) | inv_e); - jzfb->cfg |= STFT_REVHI | STFT_SPLHI; -} - -static void jz_lcd_sharp_init(vidinfo_t *vid) -{ - struct jzfb_info *jzfb = vid->jz_fb; - uint32_t total, cls_s, cls_e, ps_s, ps_e; - uint32_t spl_s, spl_e, rev_s, rev_e; - - jz_lcd_tft_init(vid); - - total = jzfb->blw + jzfb->w + jzfb->elw + jzfb->hsw; - spl_s = 1; - spl_e = spl_s + 1; - cls_s = 0; - cls_e = total - 60; /* > 4us (pclk = 80ns) */ - ps_s = cls_s; - ps_e = cls_e; - rev_s = total - 40; /* > 3us (pclk = 80ns) */ - rev_e = rev_s + total; - jzfb->cfg |= STFT_PSHI; - lcd_ctrl_set(vid, LCD_SPL, (spl_s << 16) | spl_e); - lcd_ctrl_set(vid, LCD_CLS, (cls_s << 16) | cls_e); - lcd_ctrl_set(vid, LCD_PS, (ps_s << 16) | ps_e); - lcd_ctrl_set(vid, LCD_REV, (rev_s << 16) | rev_e); -} - - - -/* Palette initialisation. */ - -static inline uint16_t rgb8_to_rgb16(uint8_t rgb) -{ - return ((((rgb & 0xe0) >> 5) * 4) << 11) | ((((rgb & 0x1c) >> 2) * 9) << 6) | ((rgb & 0x03) * 10); -} - -static inline uint16_t rgb4_to_rgb16(uint8_t rgb) -{ - return ((((rgb & 8) >> 3) * 0x1f) << 11) | ((((rgb & 6) >> 1) * 0x15) << 5) | ((rgb & 1) * 0x1f); -} - -static void lcd_init_palette(vidinfo_t *vid, uint32_t palette) -{ - uint16_t *entry = (uint16_t *) palette; - uint16_t *end = entry + (1 << (vid->jz_fb->bpp)); - uint8_t value = 0; - - while (entry < end) - { - switch (vid->jz_fb->bpp) - { - case 4: - *entry = rgb4_to_rgb16(value); - break; - - case 8: - default: - *entry = rgb8_to_rgb16(value); - break; - } - - value++; - entry++; - } -} - - - -/* Public functions. */ - -uint32_t jz4740_lcd_get_aligned_size(vidinfo_t *vid) -{ - return lcd_get_aligned_size(vid); -} - -uint32_t jz4740_lcd_get_descriptors_size(vidinfo_t *vid) -{ - return lcd_get_descriptors_size(vid); -} - -uint32_t jz4740_lcd_get_line_size(vidinfo_t *vid) -{ - return lcd_get_line_size(vid); -} - -/* Return the total size of the required memory. */ - -uint32_t jz4740_lcd_get_screen_size(vidinfo_t *vid) -{ - return lcd_get_aligned_size(vid) * lcd_get_panels(vid) + - lcd_get_aligned_palette_size(vid); -} - -/* Return the calculated pixel clock frequency for the display. */ - -uint32_t jz4740_lcd_get_pixel_clock(vidinfo_t *vid) -{ - return lcd_get_pixel_clock(vid); -} - -/* Set the LCD controller address. */ - -void jz4740_lcd_set_base(vidinfo_t *vid, void *lcd_base) -{ - vid->lcd = lcd_base; -} - -/* Initialise the LCD controller with the memory, panel and framebuffer details. */ - -void jz4740_lcd_ctrl_init( - struct jz_fb_dma_descriptor *desc_vaddr, - struct jz_fb_dma_descriptor *desc_paddr, - void *fb_vaddr, void *fb_paddr, - vidinfo_t *vid) -{ - struct jz_fb_dma_descriptor *first, *second = 0; - - /* Initialise a palette for lower colour depths. */ - - if (vid->jz_fb->bpp < 12) - lcd_init_palette(vid, lcd_get_palette(vid, (uint32_t) fb_vaddr)); - - /* Populate descriptors. */ - - /* Provide the first framebuffer descriptor in single and dual modes. */ - - desc_vaddr[0].fsadr = lcd_get_framebuffer(0, vid, (uint32_t) fb_paddr); - desc_vaddr[0].fidr = 0; - desc_vaddr[0].ldcmd = lcd_get_size(vid) / 4; /* length in words */ - - /* Provide the second framebuffer descriptor only in dual-panel mode. */ - - if (lcd_get_panels(vid) == 2) - { - desc_vaddr[1].fdadr = desc_paddr + 1; - desc_vaddr[1].fsadr = lcd_get_framebuffer(1, vid, (uint32_t) fb_paddr); - desc_vaddr[1].fidr = 0; - desc_vaddr[1].ldcmd = lcd_get_size(vid) / 4; - - /* Note the address to be provided for the second channel. */ - - second = desc_paddr + 1; - } - - /* Initialise palette descriptor details if a palette is to be used. */ - - /* Assume any mode with <12 bpp is palette driven. */ - - if (vid->jz_fb->bpp < 12) - { - desc_vaddr[2].fsadr = lcd_get_palette(vid, (uint32_t) fb_paddr); - desc_vaddr[2].fidr = 0; - desc_vaddr[2].ldcmd = (lcd_get_palette_size(vid) / 4) | LCD_CMD_PAL; - - /* Flip back and forth between the palette and framebuffer. */ - - desc_vaddr[2].fdadr = desc_paddr; - desc_vaddr[0].fdadr = desc_paddr + 2; - - /* Provide the palette descriptor address first. */ - - first = desc_paddr + 2; - } - else - { - /* No palette: always use the framebuffer descriptor. */ - - desc_vaddr[0].fdadr = desc_paddr; - first = desc_paddr; - } - - /* Flush cached structure data. */ - - l4_cache_clean_data((unsigned long) desc_vaddr, - (unsigned long) desc_vaddr + lcd_get_descriptors_size(vid)); - - /* Configure DMA by setting frame descriptor addresses. */ - - lcd_ctrl_set(vid, LCD_DA0, (uint32_t) first); - - if (lcd_get_panels(vid) == 2) - lcd_ctrl_set(vid, LCD_DA1, (uint32_t) second); -} - -/* Initialise the LCD registers. */ - -void jz4740_lcd_hw_init(vidinfo_t *vid) -{ - struct jzfb_info *jzfb = vid->jz_fb; - uint32_t mode = vid->jz_fb->cfg & MODE_MASK; - uint32_t val = 0; - - /* Compute control register flags. */ - - switch (jzfb->bpp) { - case 1: - val |= LCD_CTRL_BPP_1; - break; - - case 2: - val |= LCD_CTRL_BPP_2; - break; - - case 4: - val |= LCD_CTRL_BPP_4; - break; - - case 8: - val |= LCD_CTRL_BPP_8; - break; - - case 15: - val |= LCD_CTRL_RGB555; - case 16: - val |= LCD_CTRL_BPP_16; - break; - - case 17 ... 32: - val |= LCD_CTRL_BPP_18_24; /* target is 4bytes/pixel */ - break; - - default: - val |= LCD_CTRL_BPP_16; /* default to 16bpp */ - break; - } - - /* Set various configuration registers for the panel. */ - - switch (mode) { - case MODE_STN_MONO_DUAL: - case MODE_STN_COLOR_DUAL: - val |= jz_lcd_stn_init(jzfb->h >> 1, vid); - break; - - case MODE_STN_MONO_SINGLE: - case MODE_STN_COLOR_SINGLE: - val |= jz_lcd_stn_init(jzfb->h, vid); - break; - - case MODE_TFT_GEN: - case MODE_TFT_CASIO: - case MODE_8BIT_SERIAL_TFT: - case MODE_TFT_18BIT: - jz_lcd_tft_init(vid); - break; - - case MODE_TFT_SAMSUNG: - jz_lcd_samsung_init(vid); - break; - - case MODE_TFT_SHARP: - jz_lcd_sharp_init(vid); - break; - - default: - break; - } - - /* Further control register and panel configuration. */ - - val |= LCD_CTRL_BST_16; /* Burst Length is 16WORD=64Byte */ - val |= LCD_CTRL_OFUP; /* OutFIFO underrun protect */ - - lcd_ctrl_set(vid, LCD_CTRL, val); - lcd_ctrl_set(vid, LCD_CFG, jzfb->cfg); -} - -/* Set the colour depth. */ - -void jz4740_lcd_set_bpp(uint8_t bpp, vidinfo_t *vid) -{ - vid->jz_fb->bpp = bpp; -} - -void jz4740_lcd_enable(vidinfo_t *vid) -{ - /* Clear the disable bit (DIS) and set the enable bit (ENA). */ - - lcd_ctrl_set(vid, LCD_CTRL, (lcd_ctrl_get(vid, LCD_CTRL) & ~LCD_CTRL_DIS) | LCD_CTRL_ENA); -} - -void jz4740_lcd_disable(vidinfo_t *vid) -{ - /* Set the disable bit (DIS). */ - - lcd_ctrl_set(vid, LCD_CTRL, lcd_ctrl_get(vid, LCD_CTRL) | LCD_CTRL_DIS); -} - -void jz4740_lcd_quick_disable(vidinfo_t *vid) -{ - /* Clear the enable bit (ENA) for quick disable. */ - - lcd_ctrl_set(vid, LCD_CTRL, lcd_ctrl_get(vid, LCD_CTRL) & ~LCD_CTRL_ENA); -} diff -r b99553d569c0 -r 8d44aeecd9c5 pkg/landfall-examples/qi_lb60_lcd/jzlcd.h --- a/pkg/landfall-examples/qi_lb60_lcd/jzlcd.h Tue May 29 22:26:18 2018 +0200 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,236 +0,0 @@ -/* - * U-Boot and jz4740 LCD controller definitions. - * - * Copyright (C) 2001 Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * Copyright (C) 2005-2007, Ingenic Semiconductor Inc. - * Copyright (C) 2009 Qi Hardware Inc. - * Author: Xiangfu Liu - * Copyright (C) Xiangfu Liu - * Copyright (C) 2015, 2016, 2017, 2018 Paul Boddie - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, - * Boston, MA 02110-1301, USA - */ - -#ifndef __JZLCD_H__ -#define __JZLCD_H__ - -#include - -/* Framebuffer characteristics. */ - -struct jzfb_info { - uint32_t cfg; /* panel mode and pin usage etc. */ - uint32_t w; /* display width in pixels */ - uint32_t h; /* display height in pixels */ - uint32_t bpp; /* bits per pixel */ - uint32_t fclk; /* frame clock */ - uint32_t hsw; /* hsync width, in pixel clock */ - uint32_t vsw; /* vsync width, in line count */ - uint32_t elw; /* end of line, in pixel clock */ - uint32_t blw; /* begin of line, in pixel clock */ - uint32_t efw; /* end of frame, in line count */ - uint32_t bfw; /* begin of frame, in line count */ -}; - -/* LCD controller stucture for jz4740. */ - -struct jz_fb_dma_descriptor { - struct jz_fb_dma_descriptor *fdadr; /* frame descriptor address register */ - uint32_t fsadr; /* frame source address register */ - uint32_t fidr; /* frame identifier register */ - uint32_t ldcmd; /* command register */ -}; - -/* Display characteristics and memory resources. */ - -typedef struct vidinfo { - struct jzfb_info *jz_fb; /* framebuffer and panel properties */ - void *lcd; /* address of LCD controller registers */ -} vidinfo_t; - - - -/* Public functions. */ - -uint32_t jz4740_lcd_get_aligned_size(vidinfo_t *vid); -uint32_t jz4740_lcd_get_descriptors_size(vidinfo_t *vid); -uint32_t jz4740_lcd_get_line_size(vidinfo_t *vid); -uint32_t jz4740_lcd_get_screen_size(vidinfo_t *vid); -uint32_t jz4740_lcd_get_pixel_clock(vidinfo_t *vid); - -void jz4740_lcd_set_base(vidinfo_t *vid, void *lcd_base); - -void jz4740_lcd_ctrl_init( - struct jz_fb_dma_descriptor *desc_vaddr, - struct jz_fb_dma_descriptor *desc_paddr, - void *fb_vaddr, void *fb_paddr, - vidinfo_t *vid); - -void jz4740_lcd_hw_init(vidinfo_t *vid); -void jz4740_lcd_set_bpp(uint8_t bpp, vidinfo_t *vid); -void jz4740_lcd_enable(vidinfo_t *vid); -void jz4740_lcd_disable(vidinfo_t *vid); -void jz4740_lcd_quick_disable(vidinfo_t *vid); - - - -/* Alignment/rounding macros. */ - -#define ALIGN(x,a) __ALIGN_MASK((x),(typeof(x))(a)-1) -#define __ALIGN_MASK(x,mask) (((x)+(mask))&~(mask)) - -/* Display device mode select (LCD_CFG.MODE). */ - -#define MODE_MASK 0x0f -#define MODE_TFT_GEN 0x00 -#define MODE_TFT_SHARP 0x01 -#define MODE_TFT_CASIO 0x02 -#define MODE_TFT_SAMSUNG 0x03 -#define MODE_CCIR656_NONINT 0x04 -#define MODE_CCIR656_INT 0x05 -#define MODE_STN_COLOR_SINGLE 0x08 -#define MODE_STN_MONO_SINGLE 0x09 -#define MODE_STN_COLOR_DUAL 0x0a -#define MODE_STN_MONO_DUAL 0x0b -#define MODE_8BIT_SERIAL_TFT 0x0c - -/* 16-bit or 18-bit TFT panel selection (LCD_CFG.18/16). */ - -#define MODE_TFT_18BIT (1<<7) - -/* STN pin utilisation (LCD_CFG.PDW). */ - -#define STN_DAT_PIN1 (0x00 << 4) -#define STN_DAT_PIN2 (0x01 << 4) -#define STN_DAT_PIN4 (0x02 << 4) -#define STN_DAT_PIN8 (0x03 << 4) -#define STN_DAT_PINMASK STN_DAT_PIN8 - -/* Pin reset states (LCD_CFG). */ - -#define STFT_PSHI (1 << 15) -#define STFT_CLSHI (1 << 14) -#define STFT_SPLHI (1 << 13) -#define STFT_REVHI (1 << 12) - -/* Sync direction (LCD_CFG.SYNDIR). */ - -#define SYNC_MASTER (0 << 16) -#define SYNC_SLAVE (1 << 16) - -/* Data enable polarity (LCD_CFG.DEP). */ - -#define DE_P (0 << 9) -#define DE_N (1 << 9) - -/* Pixel clock polarity (LCD_CFG.PCP). */ - -#define PCLK_P (0 << 10) -#define PCLK_N (1 << 10) - -/* Horizontal sync polarity (LCD_CFG.HSP). */ - -#define HSYNC_P (0 << 11) -#define HSYNC_N (1 << 11) - -/* Vertical sync polarity (LCD_CFG.VSP). */ - -#define VSYNC_P (0 << 8) -#define VSYNC_N (1 << 8) - -/* Inverse output data (LCD_CFG.INVDAT). */ - -#define DATA_NORMAL (0 << 17) -#define DATA_INVERSE (1 << 17) - -/* Register offsets. */ - -#define LCD_CFG 0x00 /* LCD Configure Register */ -#define LCD_VSYNC 0x04 /* Vertical Synchronize Register */ -#define LCD_HSYNC 0x08 /* Horizontal Synchronize Register */ -#define LCD_VAT 0x0c /* Virtual Area Setting Register */ -#define LCD_DAH 0x10 /* Display Area Horizontal Start/End Point */ -#define LCD_DAV 0x14 /* Display Area Vertical Start/End Point */ -#define LCD_PS 0x18 /* PS Signal Setting */ -#define LCD_CLS 0x1c /* CLS Signal Setting */ -#define LCD_SPL 0x20 /* SPL Signal Setting */ -#define LCD_REV 0x24 /* REV Signal Setting */ -#define LCD_CTRL 0x30 /* LCD Control Register */ -#define LCD_STATE 0x34 /* LCD Status Register */ -#define LCD_IID 0x38 /* Interrupt ID Register */ -#define LCD_DA0 0x40 /* Descriptor Address Register 0 */ -#define LCD_SA0 0x44 /* Source Address Register 0 */ -#define LCD_FID0 0x48 /* Frame ID Register 0 */ -#define LCD_CMD0 0x4c /* DMA Command Register 0 */ -#define LCD_DA1 0x50 /* Descriptor Address Register 1 */ -#define LCD_SA1 0x54 /* Source Address Register 1 */ -#define LCD_FID1 0x58 /* Frame ID Register 1 */ -#define LCD_CMD1 0x5c /* DMA Command Register 1 */ - -/* Burst length selection (LCD_CTRL.BST). */ - -#define LCD_CTRL_BST_MASK (0x03 << 28) -#define LCD_CTRL_BST_4 (0 << 28) /* 4-word */ -#define LCD_CTRL_BST_8 (1 << 28) /* 8-word */ -#define LCD_CTRL_BST_16 (2 << 28) /* 16-word */ - -/* RGB mode (LCD_CTRL.RGB). */ - -#define LCD_CTRL_RGB565 (0 << 27) /* RGB565 mode */ -#define LCD_CTRL_RGB555 (1 << 27) /* RGB555 mode */ - -/* Output FIFO underrun protection (LCD_CTRL.OFUP). */ - -#define LCD_CTRL_OFUP (1 << 26) /* Output FIFO underrun protection enable */ - -/* STN FRC algorithm selection (LCD_CTRL.FRC). */ - -#define LCD_CTRL_FRC_16 (0 << 24) /* 16 grayscale */ -#define LCD_CTRL_FRC_4 (1 << 24) /* 4 grayscale */ -#define LCD_CTRL_FRC_2 (2 << 24) /* 2 grayscale */ -#define LCD_CTRL_FRC_MASK (0x03 << 24) - -/* Load palette delay counter (LCD_CTRL.PDD) */ - -#define LCD_CTRL_PDD_MASK (0xff << 16) - -#define LCD_CTRL_EOFM (1 << 13) /* EOF interrupt mask */ -#define LCD_CTRL_SOFM (1 << 12) /* SOF interrupt mask */ -#define LCD_CTRL_OFUM (1 << 11) /* Output FIFO underrun interrupt mask */ -#define LCD_CTRL_IFUM0 (1 << 10) /* Input FIFO 0 underrun interrupt mask */ -#define LCD_CTRL_IFUM1 (1 << 9) /* Input FIFO 1 underrun interrupt mask */ -#define LCD_CTRL_LDDM (1 << 8) /* LCD disable done interrupt mask */ -#define LCD_CTRL_QDM (1 << 7) /* LCD quick disable done interrupt mask */ -#define LCD_CTRL_BEDN (1 << 6) /* Endian selection */ -#define LCD_CTRL_PEDN (1 << 5) /* Endian in byte:0-msb first, 1-lsb first */ -#define LCD_CTRL_DIS (1 << 4) /* Disable indicate bit */ -#define LCD_CTRL_ENA (1 << 3) /* LCD enable bit */ - -/* Bits per pixel (LCD_CTRL.BPP). */ - -#define LCD_CTRL_BPP_1 0 /* 1 bpp */ -#define LCD_CTRL_BPP_2 1 /* 2 bpp */ -#define LCD_CTRL_BPP_4 2 /* 4 bpp */ -#define LCD_CTRL_BPP_8 3 /* 8 bpp */ -#define LCD_CTRL_BPP_16 4 /* 15/16 bpp */ -#define LCD_CTRL_BPP_18_24 5 /* 18/24/32 bpp */ -#define LCD_CTRL_BPP_MASK 0x07 - -/* Palette buffer (LCD_CMDx.PAL). */ - -#define LCD_CMD_PAL (1 << 28) - -#endif /* __JZLCD_H__ */ diff -r b99553d569c0 -r 8d44aeecd9c5 pkg/landfall-examples/qi_lb60_lcd/memory.c --- a/pkg/landfall-examples/qi_lb60_lcd/memory.c Tue May 29 22:26:18 2018 +0200 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,78 +0,0 @@ -/* - * Memory allocation utility functions. - * - * Copyright (C) 2018 Paul Boddie - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, - * Boston, MA 02110-1301, USA - */ - -#include -#include -#include -#include -#include -#include - -#include "memory.h" - -int get_device(char const *hid, l4io_device_handle_t *dh, l4io_resource_handle_t *rh) -{ - return l4io_lookup_device(hid, dh, 0, rh); -} - -int get_resource(l4io_device_handle_t dh, l4io_resource_t *res, - enum l4io_resource_types_t type) -{ - int current = 0, result = 0; - l4_cap_idx_t vbus = l4re_env_get_cap("vbus"); - - do - { - result = l4vbus_get_resource(vbus, dh, current, res); - current++; - } - while ((!result) && (res->type != type)); - - return result; -} - -int get_memory(char const *hid, l4_addr_t *start, l4_addr_t *end) -{ - l4io_device_handle_t dh; - l4io_resource_handle_t rh; - l4io_resource_t res; - int result; - - result = get_device(hid, &dh, &rh); - - if (result < 0) - return result; - - result = get_resource(dh, &res, L4IO_RESOURCE_MEM); - - if (result) - return result; - - result = l4io_request_iomem(res.start, res.end - res.start + 1, - L4IO_MEM_NONCACHED, start); - - if (result) - return result; - - *end = *start + (res.end - res.start + 1); - - return 0; -} diff -r b99553d569c0 -r 8d44aeecd9c5 pkg/landfall-examples/qi_lb60_lcd/memory.h --- a/pkg/landfall-examples/qi_lb60_lcd/memory.h Tue May 29 22:26:18 2018 +0200 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,36 +0,0 @@ -/* - * Memory allocation utility functions. - * - * Copyright (C) 2018 Paul Boddie - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, - * Boston, MA 02110-1301, USA - */ - -#ifndef __DRIVERS_LCD_ARCH_JZ4740_MEMORY_H__ -#define __DRIVERS_LCD_ARCH_JZ4740_MEMORY_H__ - -#include -#include - -int get_device(char const *hid, l4io_device_handle_t *dh, - l4io_resource_handle_t *rh); - -int get_resource(l4io_device_handle_t dh, l4io_resource_t *res, - enum l4io_resource_types_t type); - -int get_memory(char const *hid, l4_addr_t *start, l4_addr_t *end); - -#endif /* __DRIVERS_LCD_ARCH_JZ4740_MEMORY_H__ */ diff -r b99553d569c0 -r 8d44aeecd9c5 pkg/landfall-examples/qi_lb60_lcd/nanonote_gpm940b0.c --- a/pkg/landfall-examples/qi_lb60_lcd/nanonote_gpm940b0.c Tue May 29 22:26:18 2018 +0200 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,37 +0,0 @@ -/* - * Ben NanoNote screen details. - * - * Copyright (C) Xiangfu Liu - * Copyright (C) 2015, 2016, 2017, 2018 Paul Boddie - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, - * Boston, MA 02110-1301, USA - */ - -#include "jzlcd.h" - -struct jzfb_info nanonote_fb_info = { - .cfg=MODE_8BIT_SERIAL_TFT | PCLK_N | HSYNC_N | VSYNC_N | DE_P, - .w=320, .h=240, /* dimensions */ - .bpp=32, /* bits per pixel */ - .fclk=70, /* frame clock rate */ - .hsw=1, .vsw=1, /* sync widths */ - .elw=273, .blw=140, /* line limits: end/front, beginning/back porch */ - .efw=1, .bfw=20, /* frame limits: end/front, beginning/back porch */ -}; - -vidinfo_t nanonote_panel_info = { - .jz_fb=&nanonote_fb_info /* wrap the above */ -}; diff -r b99553d569c0 -r 8d44aeecd9c5 pkg/landfall-examples/qi_lb60_lcd/nanonote_gpm940b0.h --- a/pkg/landfall-examples/qi_lb60_lcd/nanonote_gpm940b0.h Tue May 29 22:26:18 2018 +0200 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,8 +0,0 @@ -#ifndef __NANONOTE_GPM940B0_H__ -#define __NANONOTE_GPM940B0_H__ - -#include "jzlcd.h" - -extern vidinfo_t nanonote_panel_info; - -#endif /* __NANONOTE_GPM940B0_H__ */ diff -r b99553d569c0 -r 8d44aeecd9c5 pkg/landfall-examples/qi_lb60_lcd/qi_lb60_lcd.c --- a/pkg/landfall-examples/qi_lb60_lcd/qi_lb60_lcd.c Tue May 29 22:26:18 2018 +0200 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,297 +0,0 @@ -/* - * Access the LCD and related GPIOs on the Ben NanoNote. - * - * (c) 2017, 2018 Paul Boddie - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, - * Boston, MA 02110-1301, USA - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include "nanonote_gpm940b0.h" -#include "jzlcd.h" -#include "xburst_types.h" -#include "memory.h" - -enum Jz4740_lcd_gpio -{ - Jz4740_lcd_gpio_spen = 21, /* serial command enable */ - Jz4740_lcd_gpio_spda = 22, /* serial command clock */ - Jz4740_lcd_gpio_spck = 23, /* serial command data */ -}; - -/* Peripheral memory regions. */ - -static l4_addr_t cpm_virt_base = 0, cpm_virt_base_end = 0; -static l4_addr_t gpio_virt_base = 0, gpio_virt_base_end = 0; -static l4_addr_t lcd_virt_base = 0, lcd_virt_base_end = 0; - -/* Device abstractions. */ - -static void *gpio_port_c; -static void *cpm_device = 0; -static vidinfo_t *panel_info = 0; - -/* Framebuffer and descriptor regions. */ - -static void *fb_vaddr = 0, *desc_vaddr = 0; -static l4_addr_t fb_paddr = 0, desc_paddr = 0; -static l4_size_t fb_size, desc_size; - - - -// Write SPI values via the LCD GPIO pins. - -static void spi_write_reg(uint8_t reg, uint8_t val) -{ - uint8_t no; - uint16_t value; - - jz4740_gpio_set(gpio_port_c, Jz4740_lcd_gpio_spen, 1); - jz4740_gpio_set(gpio_port_c, Jz4740_lcd_gpio_spck, 1); - jz4740_gpio_set(gpio_port_c, Jz4740_lcd_gpio_spda, 0); - jz4740_gpio_set(gpio_port_c, Jz4740_lcd_gpio_spen, 0); - - value = ((reg << 8) | (val & 0xFF)); - - /* Clock data using the clock and data outputs. */ - - for (no = 0; no < 16; no++) - { - jz4740_gpio_set(gpio_port_c, Jz4740_lcd_gpio_spck, 0); - jz4740_gpio_set(gpio_port_c, Jz4740_lcd_gpio_spda, value & 0x8000 ? 1 : 0); - jz4740_gpio_set(gpio_port_c, Jz4740_lcd_gpio_spck, 1); - value = (value << 1); - } - - jz4740_gpio_set(gpio_port_c, Jz4740_lcd_gpio_spen, 1); -} - -// GPIO-based operations. - -static void lcd_display_pin_init(void) -{ - Pin_slice mask = {.offset=0, .mask=(1 << Jz4740_lcd_gpio_spen) | (1 << Jz4740_lcd_gpio_spck) | (1 << Jz4740_lcd_gpio_spda)}; - Pin_slice slcd8_mask = {.offset=0, .mask=0x003c00ff}; - - /* Configure SPI pins. */ - - jz4740_gpio_multi_setup(gpio_port_c, &mask, L4VBUS_GPIO_SETUP_OUTPUT, 0); - - /* Configure SLCD8 pins. */ - - jz4740_gpio_multi_config_pad(gpio_port_c, &slcd8_mask, Function_alt, 0); -} - -static void lcd_display_on(void) -{ - spi_write_reg(0x05, 0x1e); // GRB=0 (reset); PWM_DUTY=0b011 (70%, default); SHDB2=1, SHDB1=1 (power-related); STB=0 (standby) - spi_write_reg(0x05, 0x5e); // GRB=1 (normal operation); ... - spi_write_reg(0x07, 0x8d); // HBLK=141 (horizontal blanking period from start of hsync pulse to data start) - spi_write_reg(0x13, 0x01); // IN_SEL=1 (alignment mode) - spi_write_reg(0x05, 0x5f); // ...; STB=1 (not standby) -} - -/* CPM operations. */ - -static void lcd_set_timing(vidinfo_t *vid) -{ - uint32_t pclk = jz4740_lcd_get_pixel_clock(vid); - - jz4740_cpm_stop_lcd(cpm_device); - - /* - Original comment: LCDClock > 2.5*Pixclock - However, the documentation indicates that a TFT panel needs a device clock - 1.5 times that of the pixel clock, and a STN panel needs a device clock 3 - times that of the pixel clock. - */ - - jz4740_cpm_set_lcd_frequencies(cpm_device, pclk, 3); - jz4740_cpm_update_output_frequency(cpm_device); - jz4740_cpm_start_lcd(cpm_device); - - l4_sleep(1); // 1ms == 1000us -} - - - -static int setup_memory(void) -{ - l4re_ds_t fbmem, descmem; - l4_size_t fb_size_out, desc_size_out; - int result = 0; - - if (fb_vaddr) - return 0; - - if (!panel_info) - return 1; - - fb_size = jz4740_lcd_get_screen_size(panel_info); - desc_size = jz4740_lcd_get_descriptors_size(panel_info); - - /* Obtain resource details describing the I/O memory. */ - - if ((result = get_memory("jz4740-cpm", &cpm_virt_base, &cpm_virt_base_end)) < 0) - return 1; - - if ((result = get_memory("jz4740-lcd", &lcd_virt_base, &lcd_virt_base_end)) < 0) - return 1; - - if ((result = get_memory("jz4740-gpio", &gpio_virt_base, &gpio_virt_base_end)) < 0) - return 1; - - /* Set the framebuffer up. */ - - fbmem = l4re_util_cap_alloc(); - descmem = l4re_util_cap_alloc(); - - if (l4_is_invalid_cap(fbmem) || l4_is_invalid_cap(descmem)) - return 1; - - /* Allocate memory for the framebuffer at 2**6 == 64 byte == 16 word alignment, - also for the descriptors. */ - - if (l4re_ma_alloc_align(fb_size, fbmem, L4RE_MA_CONTINUOUS | L4RE_MA_PINNED, 6) || - l4re_ma_alloc_align(desc_size, descmem, L4RE_MA_CONTINUOUS | L4RE_MA_PINNED, 6)) - return 1; - - /* Map the allocated memory, obtaining virtual addresses. */ - - if (l4re_rm_attach(&fb_vaddr, fb_size, - L4RE_RM_SEARCH_ADDR | L4RE_RM_EAGER_MAP, - fbmem, 0, L4_PAGESHIFT) || - l4re_rm_attach(&desc_vaddr, desc_size, - L4RE_RM_SEARCH_ADDR | L4RE_RM_EAGER_MAP, - descmem, 0, L4_PAGESHIFT)) - return 1; - - fb_size_out = fb_size; - desc_size_out = desc_size; - - if (l4re_ds_phys(fbmem, 0, &fb_paddr, &fb_size_out) || - l4re_ds_phys(descmem, 0, &desc_paddr, &desc_size_out)) - return 1; - - if ((fb_size_out != fb_size) || (desc_size_out != desc_size)) - return 1; - - cpm_device = jz4740_cpm_init(cpm_virt_base); - gpio_port_c = jz4740_gpio_init(gpio_virt_base + 0x200, gpio_virt_base + 0x300, 32); - - return 0; -} - -static void enable(void) -{ - if (setup_memory()) - return; - - jz4740_lcd_set_base(panel_info, (void *) lcd_virt_base); - jz4740_lcd_disable(panel_info); - - // Initialise the LCD controller and structures. - - jz4740_lcd_ctrl_init( - (struct jz_fb_dma_descriptor *) desc_vaddr, - (struct jz_fb_dma_descriptor *) desc_paddr, - fb_vaddr, - (void *) fb_paddr, - panel_info); - - // Initialise the LCD peripheral. - - jz4740_lcd_hw_init(panel_info); - - // Initialise the clocks for the LCD controller. - - lcd_set_timing(panel_info); - - // Switch the display on using GPIO operations. - - lcd_display_pin_init(); - lcd_display_on(); - - // Finally, enable the peripheral. - - jz4740_lcd_enable(panel_info); -} - - - -int main(void) -{ - l4_size_t *fb; - l4_size_t i, mask, value, onpix, offpix; - - /* Configure the LCD. */ - - panel_info = &nanonote_panel_info; - enable(); - - fb = (l4_size_t *) fb_vaddr; - - /* Try and show some values. */ - - onpix = 0xffaaffaa; offpix = 0x11551155; - mask = 0x80000000; value = 0x80000001; - - i = 0; - - while (i < fb_size / 4) - { - fb[i] = value & mask ? onpix : offpix; - i++; - - if ((i % 10) == 0) - { - if (mask == 1) mask = 0x80000000; - else mask >>= 1; - - onpix = (onpix >> 8) | ((onpix & 0xff) << 24); - offpix = (offpix >> 8) | ((offpix & 0xff) << 24); - - if (i == 3200) value = jz4740_cpm_get_lcd_pixel_divider(cpm_device); - else if (i == 6400) value = jz4740_cpm_get_lcd_pixel_frequency(cpm_device); - else if (i == 9600) value = (l4_size_t) fb_vaddr; - else if (i == 12800) value = fb_paddr; - else if (i == 16000) value = ((struct jz_fb_dma_descriptor *) desc_vaddr)[0].fsadr; - else if (i == 19200) value = REG32(lcd_virt_base + 0x00); - else if (i == 22400) value = REG32(lcd_virt_base + 0x04); - else if (i == 25600) value = REG32(lcd_virt_base + 0x30); - else if (i == 28800) value = REG32(lcd_virt_base + 0x40); - } - } - - l4_cache_clean_data((long unsigned int) fb_vaddr, (long unsigned int) fb_vaddr + fb_size); - - while (1); - - return 0; -} diff -r b99553d569c0 -r 8d44aeecd9c5 pkg/landfall-examples/qi_lb60_lcd/xburst_types.h --- a/pkg/landfall-examples/qi_lb60_lcd/xburst_types.h Tue May 29 22:26:18 2018 +0200 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,31 +0,0 @@ -/* - * Ingenic XBurst type definitions. - * - * Copyright 2009 (C) Qi Hardware Inc. - * Author: Xiangfu Liu - * Copyright (C) 2017 Paul Boddie - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef __XBURST_TYPES_H__ -#define __XBURST_TYPES_H__ - -#include - -#define REG8(addr) *((volatile uint8_t *)(addr)) -#define REG16(addr) *((volatile uint16_t *)(addr)) -#define REG32(addr) *((volatile uint32_t *)(addr)) - -#endif /* __XBURST_TYPES_H__ */