# HG changeset patch # User Paul Boddie # Date 1694986917 -7200 # Node ID 91f01185ddfcbf4b8269b01dfd122b8eecf19234 # Parent ad967fb624b79f3abb5fbdf8e881411dc99988a3 Removed superfluous PLL methods. diff -r ad967fb624b7 -r 91f01185ddfc pkg/devices/lib/cpm/include/cpm-common.h --- a/pkg/devices/lib/cpm/include/cpm-common.h Sun Sep 17 23:27:45 2023 +0200 +++ b/pkg/devices/lib/cpm/include/cpm-common.h Sun Sep 17 23:41:57 2023 +0200 @@ -527,15 +527,6 @@ const char *clock_type() { return "pll"; } - // General frequency modifiers. - - uint32_t get_multiplier(Cpm_regs ®s); - void set_multiplier(Cpm_regs ®s, uint32_t multiplier); - uint32_t get_input_divider(Cpm_regs ®s); - void set_input_divider(Cpm_regs ®s, uint32_t divider); - uint32_t get_output_divider(Cpm_regs ®s); - void set_output_divider(Cpm_regs ®s, uint32_t divider); - // Output frequency. uint32_t get_frequency(Cpm_regs ®s); diff -r ad967fb624b7 -r 91f01185ddfc pkg/devices/lib/cpm/src/common.cc --- a/pkg/devices/lib/cpm/src/common.cc Sun Sep 17 23:27:45 2023 +0200 +++ b/pkg/devices/lib/cpm/src/common.cc Sun Sep 17 23:41:57 2023 +0200 @@ -605,54 +605,12 @@ -// PLL boilerplate. +// PLL functionality. Pll::~Pll() { } -// Feedback (13-bit) multiplier. - -uint32_t -Pll::get_multiplier(Cpm_regs ®s) -{ - return _divider.get_multiplier(regs); -} - -void -Pll::set_multiplier(Cpm_regs ®s, uint32_t multiplier) -{ - _divider.set_multiplier(regs, multiplier); -} - -// Input (6-bit) divider. - -uint32_t -Pll::get_input_divider(Cpm_regs ®s) -{ - return _divider.get_input_divider(regs); -} - -void -Pll::set_input_divider(Cpm_regs ®s, uint32_t divider) -{ - _divider.set_input_divider(regs, divider); -} - -// Output (dual 3-bit) dividers. - -uint32_t -Pll::get_output_divider(Cpm_regs ®s) -{ - return _divider.get_output_divider(regs); -} - -void -Pll::set_output_divider(Cpm_regs ®s, uint32_t divider) -{ - _divider.set_output_divider(regs, divider); -} - uint32_t Pll::get_frequency(Cpm_regs ®s) {