# HG changeset patch # User Paul Boddie # Date 1700175493 -3600 # Node ID ff0549d94fb1d7c523366296639fac7fe75b5561 # Parent 526b5482e452b9b637c975be75fba70c7af6e251 Added a level 2 (L2) cache clock and introduced the apparent requirement to set the CPU frequency to the L2 cache frequency before powering down. diff -r 526b5482e452 -r ff0549d94fb1 pkg/devices/include/clocks.h --- a/pkg/devices/include/clocks.h Thu Nov 16 22:03:51 2023 +0100 +++ b/pkg/devices/include/clocks.h Thu Nov 16 23:58:13 2023 +0100 @@ -56,6 +56,7 @@ Clock_i2s1_rx, Clock_i2s1_tx, Clock_kbc, + Clock_l2cache, Clock_lcd, /* LCD peripheral clock */ Clock_lcd_pixel0, Clock_lcd_pixel1, diff -r 526b5482e452 -r ff0549d94fb1 pkg/devices/lib/cpm/src/jz4780.cc --- a/pkg/devices/lib/cpm/src/jz4780.cc Thu Nov 16 22:03:51 2023 +0100 +++ b/pkg/devices/lib/cpm/src/jz4780.cc Thu Nov 16 23:58:13 2023 +0100 @@ -393,6 +393,10 @@ Control(Clock_gate_hdmi, Clock_change_enable_hdmi, Clock_busy_hdmi), Divider(Clock_divider_hdmi)), + clock_l2cache(Source(mux_core, Clock_source_cpu), + Control(Field::undefined, Clock_change_enable_cpu, Clock_busy_cpu), + Divider(Clock_divider_l2cache)), + clock_lcd_pixel0(Source(mux_lcd, Clock_source_lcd0), Control(Clock_gate_lcd, Clock_change_enable_lcd0, Clock_busy_lcd0), Divider(Clock_divider_lcd0)), @@ -501,6 +505,7 @@ &clock_none, // Clock_i2s1_rx &clock_none, // Clock_i2s1_tx &clock_none, // Clock_kbc + &clock_l2cache, &clock_lcd, &clock_lcd_pixel0, &clock_lcd_pixel1, diff -r 526b5482e452 -r ff0549d94fb1 pkg/devices/lib/cpm/src/x1600.cc --- a/pkg/devices/lib/cpm/src/x1600.cc Thu Nov 16 22:03:51 2023 +0100 +++ b/pkg/devices/lib/cpm/src/x1600.cc Thu Nov 16 23:58:13 2023 +0100 @@ -336,6 +336,10 @@ clock_hclock2((Source(mux_hclock2_pclock)), (Divider(Clock_divider_hclock2))), + clock_l2cache(Source(mux_core, Clock_source_cpu), + Control(Field::undefined, Clock_change_enable_cpu, Clock_busy_cpu), + Divider(Clock_divider_l2cache)), + clock_lcd_pixel(Source(mux_dev, Clock_source_lcd), Control(Clock_gate_lcd_pixel, Clock_change_enable_lcd, Clock_busy_lcd), Divider(Clock_divider_lcd)), @@ -440,6 +444,7 @@ &clock_none, // Clock_i2s1_rx &clock_none, // Clock_i2s1_tx &clock_none, // Clock_kbc + &clock_l2cache, &clock_none, // Clock_lcd &clock_lcd_pixel, &clock_none, // Clock_lcd_pixel1 diff -r 526b5482e452 -r ff0549d94fb1 pkg/devices/lib/rtc/include/rtc-x1600.h --- a/pkg/devices/lib/rtc/include/rtc-x1600.h Thu Nov 16 22:03:51 2023 +0100 +++ b/pkg/devices/lib/rtc/include/rtc-x1600.h Thu Nov 16 23:58:13 2023 +0100 @@ -28,11 +28,15 @@ #ifdef __cplusplus +#include #include class Rtc_x1600_chip { protected: + /* Only use the CPM for the X1600, not other chips. */ + + Cpm_x1600_chip *_cpm; Hw::Register_block<32> _regs; /* Utility methods. */ @@ -42,7 +46,7 @@ void write_enable(); public: - explicit Rtc_x1600_chip(l4_addr_t addr); + explicit Rtc_x1600_chip(l4_addr_t addr, Cpm_x1600_chip *cpm = NULL); void disable(); @@ -79,7 +83,7 @@ EXTERN_C_BEGIN -void *x1600_rtc_init(l4_addr_t rtc_base); +void *x1600_rtc_init(l4_addr_t rtc_base, void *cpm); void x1600_rtc_disable(void *rtc); diff -r 526b5482e452 -r ff0549d94fb1 pkg/devices/lib/rtc/src/x1600.cc --- a/pkg/devices/lib/rtc/src/x1600.cc Thu Nov 16 22:03:51 2023 +0100 +++ b/pkg/devices/lib/rtc/src/x1600.cc Thu Nov 16 23:58:13 2023 +0100 @@ -126,7 +126,8 @@ // Peripheral abstraction. -Rtc_x1600_chip::Rtc_x1600_chip(l4_addr_t addr) +Rtc_x1600_chip::Rtc_x1600_chip(l4_addr_t addr, Cpm_x1600_chip *cpm) +: _cpm(cpm) { _regs = new Hw::Mmio_register_block<32>(addr); } @@ -264,6 +265,12 @@ void Rtc_x1600_chip::power_down() { + /* Set CPU frequency to L2 cache frequency before powering down. This is + apparently necessary according to the X1600 manual. */ + + if (_cpm != NULL) + _cpm->set_frequency(Clock_cpu, _cpm->get_frequency(Clock_l2cache)); + write_enable(); _regs[Hibernate_control] = _regs[Hibernate_control] | Hibernate_power_down; } @@ -273,9 +280,9 @@ // C language interface functions. void -*x1600_rtc_init(l4_addr_t rtc_base) +*x1600_rtc_init(l4_addr_t rtc_base, void *cpm) { - return (void *) new Rtc_x1600_chip(rtc_base); + return (void *) new Rtc_x1600_chip(rtc_base, static_cast(cpm)); } void x1600_rtc_disable(void *rtc) diff -r 526b5482e452 -r ff0549d94fb1 pkg/landfall-examples/hw_info/common.h --- a/pkg/landfall-examples/hw_info/common.h Thu Nov 16 22:03:51 2023 +0100 +++ b/pkg/landfall-examples/hw_info/common.h Thu Nov 16 23:58:13 2023 +0100 @@ -167,7 +167,7 @@ /* RTC adapter functions. */ -void *rtc_init(l4_addr_t start); +void *rtc_init(l4_addr_t start, void *cpm); void rtc_disable(void *rtc); diff -r 526b5482e452 -r ff0549d94fb1 pkg/landfall-examples/hw_info/hw_info.c --- a/pkg/landfall-examples/hw_info/hw_info.c Thu Nov 16 22:03:51 2023 +0100 +++ b/pkg/landfall-examples/hw_info/hw_info.c Thu Nov 16 23:58:13 2023 +0100 @@ -1602,7 +1602,7 @@ printf("RTC at 0x%lx...0x%lx.\n", rtc_base, rtc_base_end); - rtc = rtc_init(rtc_base); + rtc = rtc_init(rtc_base, cpm); printf("Access SSI...\n"); diff -r 526b5482e452 -r ff0549d94fb1 pkg/landfall-examples/hw_info/jz4780.c --- a/pkg/landfall-examples/hw_info/jz4780.c Thu Nov 16 22:03:51 2023 +0100 +++ b/pkg/landfall-examples/hw_info/jz4780.c Thu Nov 16 23:58:13 2023 +0100 @@ -337,9 +337,12 @@ /* RTC adapter functions. */ -void *rtc_init(l4_addr_t start) +void *rtc_init(l4_addr_t start, void *cpm) { - return x1600_rtc_init(start); + /* Ignore the CPM requirement for the JZ4780. */ + + (void) cpm; + return x1600_rtc_init(start, NULL); } void rtc_disable(void *rtc) @@ -495,6 +498,7 @@ {"pllv", Clock_pll_V, "PLL V"}, {"main", Clock_main, "Main (SCLK_A)"}, {"cpu", Clock_cpu, "CPU"}, + {"l2c", Clock_l2cache, "L2 cache"}, {"h2p", Clock_hclock2_pclock, "AHB2/APB"}, {"ahb0", Clock_hclock0, "AHB0"}, {"ahb2", Clock_hclock2, "AHB2"}, diff -r 526b5482e452 -r ff0549d94fb1 pkg/landfall-examples/hw_info/x1600.c --- a/pkg/landfall-examples/hw_info/x1600.c Thu Nov 16 22:03:51 2023 +0100 +++ b/pkg/landfall-examples/hw_info/x1600.c Thu Nov 16 23:58:13 2023 +0100 @@ -326,9 +326,9 @@ /* RTC adapter functions. */ -void *rtc_init(l4_addr_t start) +void *rtc_init(l4_addr_t start, void *cpm) { - return x1600_rtc_init(start); + return x1600_rtc_init(start, cpm); } void rtc_disable(void *rtc) @@ -483,6 +483,7 @@ {"pllm", Clock_pll_M, "PLL M"}, {"main", Clock_main, "Main (SCLK_A)"}, {"cpu", Clock_cpu, "CPU"}, + {"l2c", Clock_l2cache, "L2 cache"}, {"ahb0", Clock_hclock0, "AHB0"}, {"ahb2", Clock_hclock2, "AHB2"}, {"apb", Clock_pclock, "APB"},