1.1 --- a/pkg/devices/lib/hdmi/src/jz4780.cc Sun Jun 21 19:22:01 2020 +0200
1.2 +++ b/pkg/devices/lib/hdmi/src/jz4780.cc Thu Dec 24 18:44:48 2020 +0100
1.3 @@ -53,8 +53,6 @@
1.4 #include <l4/sys/irq.h>
1.5 #include <l4/util/util.h>
1.6
1.7 -#include <cstdio>
1.8 -
1.9 /*
1.10 I2C pins:
1.11
1.12 @@ -982,8 +980,6 @@
1.13 while (p->pixelclock && (pixelclock > p->pixelclock))
1.14 p++;
1.15
1.16 - printf("MPLL for %ld; CURR_CTRL for %ld; PHY for %ld\n", m->pixelclock, c->pixelclock, p->pixelclock);
1.17 -
1.18 if (!m->pixelclock || !c->pixelclock || !p->pixelclock)
1.19 return -L4_EINVAL;
1.20
1.21 @@ -1016,8 +1012,6 @@
1.22
1.23 long Hdmi_jz4780_chip::phy_init()
1.24 {
1.25 - printf("phy_init...\n");
1.26 -
1.27 long err;
1.28 int i;
1.29
1.30 @@ -1042,8 +1036,6 @@
1.31
1.32 void Hdmi_jz4780_chip::phy_power_off()
1.33 {
1.34 - printf("phy_power_off...\n");
1.35 -
1.36 if (_phy_def && (_phy_def->gen == 1))
1.37 {
1.38 phy_enable_tmds(false);
1.39 @@ -1060,8 +1052,6 @@
1.40
1.41 void Hdmi_jz4780_chip::phy_power_on()
1.42 {
1.43 - printf("phy_power_on...\n");
1.44 -
1.45 if (_phy_def && (_phy_def->gen == 1))
1.46 {
1.47 phy_enable_powerdown(false);
1.48 @@ -1123,8 +1113,6 @@
1.49 // An event is handled when detected and when the status differs from
1.50 // the unchanged state.
1.51
1.52 - printf("Status: %x versus %x\n", status & status_flags, status_unchanged);
1.53 -
1.54 } while (!((int_status & int_status_flags) &&
1.55 ((status & status_flags) ^ status_unchanged)));
1.56
1.57 @@ -1215,8 +1203,6 @@
1.58
1.59 void Hdmi_jz4780_chip::frame_init()
1.60 {
1.61 - printf("frame_init...\n");
1.62 -
1.63 // Initialise the video configuration. This is rather like the initialisation
1.64 // of the LCD controller. The sync and data enable polarities are set up, plus
1.65 // extras like HDCP, DVI mode, progressive/interlace.
1.66 @@ -1252,8 +1238,6 @@
1.67
1.68 _regs[Fc_video_config] = config;
1.69
1.70 - printf("Fc_video_config (%x) = %x\n", Fc_video_config, (uint8_t) _regs[Fc_video_config]);
1.71 -
1.72 // Then, the frame characteristics (visible area, sync pulse) are set. Indeed,
1.73 // the frame area details should be practically the same as those used by the
1.74 // LCD controller.
1.75 @@ -1289,8 +1273,6 @@
1.76
1.77 void Hdmi_jz4780_chip::data_path_init()
1.78 {
1.79 - printf("data_path_init...\n");
1.80 -
1.81 // Initialise the path of the video data. Here, the elements of the data
1.82 // stream are defined such as the control period duration, data channel
1.83 // characteristics, pixel and TMDS clocks, and the involvement of colour space
1.84 @@ -1332,8 +1314,6 @@
1.85
1.86 void Hdmi_jz4780_chip::packet_init()
1.87 {
1.88 - printf("packet_init...\n");
1.89 -
1.90 // Initialise the video packet details.
1.91 // NOTE: With 24bpp RGB output only for now, no pixel repetition.
1.92
1.93 @@ -1365,8 +1345,6 @@
1.94
1.95 void Hdmi_jz4780_chip::csc_init()
1.96 {
1.97 - printf("csc_init...\n");
1.98 -
1.99 // Initialise the colour space conversion details.
1.100 // NOTE: No conversion will be done yet (see data_path_init).
1.101
1.102 @@ -1382,8 +1360,6 @@
1.103
1.104 void Hdmi_jz4780_chip::sample_init()
1.105 {
1.106 - printf("sample_init...\n");
1.107 -
1.108 // Initialise the mapping of video input data.
1.109 // NOTE: With 24bpp RGB input only for now.
1.110
1.111 @@ -1409,8 +1385,6 @@
1.112
1.113 void Hdmi_jz4780_chip::hdcp_init()
1.114 {
1.115 - printf("hdcp_init...\n");
1.116 -
1.117 // Initialise HDCP registers, mostly turning things off.
1.118
1.119 reg_update(Hdcp_config0, Hdcp_config0_rxdetect_enable, false);