1.1 --- a/pkg/devices/include/clocks.h Fri Nov 17 18:38:44 2023 +0100
1.2 +++ b/pkg/devices/include/clocks.h Sat Nov 18 16:23:00 2023 +0100
1.3 @@ -69,6 +69,7 @@
1.4 Clock_msc0,
1.5 Clock_msc1,
1.6 Clock_msc2,
1.7 + Clock_nemc,
1.8 Clock_otg0,
1.9 Clock_otg1,
1.10 Clock_pclock, /* APB */
1.11 @@ -81,6 +82,7 @@
1.12 Clock_pwm1,
1.13 Clock_rtc, /* RTC parent clock */
1.14 Clock_rtc_external, /* RTCLK */
1.15 + Clock_sadc,
1.16 Clock_scc,
1.17 Clock_sfc,
1.18 Clock_ssi, /* SSI parent clock (JZ4780) */
2.1 --- a/pkg/devices/lib/cpm/include/cpm-common.h Fri Nov 17 18:38:44 2023 +0100
2.2 +++ b/pkg/devices/lib/cpm/include/cpm-common.h Sat Nov 18 16:23:00 2023 +0100
2.3 @@ -310,15 +310,16 @@
2.4 class Divider : public Divider_base
2.5 {
2.6 Field _divider;
2.7 + int _scale;
2.8
2.9 public:
2.10 - explicit Divider(Field divider)
2.11 - : _divider(divider)
2.12 + explicit Divider(Field divider, int scale = 1)
2.13 + : _divider(divider), _scale(scale)
2.14 {
2.15 }
2.16
2.17 explicit Divider()
2.18 - : _divider(Field::undefined)
2.19 + : _divider(Field::undefined), _scale(1)
2.20 {
2.21 }
2.22
3.1 --- a/pkg/devices/lib/cpm/src/common.cc Fri Nov 17 18:38:44 2023 +0100
3.2 +++ b/pkg/devices/lib/cpm/src/common.cc Sat Nov 18 16:23:00 2023 +0100
3.3 @@ -342,7 +342,7 @@
3.4 Divider::get_divider(Cpm_regs ®s)
3.5 {
3.6 if (_divider.is_defined())
3.7 - return _divider.get_field(regs) + 1;
3.8 + return _scale * (_divider.get_field(regs) + 1);
3.9 else
3.10 return 1;
3.11 }
3.12 @@ -351,7 +351,7 @@
3.13 Divider::set_divider(Cpm_regs ®s, uint32_t divider)
3.14 {
3.15 if (_divider.is_defined())
3.16 - _divider.set_field(regs, divider - 1);
3.17 + _divider.set_field(regs, divider / _scale - 1);
3.18 }
3.19
3.20 // Output clock frequencies.
4.1 --- a/pkg/devices/lib/cpm/src/jz4780.cc Fri Nov 17 18:38:44 2023 +0100
4.2 +++ b/pkg/devices/lib/cpm/src/jz4780.cc Sat Nov 18 16:23:00 2023 +0100
4.3 @@ -417,15 +417,15 @@
4.4
4.5 clock_msc0(Source(mux_clock_msc),
4.6 Control(Clock_gate_msc0, Clock_change_enable_msc0, Clock_busy_msc0),
4.7 - Divider(Clock_divider_msc0)),
4.8 + Divider(Clock_divider_msc0, 2)),
4.9
4.10 clock_msc1(Source(mux_clock_msc),
4.11 Control(Clock_gate_msc1, Clock_change_enable_msc1, Clock_busy_msc1),
4.12 - Divider(Clock_divider_msc1)),
4.13 + Divider(Clock_divider_msc1, 2)),
4.14
4.15 clock_msc2(Source(mux_clock_msc),
4.16 Control(Clock_gate_msc2, Clock_change_enable_msc2, Clock_busy_msc2),
4.17 - Divider(Clock_divider_msc2)),
4.18 + Divider(Clock_divider_msc2, 2)),
4.19
4.20 clock_pcm(Source(mux_pcm, Clock_source_pcm),
4.21 Control(Clock_gate_pcm, Clock_change_enable_pcm, Clock_busy_pcm),
4.22 @@ -528,6 +528,7 @@
4.23 &clock_msc0,
4.24 &clock_msc1,
4.25 &clock_msc2,
4.26 + &clock_nemc,
4.27 &clock_otg0,
4.28 &clock_otg1,
4.29 &clock_pclock,
4.30 @@ -540,6 +541,7 @@
4.31 &clock_none, // Clock_pwm1
4.32 &clock_external_div_512,// Clock_rtc
4.33 &clock_rtc_external,
4.34 + &clock_sadc,
4.35 &clock_scc,
4.36 &clock_none, // Clock_sfc
4.37 &clock_ssi,
5.1 --- a/pkg/devices/lib/cpm/src/x1600.cc Fri Nov 17 18:38:44 2023 +0100
5.2 +++ b/pkg/devices/lib/cpm/src/x1600.cc Sat Nov 18 16:23:00 2023 +0100
5.3 @@ -290,10 +290,14 @@
5.4
5.5 clock_mipi_csi((Source(mux_hclock0)), Control(Clock_gate_mipi_csi)),
5.6
5.7 + clock_nemc((Source(mux_hclock2)), (Control(Clock_gate_nemc))),
5.8 +
5.9 clock_otg0((Source(mux_hclock2)), (Control(Clock_gate_otg))),
5.10
5.11 clock_rtc(Source(mux_rtc, Clock_source_rtc), (Control(Clock_gate_rtc))),
5.12
5.13 + clock_sadc((Source(mux_hclock2)), (Control(Clock_gate_sadc))),
5.14 +
5.15 clock_timer((Source(mux_pclock)), (Control(Clock_gate_timer))),
5.16
5.17 clock_uart0((Source(mux_external)), (Control(Clock_gate_uart0))),
5.18 @@ -356,11 +360,11 @@
5.19
5.20 clock_msc0(Source(mux_dev, Clock_source_msc0),
5.21 Control(Clock_gate_msc0, Clock_change_enable_msc0, Clock_busy_msc0),
5.22 - Divider(Clock_divider_msc0)),
5.23 + Divider(Clock_divider_msc0, 2)),
5.24
5.25 clock_msc1(Source(mux_dev, Clock_source_msc1),
5.26 Control(Clock_gate_msc1, Clock_change_enable_msc1, Clock_busy_msc1),
5.27 - Divider(Clock_divider_msc1)),
5.28 + Divider(Clock_divider_msc1, 2)),
5.29
5.30 clock_pclock((Source(mux_hclock2_pclock)), (Divider(Clock_divider_pclock))),
5.31
5.32 @@ -463,6 +467,7 @@
5.33 &clock_msc0,
5.34 &clock_msc1,
5.35 &clock_none, // Clock_msc2
5.36 + &clock_nemc,
5.37 &clock_otg0,
5.38 &clock_none, // Clock_otg1
5.39 &clock_pclock,
5.40 @@ -475,6 +480,7 @@
5.41 &clock_none, // Clock_pwm1
5.42 &clock_rtc,
5.43 &clock_rtc_external,
5.44 + &clock_sadc,
5.45 &clock_none, // Clock_scc
5.46 &clock_sfc,
5.47 &clock_none, // Clock_ssi