1.1 --- a/conf/landfall-examples/mips-qi_lb60-lcd.cfg Tue May 29 22:26:18 2018 +0200
1.2 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000
1.3 @@ -1,30 +0,0 @@
1.4 --- vim: ft=lua ts=2 et sw=2
1.5 -
1.6 --- Test LCD peripheral. The target platform is the Ben NanoNote.
1.7 -
1.8 -local L4 = require("L4");
1.9 -
1.10 -local l = L4.default_loader;
1.11 -
1.12 -local io_buses = {
1.13 - devices = l:new_channel(); -- exposes CPM, GPIO, LCD
1.14 - };
1.15 -
1.16 -l:start({
1.17 - caps = {
1.18 - devices = io_buses.devices:svr(),
1.19 - icu = L4.Env.icu,
1.20 - sigma0 = L4.cast(L4.Proto.Factory, L4.Env.sigma0):create(L4.Proto.Sigma0),
1.21 - },
1.22 - log = { "IO", "y" },
1.23 - l4re_dbg = L4.Dbg.Warn,
1.24 - },
1.25 - "rom/io -vvvv rom/hw_devices.io rom/mips-qi_lb60-lcd.io");
1.26 -
1.27 -l:start({
1.28 - caps = {
1.29 - icu = L4.Env.icu,
1.30 - vbus = io_buses.devices,
1.31 - },
1.32 - },
1.33 - "rom/ex_qi_lb60_lcd");
2.1 --- a/conf/landfall-examples/mips-qi_lb60-lcd.io Tue May 29 22:26:18 2018 +0200
2.2 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000
2.3 @@ -1,12 +0,0 @@
2.4 --- vim: ft=lua ts=2 et sw=2
2.5 -
2.6 --- Configuration file for Io.
2.7 -
2.8 -local hw = Io.system_bus()
2.9 -
2.10 -Io.add_vbus("devices", Io.Vi.System_bus
2.11 -{
2.12 - CPM = wrap(hw:match("jz4740-cpm"));
2.13 - GPIO = wrap(hw:match("jz4740-gpio"));
2.14 - LCD = wrap(hw:match("jz4740-lcd"));
2.15 -})
3.1 --- a/conf/landfall-examples/mips-qi_lb60-lcd.list Tue May 29 22:26:18 2018 +0200
3.2 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000
3.3 @@ -1,14 +0,0 @@
3.4 -
3.5 -modaddr 0x1100000
3.6 -
3.7 -entry mips-qi_lb60-lcd-example
3.8 -bootstrap bootstrap -serial
3.9 -kernel fiasco -serial_esc
3.10 -roottask moe rom/mips-qi_lb60-lcd.cfg
3.11 -module mips-qi_lb60-lcd.cfg
3.12 -module mips-qi_lb60-lcd.io
3.13 -module plat-qi_lb60/hw_devices.io
3.14 -module l4re
3.15 -module io
3.16 -module ned
3.17 -module ex_qi_lb60_lcd
4.1 --- a/docs/COPYING.txt Tue May 29 22:26:18 2018 +0200
4.2 +++ b/docs/COPYING.txt Tue May 29 23:12:58 2018 +0200
4.3 @@ -1,8 +1,8 @@
4.4 Licence Agreement
4.5 -----------------
4.6
4.7 -All original work in this distribution is covered by the following
4.8 -copyright and licensing information:
4.9 +All original work in this distribution is covered by the following copyright
4.10 +and licensing information:
4.11
4.12 Copyright (C) 2015, 2016, 2017, 2018 Paul Boddie <paul@boddie.org.uk>
4.13
4.14 @@ -23,22 +23,15 @@
4.15
4.16
4.17
4.18 -Other code has been incorporated into this distribution and is
4.19 -covered by the following copyrights:
4.20 +Other code has been incorporated into this distribution and is covered by the
4.21 +following copyrights:
4.22
4.23 pkg/devices/lib/common/include:
4.24
4.25 (c) 2014 Alexander Warg <alexander.warg@kernkonzept.com>
4.26
4.27 -pkg/landfall-examples/qi_lb60_lcd:
4.28 -
4.29 - Copyright (C) 2001 Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4.30 - Copyright (C) 2005-2007, Ingenic Semiconductor Inc.
4.31 - Copyright (C) 2009 Qi Hardware Inc.
4.32 - Copyright (C) Xiangfu Liu <xiangfu@sharism.cc>
4.33 -
4.34 -Note that due to the incorporation of code from L4Re, the following
4.35 -files are actually licensed under the GPL version 2 only:
4.36 +Note that due to the incorporation of code from L4Re, the following files are
4.37 +actually licensed under the GPL version 2 only:
4.38
4.39 pkg/devices/lib/common/include/hw_mmio_register_block.h
4.40 pkg/devices/lib/common/include/hw_register_block.h
4.41 @@ -50,13 +43,15 @@
4.42 pkg/devices/lib/gpio/src/jz4740.cc
4.43 pkg/devices/lib/gpio/src/jz4780.cc
4.44
4.45 -No clear copyright statements are provided in the L4Re distribution
4.46 -for such files.
4.47 +No clear copyright statements are provided in the L4Re distribution for such
4.48 +files.
4.49
4.50
4.51
4.52 -Font definitions and licence (see unifont.tff for bitmap data
4.53 -derived from GNU Unifont's unifont.hex file):
4.54 +Font definitions and licence when bitmap data has been generated by the
4.55 +appropriate tool (see unifont.tff for bitmap data derived from GNU Unifont's
4.56 +unifont.hex file) and is distributed with this software (which is not the case
4.57 +by default):
4.58
4.59 Copyright (C) 1998-2003 Roman Czyborra (http://czyborra.com/)
4.60
5.1 --- a/pkg/landfall-examples/qi_lb60_lcd/Makefile Tue May 29 22:26:18 2018 +0200
5.2 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000
5.3 @@ -1,8 +0,0 @@
5.4 -PKGDIR ?= ..
5.5 -L4DIR ?= $(PKGDIR)/../..
5.6 -
5.7 -TARGET = ex_qi_lb60_lcd
5.8 -SRC_C = qi_lb60_lcd.c jzlcd.c nanonote_gpm940b0.c memory.c
5.9 -REQUIRES_LIBS = libio l4re_c-util libdrivers-cpm libdrivers-gpio
5.10 -
5.11 -include $(L4DIR)/mk/prog.mk
6.1 --- a/pkg/landfall-examples/qi_lb60_lcd/jzlcd.c Tue May 29 22:26:18 2018 +0200
6.2 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000
6.3 @@ -1,565 +0,0 @@
6.4 -/*
6.5 - * jz4740 LCD controller configuration.
6.6 - *
6.7 - * Copyright (C) Xiangfu Liu <xiangfu@sharism.cc>
6.8 - * Copyright (C) 2015, 2016, 2017, 2018 Paul Boddie <paul@boddie.org.uk>
6.9 - *
6.10 - * This program is free software; you can redistribute it and/or
6.11 - * modify it under the terms of the GNU General Public License as
6.12 - * published by the Free Software Foundation; either version 2 of
6.13 - * the License, or (at your option) any later version.
6.14 - *
6.15 - * This program is distributed in the hope that it will be useful,
6.16 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
6.17 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
6.18 - * GNU General Public License for more details.
6.19 - *
6.20 - * You should have received a copy of the GNU General Public License
6.21 - * along with this program; if not, write to the Free Software
6.22 - * Foundation, Inc., 51 Franklin Street, Fifth Floor,
6.23 - * Boston, MA 02110-1301, USA
6.24 - */
6.25 -
6.26 -#include "jzlcd.h"
6.27 -#include "xburst_types.h" /* for REG32 */
6.28 -#include <l4/sys/cache.h> /* for l4_cache functions */
6.29 -
6.30 -/* Useful alignment operations. */
6.31 -
6.32 -static inline void align2(uint32_t *n)
6.33 -{
6.34 - *n = (((*n)+1)>>1)<<1;
6.35 -}
6.36 -
6.37 -static inline void align4(uint32_t *n)
6.38 -{
6.39 - *n = (((*n)+3)>>2)<<2;
6.40 -}
6.41 -
6.42 -static inline void align8(uint32_t *n)
6.43 -{
6.44 - *n = (((*n)+7)>>3)<<3;
6.45 -}
6.46 -
6.47 -
6.48 -
6.49 -/* Register operations. */
6.50 -
6.51 -static inline uint32_t lcd_ctrl_get(vidinfo_t *vid, uint32_t reg)
6.52 -{
6.53 - return REG32(vid->lcd + reg);
6.54 -}
6.55 -
6.56 -static inline void lcd_ctrl_set(vidinfo_t *vid, uint32_t reg, uint32_t value)
6.57 -{
6.58 - REG32(vid->lcd + reg) = value;
6.59 -}
6.60 -
6.61 -
6.62 -
6.63 -/* Configuration operations. */
6.64 -
6.65 -/* Return the number of panels available. */
6.66 -
6.67 -static uint8_t lcd_get_panels(vidinfo_t *vid)
6.68 -{
6.69 - struct jzfb_info *jzfb = vid->jz_fb;
6.70 - uint32_t mode = jzfb->cfg & MODE_MASK;
6.71 -
6.72 - return (mode == MODE_STN_MONO_DUAL) ||
6.73 - (mode == MODE_STN_COLOR_DUAL) ? 2 : 1;
6.74 -}
6.75 -
6.76 -/* Calculate and return the pixel clock frequency. */
6.77 -
6.78 -static uint32_t lcd_get_pixel_clock(vidinfo_t *vid)
6.79 -{
6.80 - struct jzfb_info *jzfb = vid->jz_fb;
6.81 - uint32_t pclk, width_cycles, mode = jzfb->cfg & MODE_MASK;
6.82 -
6.83 - /*
6.84 - Serial mode: 3 pixel clock cycles per pixel (one per channel).
6.85 - Parallel mode: 1 pixel clock cycle per pixel.
6.86 - */
6.87 -
6.88 - if (mode == MODE_8BIT_SERIAL_TFT)
6.89 - width_cycles = jzfb->w * 3;
6.90 - else
6.91 - width_cycles = jzfb->w;
6.92 -
6.93 - /* Derive pixel clock from frame clock. */
6.94 -
6.95 - pclk = jzfb->fclk *
6.96 - (width_cycles + jzfb->hsw + jzfb->elw + jzfb->blw) *
6.97 - (jzfb->h + jzfb->vsw + jzfb->efw + jzfb->bfw);
6.98 -
6.99 - if ((mode == MODE_STN_COLOR_SINGLE) || (mode == MODE_STN_COLOR_DUAL))
6.100 - pclk = (pclk * 3);
6.101 -
6.102 - if ((mode == MODE_STN_COLOR_SINGLE) || (mode == MODE_STN_COLOR_DUAL) ||
6.103 - (mode == MODE_STN_MONO_SINGLE) || (mode == MODE_STN_MONO_DUAL))
6.104 - pclk = pclk >> ((jzfb->cfg & STN_DAT_PINMASK) >> 4);
6.105 -
6.106 - if ((mode == MODE_STN_COLOR_DUAL) || (mode == MODE_STN_MONO_DUAL))
6.107 - pclk >>= 1;
6.108 -
6.109 - return pclk;
6.110 -}
6.111 -
6.112 -
6.113 -
6.114 -/* Functions returning region sizes. */
6.115 -
6.116 -static uint32_t lcd_get_line_size(vidinfo_t *vid)
6.117 -{
6.118 - /* Lines must be aligned to a word boundary. */
6.119 -
6.120 - return ALIGN((vid->jz_fb->w * vid->jz_fb->bpp) / 8, sizeof(uint32_t));
6.121 -}
6.122 -
6.123 -static uint32_t lcd_get_size(vidinfo_t *vid)
6.124 -{
6.125 - return lcd_get_line_size(vid) * vid->jz_fb->h;
6.126 -}
6.127 -
6.128 -static uint32_t lcd_get_aligned_size(vidinfo_t *vid)
6.129 -{
6.130 - /* LCD_CTRL_BST_16 requires 16-word alignment. */
6.131 -
6.132 - return ALIGN(lcd_get_size(vid), 16 * sizeof(uint32_t));
6.133 -}
6.134 -
6.135 -static uint32_t lcd_get_palette_size(vidinfo_t *vid)
6.136 -{
6.137 - /* Get a collection of two-byte entries, one per colour. */
6.138 -
6.139 - if (vid->jz_fb->bpp < 12)
6.140 - return (1 << (vid->jz_fb->bpp)) * sizeof(uint16_t);
6.141 - else
6.142 - return 0;
6.143 -}
6.144 -
6.145 -static uint32_t lcd_get_aligned_palette_size(vidinfo_t *vid)
6.146 -{
6.147 - /* LCD_CTRL_BST_16 requires 16-word alignment. */
6.148 -
6.149 - return ALIGN(lcd_get_palette_size(vid), 16 * sizeof(uint32_t));
6.150 -}
6.151 -
6.152 -static uint32_t lcd_get_descriptors_size(vidinfo_t *vid)
6.153 -{
6.154 - return 3 * sizeof(struct jz_fb_dma_descriptor);
6.155 -}
6.156 -
6.157 -
6.158 -
6.159 -/* Functions returning addresses of each data region.
6.160 -The screen parameter permits the retrieval of virtual or physical addresses. */
6.161 -
6.162 -static uint32_t lcd_get_palette(vidinfo_t *vid, uint32_t screen)
6.163 -{
6.164 - /* Use memory at the end of the allocated region for the palette. */
6.165 -
6.166 - return screen + jz4740_lcd_get_screen_size(vid) - lcd_get_aligned_palette_size(vid);
6.167 -}
6.168 -
6.169 -static uint32_t lcd_get_framebuffer(uint8_t panel, vidinfo_t *vid, uint32_t screen)
6.170 -{
6.171 - /* Framebuffers for panels are allocated at the start of the region. */
6.172 -
6.173 - return screen + (panel * lcd_get_aligned_size(vid));
6.174 -}
6.175 -
6.176 -
6.177 -
6.178 -/* Initialisation functions. */
6.179 -
6.180 -static uint32_t jz_lcd_stn_init(uint32_t stnH, vidinfo_t *vid)
6.181 -{
6.182 - struct jzfb_info *jzfb = vid->jz_fb;
6.183 - uint32_t val = 0;
6.184 -
6.185 - switch (jzfb->bpp) {
6.186 - case 1:
6.187 - /* val |= LCD_CTRL_PEDN; */
6.188 - case 2:
6.189 - val |= LCD_CTRL_FRC_2;
6.190 - break;
6.191 -
6.192 - case 4:
6.193 - val |= LCD_CTRL_FRC_4;
6.194 - break;
6.195 -
6.196 - case 8:
6.197 - default:
6.198 - val |= LCD_CTRL_FRC_16;
6.199 - break;
6.200 - }
6.201 -
6.202 - switch (jzfb->cfg & STN_DAT_PINMASK) {
6.203 - case STN_DAT_PIN1:
6.204 - /* Do not adjust the hori-param value. */
6.205 - break;
6.206 -
6.207 - case STN_DAT_PIN2:
6.208 - align2(&jzfb->hsw);
6.209 - align2(&jzfb->elw);
6.210 - align2(&jzfb->blw);
6.211 - break;
6.212 -
6.213 - case STN_DAT_PIN4:
6.214 - align4(&jzfb->hsw);
6.215 - align4(&jzfb->elw);
6.216 - align4(&jzfb->blw);
6.217 - break;
6.218 -
6.219 - case STN_DAT_PIN8:
6.220 - align8(&jzfb->hsw);
6.221 - align8(&jzfb->elw);
6.222 - align8(&jzfb->blw);
6.223 - break;
6.224 - }
6.225 -
6.226 - lcd_ctrl_set(vid, LCD_VSYNC, jzfb->vsw);
6.227 - lcd_ctrl_set(vid, LCD_HSYNC, ((jzfb->blw + jzfb->w) << 16) | (jzfb->blw + jzfb->w + jzfb->hsw));
6.228 -
6.229 - /* Screen setting */
6.230 - lcd_ctrl_set(vid, LCD_VAT, ((jzfb->blw + jzfb->w + jzfb->hsw + jzfb->elw) << 16) | (stnH + jzfb->vsw + jzfb->bfw + jzfb->efw));
6.231 - lcd_ctrl_set(vid, LCD_DAH, (jzfb->blw << 16) | (jzfb->blw + jzfb->w));
6.232 - lcd_ctrl_set(vid, LCD_DAV, stnH);
6.233 -
6.234 - /* AC BIAs signal */
6.235 - lcd_ctrl_set(vid, LCD_PS, stnH+jzfb->vsw+jzfb->efw+jzfb->bfw);
6.236 -
6.237 - return val;
6.238 -}
6.239 -
6.240 -static void jz_lcd_tft_init(vidinfo_t *vid)
6.241 -{
6.242 - struct jzfb_info *jzfb = vid->jz_fb;
6.243 -
6.244 - lcd_ctrl_set(vid, LCD_VSYNC, jzfb->vsw);
6.245 - lcd_ctrl_set(vid, LCD_HSYNC, jzfb->hsw);
6.246 - lcd_ctrl_set(vid, LCD_DAV, ((jzfb->vsw + jzfb->bfw) << 16) | (jzfb->vsw + jzfb->bfw + jzfb->h));
6.247 - lcd_ctrl_set(vid, LCD_DAH, ((jzfb->hsw + jzfb->blw) << 16) | (jzfb->hsw + jzfb->blw + jzfb->w));
6.248 - lcd_ctrl_set(vid, LCD_VAT, (((jzfb->blw + jzfb->w + jzfb->elw + jzfb->hsw)) << 16) |
6.249 - (jzfb->vsw + jzfb->bfw + jzfb->h + jzfb->efw));
6.250 -}
6.251 -
6.252 -static void jz_lcd_samsung_init(vidinfo_t *vid)
6.253 -{
6.254 - struct jzfb_info *jzfb = vid->jz_fb;
6.255 - uint32_t pclk = lcd_get_pixel_clock(vid);
6.256 - uint32_t total, tp_s, tp_e, ckv_s, ckv_e;
6.257 - uint32_t rev_s, rev_e, inv_s, inv_e;
6.258 -
6.259 - jz_lcd_tft_init(vid);
6.260 -
6.261 - total = jzfb->blw + jzfb->w + jzfb->elw + jzfb->hsw;
6.262 - tp_s = jzfb->blw + jzfb->w + 1;
6.263 - tp_e = tp_s + 1;
6.264 - /* ckv_s = tp_s - jz_clocks.pixclk/(1000000000/4100); */
6.265 - ckv_s = tp_s - pclk/(1000000000/4100);
6.266 - ckv_e = tp_s + total;
6.267 - rev_s = tp_s - 11; /* -11.5 clk */
6.268 - rev_e = rev_s + total;
6.269 - inv_s = tp_s;
6.270 - inv_e = inv_s + total;
6.271 - lcd_ctrl_set(vid, LCD_CLS, (tp_s << 16) | tp_e);
6.272 - lcd_ctrl_set(vid, LCD_PS, (ckv_s << 16) | ckv_e);
6.273 - lcd_ctrl_set(vid, LCD_SPL, (rev_s << 16) | rev_e);
6.274 - lcd_ctrl_set(vid, LCD_REV, (inv_s << 16) | inv_e);
6.275 - jzfb->cfg |= STFT_REVHI | STFT_SPLHI;
6.276 -}
6.277 -
6.278 -static void jz_lcd_sharp_init(vidinfo_t *vid)
6.279 -{
6.280 - struct jzfb_info *jzfb = vid->jz_fb;
6.281 - uint32_t total, cls_s, cls_e, ps_s, ps_e;
6.282 - uint32_t spl_s, spl_e, rev_s, rev_e;
6.283 -
6.284 - jz_lcd_tft_init(vid);
6.285 -
6.286 - total = jzfb->blw + jzfb->w + jzfb->elw + jzfb->hsw;
6.287 - spl_s = 1;
6.288 - spl_e = spl_s + 1;
6.289 - cls_s = 0;
6.290 - cls_e = total - 60; /* > 4us (pclk = 80ns) */
6.291 - ps_s = cls_s;
6.292 - ps_e = cls_e;
6.293 - rev_s = total - 40; /* > 3us (pclk = 80ns) */
6.294 - rev_e = rev_s + total;
6.295 - jzfb->cfg |= STFT_PSHI;
6.296 - lcd_ctrl_set(vid, LCD_SPL, (spl_s << 16) | spl_e);
6.297 - lcd_ctrl_set(vid, LCD_CLS, (cls_s << 16) | cls_e);
6.298 - lcd_ctrl_set(vid, LCD_PS, (ps_s << 16) | ps_e);
6.299 - lcd_ctrl_set(vid, LCD_REV, (rev_s << 16) | rev_e);
6.300 -}
6.301 -
6.302 -
6.303 -
6.304 -/* Palette initialisation. */
6.305 -
6.306 -static inline uint16_t rgb8_to_rgb16(uint8_t rgb)
6.307 -{
6.308 - return ((((rgb & 0xe0) >> 5) * 4) << 11) | ((((rgb & 0x1c) >> 2) * 9) << 6) | ((rgb & 0x03) * 10);
6.309 -}
6.310 -
6.311 -static inline uint16_t rgb4_to_rgb16(uint8_t rgb)
6.312 -{
6.313 - return ((((rgb & 8) >> 3) * 0x1f) << 11) | ((((rgb & 6) >> 1) * 0x15) << 5) | ((rgb & 1) * 0x1f);
6.314 -}
6.315 -
6.316 -static void lcd_init_palette(vidinfo_t *vid, uint32_t palette)
6.317 -{
6.318 - uint16_t *entry = (uint16_t *) palette;
6.319 - uint16_t *end = entry + (1 << (vid->jz_fb->bpp));
6.320 - uint8_t value = 0;
6.321 -
6.322 - while (entry < end)
6.323 - {
6.324 - switch (vid->jz_fb->bpp)
6.325 - {
6.326 - case 4:
6.327 - *entry = rgb4_to_rgb16(value);
6.328 - break;
6.329 -
6.330 - case 8:
6.331 - default:
6.332 - *entry = rgb8_to_rgb16(value);
6.333 - break;
6.334 - }
6.335 -
6.336 - value++;
6.337 - entry++;
6.338 - }
6.339 -}
6.340 -
6.341 -
6.342 -
6.343 -/* Public functions. */
6.344 -
6.345 -uint32_t jz4740_lcd_get_aligned_size(vidinfo_t *vid)
6.346 -{
6.347 - return lcd_get_aligned_size(vid);
6.348 -}
6.349 -
6.350 -uint32_t jz4740_lcd_get_descriptors_size(vidinfo_t *vid)
6.351 -{
6.352 - return lcd_get_descriptors_size(vid);
6.353 -}
6.354 -
6.355 -uint32_t jz4740_lcd_get_line_size(vidinfo_t *vid)
6.356 -{
6.357 - return lcd_get_line_size(vid);
6.358 -}
6.359 -
6.360 -/* Return the total size of the required memory. */
6.361 -
6.362 -uint32_t jz4740_lcd_get_screen_size(vidinfo_t *vid)
6.363 -{
6.364 - return lcd_get_aligned_size(vid) * lcd_get_panels(vid) +
6.365 - lcd_get_aligned_palette_size(vid);
6.366 -}
6.367 -
6.368 -/* Return the calculated pixel clock frequency for the display. */
6.369 -
6.370 -uint32_t jz4740_lcd_get_pixel_clock(vidinfo_t *vid)
6.371 -{
6.372 - return lcd_get_pixel_clock(vid);
6.373 -}
6.374 -
6.375 -/* Set the LCD controller address. */
6.376 -
6.377 -void jz4740_lcd_set_base(vidinfo_t *vid, void *lcd_base)
6.378 -{
6.379 - vid->lcd = lcd_base;
6.380 -}
6.381 -
6.382 -/* Initialise the LCD controller with the memory, panel and framebuffer details. */
6.383 -
6.384 -void jz4740_lcd_ctrl_init(
6.385 - struct jz_fb_dma_descriptor *desc_vaddr,
6.386 - struct jz_fb_dma_descriptor *desc_paddr,
6.387 - void *fb_vaddr, void *fb_paddr,
6.388 - vidinfo_t *vid)
6.389 -{
6.390 - struct jz_fb_dma_descriptor *first, *second = 0;
6.391 -
6.392 - /* Initialise a palette for lower colour depths. */
6.393 -
6.394 - if (vid->jz_fb->bpp < 12)
6.395 - lcd_init_palette(vid, lcd_get_palette(vid, (uint32_t) fb_vaddr));
6.396 -
6.397 - /* Populate descriptors. */
6.398 -
6.399 - /* Provide the first framebuffer descriptor in single and dual modes. */
6.400 -
6.401 - desc_vaddr[0].fsadr = lcd_get_framebuffer(0, vid, (uint32_t) fb_paddr);
6.402 - desc_vaddr[0].fidr = 0;
6.403 - desc_vaddr[0].ldcmd = lcd_get_size(vid) / 4; /* length in words */
6.404 -
6.405 - /* Provide the second framebuffer descriptor only in dual-panel mode. */
6.406 -
6.407 - if (lcd_get_panels(vid) == 2)
6.408 - {
6.409 - desc_vaddr[1].fdadr = desc_paddr + 1;
6.410 - desc_vaddr[1].fsadr = lcd_get_framebuffer(1, vid, (uint32_t) fb_paddr);
6.411 - desc_vaddr[1].fidr = 0;
6.412 - desc_vaddr[1].ldcmd = lcd_get_size(vid) / 4;
6.413 -
6.414 - /* Note the address to be provided for the second channel. */
6.415 -
6.416 - second = desc_paddr + 1;
6.417 - }
6.418 -
6.419 - /* Initialise palette descriptor details if a palette is to be used. */
6.420 -
6.421 - /* Assume any mode with <12 bpp is palette driven. */
6.422 -
6.423 - if (vid->jz_fb->bpp < 12)
6.424 - {
6.425 - desc_vaddr[2].fsadr = lcd_get_palette(vid, (uint32_t) fb_paddr);
6.426 - desc_vaddr[2].fidr = 0;
6.427 - desc_vaddr[2].ldcmd = (lcd_get_palette_size(vid) / 4) | LCD_CMD_PAL;
6.428 -
6.429 - /* Flip back and forth between the palette and framebuffer. */
6.430 -
6.431 - desc_vaddr[2].fdadr = desc_paddr;
6.432 - desc_vaddr[0].fdadr = desc_paddr + 2;
6.433 -
6.434 - /* Provide the palette descriptor address first. */
6.435 -
6.436 - first = desc_paddr + 2;
6.437 - }
6.438 - else
6.439 - {
6.440 - /* No palette: always use the framebuffer descriptor. */
6.441 -
6.442 - desc_vaddr[0].fdadr = desc_paddr;
6.443 - first = desc_paddr;
6.444 - }
6.445 -
6.446 - /* Flush cached structure data. */
6.447 -
6.448 - l4_cache_clean_data((unsigned long) desc_vaddr,
6.449 - (unsigned long) desc_vaddr + lcd_get_descriptors_size(vid));
6.450 -
6.451 - /* Configure DMA by setting frame descriptor addresses. */
6.452 -
6.453 - lcd_ctrl_set(vid, LCD_DA0, (uint32_t) first);
6.454 -
6.455 - if (lcd_get_panels(vid) == 2)
6.456 - lcd_ctrl_set(vid, LCD_DA1, (uint32_t) second);
6.457 -}
6.458 -
6.459 -/* Initialise the LCD registers. */
6.460 -
6.461 -void jz4740_lcd_hw_init(vidinfo_t *vid)
6.462 -{
6.463 - struct jzfb_info *jzfb = vid->jz_fb;
6.464 - uint32_t mode = vid->jz_fb->cfg & MODE_MASK;
6.465 - uint32_t val = 0;
6.466 -
6.467 - /* Compute control register flags. */
6.468 -
6.469 - switch (jzfb->bpp) {
6.470 - case 1:
6.471 - val |= LCD_CTRL_BPP_1;
6.472 - break;
6.473 -
6.474 - case 2:
6.475 - val |= LCD_CTRL_BPP_2;
6.476 - break;
6.477 -
6.478 - case 4:
6.479 - val |= LCD_CTRL_BPP_4;
6.480 - break;
6.481 -
6.482 - case 8:
6.483 - val |= LCD_CTRL_BPP_8;
6.484 - break;
6.485 -
6.486 - case 15:
6.487 - val |= LCD_CTRL_RGB555;
6.488 - case 16:
6.489 - val |= LCD_CTRL_BPP_16;
6.490 - break;
6.491 -
6.492 - case 17 ... 32:
6.493 - val |= LCD_CTRL_BPP_18_24; /* target is 4bytes/pixel */
6.494 - break;
6.495 -
6.496 - default:
6.497 - val |= LCD_CTRL_BPP_16; /* default to 16bpp */
6.498 - break;
6.499 - }
6.500 -
6.501 - /* Set various configuration registers for the panel. */
6.502 -
6.503 - switch (mode) {
6.504 - case MODE_STN_MONO_DUAL:
6.505 - case MODE_STN_COLOR_DUAL:
6.506 - val |= jz_lcd_stn_init(jzfb->h >> 1, vid);
6.507 - break;
6.508 -
6.509 - case MODE_STN_MONO_SINGLE:
6.510 - case MODE_STN_COLOR_SINGLE:
6.511 - val |= jz_lcd_stn_init(jzfb->h, vid);
6.512 - break;
6.513 -
6.514 - case MODE_TFT_GEN:
6.515 - case MODE_TFT_CASIO:
6.516 - case MODE_8BIT_SERIAL_TFT:
6.517 - case MODE_TFT_18BIT:
6.518 - jz_lcd_tft_init(vid);
6.519 - break;
6.520 -
6.521 - case MODE_TFT_SAMSUNG:
6.522 - jz_lcd_samsung_init(vid);
6.523 - break;
6.524 -
6.525 - case MODE_TFT_SHARP:
6.526 - jz_lcd_sharp_init(vid);
6.527 - break;
6.528 -
6.529 - default:
6.530 - break;
6.531 - }
6.532 -
6.533 - /* Further control register and panel configuration. */
6.534 -
6.535 - val |= LCD_CTRL_BST_16; /* Burst Length is 16WORD=64Byte */
6.536 - val |= LCD_CTRL_OFUP; /* OutFIFO underrun protect */
6.537 -
6.538 - lcd_ctrl_set(vid, LCD_CTRL, val);
6.539 - lcd_ctrl_set(vid, LCD_CFG, jzfb->cfg);
6.540 -}
6.541 -
6.542 -/* Set the colour depth. */
6.543 -
6.544 -void jz4740_lcd_set_bpp(uint8_t bpp, vidinfo_t *vid)
6.545 -{
6.546 - vid->jz_fb->bpp = bpp;
6.547 -}
6.548 -
6.549 -void jz4740_lcd_enable(vidinfo_t *vid)
6.550 -{
6.551 - /* Clear the disable bit (DIS) and set the enable bit (ENA). */
6.552 -
6.553 - lcd_ctrl_set(vid, LCD_CTRL, (lcd_ctrl_get(vid, LCD_CTRL) & ~LCD_CTRL_DIS) | LCD_CTRL_ENA);
6.554 -}
6.555 -
6.556 -void jz4740_lcd_disable(vidinfo_t *vid)
6.557 -{
6.558 - /* Set the disable bit (DIS). */
6.559 -
6.560 - lcd_ctrl_set(vid, LCD_CTRL, lcd_ctrl_get(vid, LCD_CTRL) | LCD_CTRL_DIS);
6.561 -}
6.562 -
6.563 -void jz4740_lcd_quick_disable(vidinfo_t *vid)
6.564 -{
6.565 - /* Clear the enable bit (ENA) for quick disable. */
6.566 -
6.567 - lcd_ctrl_set(vid, LCD_CTRL, lcd_ctrl_get(vid, LCD_CTRL) & ~LCD_CTRL_ENA);
6.568 -}
7.1 --- a/pkg/landfall-examples/qi_lb60_lcd/jzlcd.h Tue May 29 22:26:18 2018 +0200
7.2 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000
7.3 @@ -1,236 +0,0 @@
7.4 -/*
7.5 - * U-Boot and jz4740 LCD controller definitions.
7.6 - *
7.7 - * Copyright (C) 2001 Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7.8 - * Copyright (C) 2005-2007, Ingenic Semiconductor Inc.
7.9 - * Copyright (C) 2009 Qi Hardware Inc.
7.10 - * Author: Xiangfu Liu <xiangfu@sharism.cc>
7.11 - * Copyright (C) Xiangfu Liu <xiangfu@sharism.cc>
7.12 - * Copyright (C) 2015, 2016, 2017, 2018 Paul Boddie <paul@boddie.org.uk>
7.13 - *
7.14 - * This program is free software; you can redistribute it and/or
7.15 - * modify it under the terms of the GNU General Public License as
7.16 - * published by the Free Software Foundation; either version 2 of
7.17 - * the License, or (at your option) any later version.
7.18 - *
7.19 - * This program is distributed in the hope that it will be useful,
7.20 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
7.21 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
7.22 - * GNU General Public License for more details.
7.23 - *
7.24 - * You should have received a copy of the GNU General Public License
7.25 - * along with this program; if not, write to the Free Software
7.26 - * Foundation, Inc., 51 Franklin Street, Fifth Floor,
7.27 - * Boston, MA 02110-1301, USA
7.28 - */
7.29 -
7.30 -#ifndef __JZLCD_H__
7.31 -#define __JZLCD_H__
7.32 -
7.33 -#include <stdint.h>
7.34 -
7.35 -/* Framebuffer characteristics. */
7.36 -
7.37 -struct jzfb_info {
7.38 - uint32_t cfg; /* panel mode and pin usage etc. */
7.39 - uint32_t w; /* display width in pixels */
7.40 - uint32_t h; /* display height in pixels */
7.41 - uint32_t bpp; /* bits per pixel */
7.42 - uint32_t fclk; /* frame clock */
7.43 - uint32_t hsw; /* hsync width, in pixel clock */
7.44 - uint32_t vsw; /* vsync width, in line count */
7.45 - uint32_t elw; /* end of line, in pixel clock */
7.46 - uint32_t blw; /* begin of line, in pixel clock */
7.47 - uint32_t efw; /* end of frame, in line count */
7.48 - uint32_t bfw; /* begin of frame, in line count */
7.49 -};
7.50 -
7.51 -/* LCD controller stucture for jz4740. */
7.52 -
7.53 -struct jz_fb_dma_descriptor {
7.54 - struct jz_fb_dma_descriptor *fdadr; /* frame descriptor address register */
7.55 - uint32_t fsadr; /* frame source address register */
7.56 - uint32_t fidr; /* frame identifier register */
7.57 - uint32_t ldcmd; /* command register */
7.58 -};
7.59 -
7.60 -/* Display characteristics and memory resources. */
7.61 -
7.62 -typedef struct vidinfo {
7.63 - struct jzfb_info *jz_fb; /* framebuffer and panel properties */
7.64 - void *lcd; /* address of LCD controller registers */
7.65 -} vidinfo_t;
7.66 -
7.67 -
7.68 -
7.69 -/* Public functions. */
7.70 -
7.71 -uint32_t jz4740_lcd_get_aligned_size(vidinfo_t *vid);
7.72 -uint32_t jz4740_lcd_get_descriptors_size(vidinfo_t *vid);
7.73 -uint32_t jz4740_lcd_get_line_size(vidinfo_t *vid);
7.74 -uint32_t jz4740_lcd_get_screen_size(vidinfo_t *vid);
7.75 -uint32_t jz4740_lcd_get_pixel_clock(vidinfo_t *vid);
7.76 -
7.77 -void jz4740_lcd_set_base(vidinfo_t *vid, void *lcd_base);
7.78 -
7.79 -void jz4740_lcd_ctrl_init(
7.80 - struct jz_fb_dma_descriptor *desc_vaddr,
7.81 - struct jz_fb_dma_descriptor *desc_paddr,
7.82 - void *fb_vaddr, void *fb_paddr,
7.83 - vidinfo_t *vid);
7.84 -
7.85 -void jz4740_lcd_hw_init(vidinfo_t *vid);
7.86 -void jz4740_lcd_set_bpp(uint8_t bpp, vidinfo_t *vid);
7.87 -void jz4740_lcd_enable(vidinfo_t *vid);
7.88 -void jz4740_lcd_disable(vidinfo_t *vid);
7.89 -void jz4740_lcd_quick_disable(vidinfo_t *vid);
7.90 -
7.91 -
7.92 -
7.93 -/* Alignment/rounding macros. */
7.94 -
7.95 -#define ALIGN(x,a) __ALIGN_MASK((x),(typeof(x))(a)-1)
7.96 -#define __ALIGN_MASK(x,mask) (((x)+(mask))&~(mask))
7.97 -
7.98 -/* Display device mode select (LCD_CFG.MODE). */
7.99 -
7.100 -#define MODE_MASK 0x0f
7.101 -#define MODE_TFT_GEN 0x00
7.102 -#define MODE_TFT_SHARP 0x01
7.103 -#define MODE_TFT_CASIO 0x02
7.104 -#define MODE_TFT_SAMSUNG 0x03
7.105 -#define MODE_CCIR656_NONINT 0x04
7.106 -#define MODE_CCIR656_INT 0x05
7.107 -#define MODE_STN_COLOR_SINGLE 0x08
7.108 -#define MODE_STN_MONO_SINGLE 0x09
7.109 -#define MODE_STN_COLOR_DUAL 0x0a
7.110 -#define MODE_STN_MONO_DUAL 0x0b
7.111 -#define MODE_8BIT_SERIAL_TFT 0x0c
7.112 -
7.113 -/* 16-bit or 18-bit TFT panel selection (LCD_CFG.18/16). */
7.114 -
7.115 -#define MODE_TFT_18BIT (1<<7)
7.116 -
7.117 -/* STN pin utilisation (LCD_CFG.PDW). */
7.118 -
7.119 -#define STN_DAT_PIN1 (0x00 << 4)
7.120 -#define STN_DAT_PIN2 (0x01 << 4)
7.121 -#define STN_DAT_PIN4 (0x02 << 4)
7.122 -#define STN_DAT_PIN8 (0x03 << 4)
7.123 -#define STN_DAT_PINMASK STN_DAT_PIN8
7.124 -
7.125 -/* Pin reset states (LCD_CFG). */
7.126 -
7.127 -#define STFT_PSHI (1 << 15)
7.128 -#define STFT_CLSHI (1 << 14)
7.129 -#define STFT_SPLHI (1 << 13)
7.130 -#define STFT_REVHI (1 << 12)
7.131 -
7.132 -/* Sync direction (LCD_CFG.SYNDIR). */
7.133 -
7.134 -#define SYNC_MASTER (0 << 16)
7.135 -#define SYNC_SLAVE (1 << 16)
7.136 -
7.137 -/* Data enable polarity (LCD_CFG.DEP). */
7.138 -
7.139 -#define DE_P (0 << 9)
7.140 -#define DE_N (1 << 9)
7.141 -
7.142 -/* Pixel clock polarity (LCD_CFG.PCP). */
7.143 -
7.144 -#define PCLK_P (0 << 10)
7.145 -#define PCLK_N (1 << 10)
7.146 -
7.147 -/* Horizontal sync polarity (LCD_CFG.HSP). */
7.148 -
7.149 -#define HSYNC_P (0 << 11)
7.150 -#define HSYNC_N (1 << 11)
7.151 -
7.152 -/* Vertical sync polarity (LCD_CFG.VSP). */
7.153 -
7.154 -#define VSYNC_P (0 << 8)
7.155 -#define VSYNC_N (1 << 8)
7.156 -
7.157 -/* Inverse output data (LCD_CFG.INVDAT). */
7.158 -
7.159 -#define DATA_NORMAL (0 << 17)
7.160 -#define DATA_INVERSE (1 << 17)
7.161 -
7.162 -/* Register offsets. */
7.163 -
7.164 -#define LCD_CFG 0x00 /* LCD Configure Register */
7.165 -#define LCD_VSYNC 0x04 /* Vertical Synchronize Register */
7.166 -#define LCD_HSYNC 0x08 /* Horizontal Synchronize Register */
7.167 -#define LCD_VAT 0x0c /* Virtual Area Setting Register */
7.168 -#define LCD_DAH 0x10 /* Display Area Horizontal Start/End Point */
7.169 -#define LCD_DAV 0x14 /* Display Area Vertical Start/End Point */
7.170 -#define LCD_PS 0x18 /* PS Signal Setting */
7.171 -#define LCD_CLS 0x1c /* CLS Signal Setting */
7.172 -#define LCD_SPL 0x20 /* SPL Signal Setting */
7.173 -#define LCD_REV 0x24 /* REV Signal Setting */
7.174 -#define LCD_CTRL 0x30 /* LCD Control Register */
7.175 -#define LCD_STATE 0x34 /* LCD Status Register */
7.176 -#define LCD_IID 0x38 /* Interrupt ID Register */
7.177 -#define LCD_DA0 0x40 /* Descriptor Address Register 0 */
7.178 -#define LCD_SA0 0x44 /* Source Address Register 0 */
7.179 -#define LCD_FID0 0x48 /* Frame ID Register 0 */
7.180 -#define LCD_CMD0 0x4c /* DMA Command Register 0 */
7.181 -#define LCD_DA1 0x50 /* Descriptor Address Register 1 */
7.182 -#define LCD_SA1 0x54 /* Source Address Register 1 */
7.183 -#define LCD_FID1 0x58 /* Frame ID Register 1 */
7.184 -#define LCD_CMD1 0x5c /* DMA Command Register 1 */
7.185 -
7.186 -/* Burst length selection (LCD_CTRL.BST). */
7.187 -
7.188 -#define LCD_CTRL_BST_MASK (0x03 << 28)
7.189 -#define LCD_CTRL_BST_4 (0 << 28) /* 4-word */
7.190 -#define LCD_CTRL_BST_8 (1 << 28) /* 8-word */
7.191 -#define LCD_CTRL_BST_16 (2 << 28) /* 16-word */
7.192 -
7.193 -/* RGB mode (LCD_CTRL.RGB). */
7.194 -
7.195 -#define LCD_CTRL_RGB565 (0 << 27) /* RGB565 mode */
7.196 -#define LCD_CTRL_RGB555 (1 << 27) /* RGB555 mode */
7.197 -
7.198 -/* Output FIFO underrun protection (LCD_CTRL.OFUP). */
7.199 -
7.200 -#define LCD_CTRL_OFUP (1 << 26) /* Output FIFO underrun protection enable */
7.201 -
7.202 -/* STN FRC algorithm selection (LCD_CTRL.FRC). */
7.203 -
7.204 -#define LCD_CTRL_FRC_16 (0 << 24) /* 16 grayscale */
7.205 -#define LCD_CTRL_FRC_4 (1 << 24) /* 4 grayscale */
7.206 -#define LCD_CTRL_FRC_2 (2 << 24) /* 2 grayscale */
7.207 -#define LCD_CTRL_FRC_MASK (0x03 << 24)
7.208 -
7.209 -/* Load palette delay counter (LCD_CTRL.PDD) */
7.210 -
7.211 -#define LCD_CTRL_PDD_MASK (0xff << 16)
7.212 -
7.213 -#define LCD_CTRL_EOFM (1 << 13) /* EOF interrupt mask */
7.214 -#define LCD_CTRL_SOFM (1 << 12) /* SOF interrupt mask */
7.215 -#define LCD_CTRL_OFUM (1 << 11) /* Output FIFO underrun interrupt mask */
7.216 -#define LCD_CTRL_IFUM0 (1 << 10) /* Input FIFO 0 underrun interrupt mask */
7.217 -#define LCD_CTRL_IFUM1 (1 << 9) /* Input FIFO 1 underrun interrupt mask */
7.218 -#define LCD_CTRL_LDDM (1 << 8) /* LCD disable done interrupt mask */
7.219 -#define LCD_CTRL_QDM (1 << 7) /* LCD quick disable done interrupt mask */
7.220 -#define LCD_CTRL_BEDN (1 << 6) /* Endian selection */
7.221 -#define LCD_CTRL_PEDN (1 << 5) /* Endian in byte:0-msb first, 1-lsb first */
7.222 -#define LCD_CTRL_DIS (1 << 4) /* Disable indicate bit */
7.223 -#define LCD_CTRL_ENA (1 << 3) /* LCD enable bit */
7.224 -
7.225 -/* Bits per pixel (LCD_CTRL.BPP). */
7.226 -
7.227 -#define LCD_CTRL_BPP_1 0 /* 1 bpp */
7.228 -#define LCD_CTRL_BPP_2 1 /* 2 bpp */
7.229 -#define LCD_CTRL_BPP_4 2 /* 4 bpp */
7.230 -#define LCD_CTRL_BPP_8 3 /* 8 bpp */
7.231 -#define LCD_CTRL_BPP_16 4 /* 15/16 bpp */
7.232 -#define LCD_CTRL_BPP_18_24 5 /* 18/24/32 bpp */
7.233 -#define LCD_CTRL_BPP_MASK 0x07
7.234 -
7.235 -/* Palette buffer (LCD_CMDx.PAL). */
7.236 -
7.237 -#define LCD_CMD_PAL (1 << 28)
7.238 -
7.239 -#endif /* __JZLCD_H__ */
8.1 --- a/pkg/landfall-examples/qi_lb60_lcd/memory.c Tue May 29 22:26:18 2018 +0200
8.2 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000
8.3 @@ -1,78 +0,0 @@
8.4 -/*
8.5 - * Memory allocation utility functions.
8.6 - *
8.7 - * Copyright (C) 2018 Paul Boddie <paul@boddie.org.uk>
8.8 - *
8.9 - * This program is free software; you can redistribute it and/or
8.10 - * modify it under the terms of the GNU General Public License as
8.11 - * published by the Free Software Foundation; either version 2 of
8.12 - * the License, or (at your option) any later version.
8.13 - *
8.14 - * This program is distributed in the hope that it will be useful,
8.15 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
8.16 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
8.17 - * GNU General Public License for more details.
8.18 - *
8.19 - * You should have received a copy of the GNU General Public License
8.20 - * along with this program; if not, write to the Free Software
8.21 - * Foundation, Inc., 51 Franklin Street, Fifth Floor,
8.22 - * Boston, MA 02110-1301, USA
8.23 - */
8.24 -
8.25 -#include <l4/io/io.h>
8.26 -#include <l4/re/env.h>
8.27 -#include <l4/re/c/mem_alloc.h>
8.28 -#include <l4/re/c/util/cap_alloc.h>
8.29 -#include <l4/util/util.h>
8.30 -#include <l4/vbus/vbus.h>
8.31 -
8.32 -#include "memory.h"
8.33 -
8.34 -int get_device(char const *hid, l4io_device_handle_t *dh, l4io_resource_handle_t *rh)
8.35 -{
8.36 - return l4io_lookup_device(hid, dh, 0, rh);
8.37 -}
8.38 -
8.39 -int get_resource(l4io_device_handle_t dh, l4io_resource_t *res,
8.40 - enum l4io_resource_types_t type)
8.41 -{
8.42 - int current = 0, result = 0;
8.43 - l4_cap_idx_t vbus = l4re_env_get_cap("vbus");
8.44 -
8.45 - do
8.46 - {
8.47 - result = l4vbus_get_resource(vbus, dh, current, res);
8.48 - current++;
8.49 - }
8.50 - while ((!result) && (res->type != type));
8.51 -
8.52 - return result;
8.53 -}
8.54 -
8.55 -int get_memory(char const *hid, l4_addr_t *start, l4_addr_t *end)
8.56 -{
8.57 - l4io_device_handle_t dh;
8.58 - l4io_resource_handle_t rh;
8.59 - l4io_resource_t res;
8.60 - int result;
8.61 -
8.62 - result = get_device(hid, &dh, &rh);
8.63 -
8.64 - if (result < 0)
8.65 - return result;
8.66 -
8.67 - result = get_resource(dh, &res, L4IO_RESOURCE_MEM);
8.68 -
8.69 - if (result)
8.70 - return result;
8.71 -
8.72 - result = l4io_request_iomem(res.start, res.end - res.start + 1,
8.73 - L4IO_MEM_NONCACHED, start);
8.74 -
8.75 - if (result)
8.76 - return result;
8.77 -
8.78 - *end = *start + (res.end - res.start + 1);
8.79 -
8.80 - return 0;
8.81 -}
9.1 --- a/pkg/landfall-examples/qi_lb60_lcd/memory.h Tue May 29 22:26:18 2018 +0200
9.2 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000
9.3 @@ -1,36 +0,0 @@
9.4 -/*
9.5 - * Memory allocation utility functions.
9.6 - *
9.7 - * Copyright (C) 2018 Paul Boddie <paul@boddie.org.uk>
9.8 - *
9.9 - * This program is free software; you can redistribute it and/or
9.10 - * modify it under the terms of the GNU General Public License as
9.11 - * published by the Free Software Foundation; either version 2 of
9.12 - * the License, or (at your option) any later version.
9.13 - *
9.14 - * This program is distributed in the hope that it will be useful,
9.15 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
9.16 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9.17 - * GNU General Public License for more details.
9.18 - *
9.19 - * You should have received a copy of the GNU General Public License
9.20 - * along with this program; if not, write to the Free Software
9.21 - * Foundation, Inc., 51 Franklin Street, Fifth Floor,
9.22 - * Boston, MA 02110-1301, USA
9.23 - */
9.24 -
9.25 -#ifndef __DRIVERS_LCD_ARCH_JZ4740_MEMORY_H__
9.26 -#define __DRIVERS_LCD_ARCH_JZ4740_MEMORY_H__
9.27 -
9.28 -#include <l4/io/io.h>
9.29 -#include <l4/sys/types.h>
9.30 -
9.31 -int get_device(char const *hid, l4io_device_handle_t *dh,
9.32 - l4io_resource_handle_t *rh);
9.33 -
9.34 -int get_resource(l4io_device_handle_t dh, l4io_resource_t *res,
9.35 - enum l4io_resource_types_t type);
9.36 -
9.37 -int get_memory(char const *hid, l4_addr_t *start, l4_addr_t *end);
9.38 -
9.39 -#endif /* __DRIVERS_LCD_ARCH_JZ4740_MEMORY_H__ */
10.1 --- a/pkg/landfall-examples/qi_lb60_lcd/nanonote_gpm940b0.c Tue May 29 22:26:18 2018 +0200
10.2 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000
10.3 @@ -1,37 +0,0 @@
10.4 -/*
10.5 - * Ben NanoNote screen details.
10.6 - *
10.7 - * Copyright (C) Xiangfu Liu <xiangfu@sharism.cc>
10.8 - * Copyright (C) 2015, 2016, 2017, 2018 Paul Boddie <paul@boddie.org.uk>
10.9 - *
10.10 - * This program is free software; you can redistribute it and/or
10.11 - * modify it under the terms of the GNU General Public License as
10.12 - * published by the Free Software Foundation; either version 2 of
10.13 - * the License, or (at your option) any later version.
10.14 - *
10.15 - * This program is distributed in the hope that it will be useful,
10.16 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
10.17 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10.18 - * GNU General Public License for more details.
10.19 - *
10.20 - * You should have received a copy of the GNU General Public License
10.21 - * along with this program; if not, write to the Free Software
10.22 - * Foundation, Inc., 51 Franklin Street, Fifth Floor,
10.23 - * Boston, MA 02110-1301, USA
10.24 - */
10.25 -
10.26 -#include "jzlcd.h"
10.27 -
10.28 -struct jzfb_info nanonote_fb_info = {
10.29 - .cfg=MODE_8BIT_SERIAL_TFT | PCLK_N | HSYNC_N | VSYNC_N | DE_P,
10.30 - .w=320, .h=240, /* dimensions */
10.31 - .bpp=32, /* bits per pixel */
10.32 - .fclk=70, /* frame clock rate */
10.33 - .hsw=1, .vsw=1, /* sync widths */
10.34 - .elw=273, .blw=140, /* line limits: end/front, beginning/back porch */
10.35 - .efw=1, .bfw=20, /* frame limits: end/front, beginning/back porch */
10.36 -};
10.37 -
10.38 -vidinfo_t nanonote_panel_info = {
10.39 - .jz_fb=&nanonote_fb_info /* wrap the above */
10.40 -};
11.1 --- a/pkg/landfall-examples/qi_lb60_lcd/nanonote_gpm940b0.h Tue May 29 22:26:18 2018 +0200
11.2 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000
11.3 @@ -1,8 +0,0 @@
11.4 -#ifndef __NANONOTE_GPM940B0_H__
11.5 -#define __NANONOTE_GPM940B0_H__
11.6 -
11.7 -#include "jzlcd.h"
11.8 -
11.9 -extern vidinfo_t nanonote_panel_info;
11.10 -
11.11 -#endif /* __NANONOTE_GPM940B0_H__ */
12.1 --- a/pkg/landfall-examples/qi_lb60_lcd/qi_lb60_lcd.c Tue May 29 22:26:18 2018 +0200
12.2 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000
12.3 @@ -1,297 +0,0 @@
12.4 -/*
12.5 - * Access the LCD and related GPIOs on the Ben NanoNote.
12.6 - *
12.7 - * (c) 2017, 2018 Paul Boddie <paul@boddie.org.uk>
12.8 - *
12.9 - * This program is free software; you can redistribute it and/or
12.10 - * modify it under the terms of the GNU General Public License as
12.11 - * published by the Free Software Foundation; either version 2 of
12.12 - * the License, or (at your option) any later version.
12.13 - *
12.14 - * This program is distributed in the hope that it will be useful,
12.15 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
12.16 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12.17 - * GNU General Public License for more details.
12.18 - *
12.19 - * You should have received a copy of the GNU General Public License
12.20 - * along with this program; if not, write to the Free Software
12.21 - * Foundation, Inc., 51 Franklin Street, Fifth Floor,
12.22 - * Boston, MA 02110-1301, USA
12.23 - */
12.24 -
12.25 -#include <l4/devices/cpm-jz4740.h>
12.26 -#include <l4/devices/gpio-jz4740.h>
12.27 -#include <l4/io/io.h>
12.28 -#include <l4/re/env.h>
12.29 -#include <l4/re/c/mem_alloc.h>
12.30 -#include <l4/re/c/rm.h>
12.31 -#include <l4/re/c/util/cap_alloc.h>
12.32 -#include <l4/sys/cache.h>
12.33 -#include <l4/util/util.h>
12.34 -#include <l4/vbus/vbus.h>
12.35 -
12.36 -#include <stdio.h>
12.37 -#include <stdint.h>
12.38 -
12.39 -#include "nanonote_gpm940b0.h"
12.40 -#include "jzlcd.h"
12.41 -#include "xburst_types.h"
12.42 -#include "memory.h"
12.43 -
12.44 -enum Jz4740_lcd_gpio
12.45 -{
12.46 - Jz4740_lcd_gpio_spen = 21, /* serial command enable */
12.47 - Jz4740_lcd_gpio_spda = 22, /* serial command clock */
12.48 - Jz4740_lcd_gpio_spck = 23, /* serial command data */
12.49 -};
12.50 -
12.51 -/* Peripheral memory regions. */
12.52 -
12.53 -static l4_addr_t cpm_virt_base = 0, cpm_virt_base_end = 0;
12.54 -static l4_addr_t gpio_virt_base = 0, gpio_virt_base_end = 0;
12.55 -static l4_addr_t lcd_virt_base = 0, lcd_virt_base_end = 0;
12.56 -
12.57 -/* Device abstractions. */
12.58 -
12.59 -static void *gpio_port_c;
12.60 -static void *cpm_device = 0;
12.61 -static vidinfo_t *panel_info = 0;
12.62 -
12.63 -/* Framebuffer and descriptor regions. */
12.64 -
12.65 -static void *fb_vaddr = 0, *desc_vaddr = 0;
12.66 -static l4_addr_t fb_paddr = 0, desc_paddr = 0;
12.67 -static l4_size_t fb_size, desc_size;
12.68 -
12.69 -
12.70 -
12.71 -// Write SPI values via the LCD GPIO pins.
12.72 -
12.73 -static void spi_write_reg(uint8_t reg, uint8_t val)
12.74 -{
12.75 - uint8_t no;
12.76 - uint16_t value;
12.77 -
12.78 - jz4740_gpio_set(gpio_port_c, Jz4740_lcd_gpio_spen, 1);
12.79 - jz4740_gpio_set(gpio_port_c, Jz4740_lcd_gpio_spck, 1);
12.80 - jz4740_gpio_set(gpio_port_c, Jz4740_lcd_gpio_spda, 0);
12.81 - jz4740_gpio_set(gpio_port_c, Jz4740_lcd_gpio_spen, 0);
12.82 -
12.83 - value = ((reg << 8) | (val & 0xFF));
12.84 -
12.85 - /* Clock data using the clock and data outputs. */
12.86 -
12.87 - for (no = 0; no < 16; no++)
12.88 - {
12.89 - jz4740_gpio_set(gpio_port_c, Jz4740_lcd_gpio_spck, 0);
12.90 - jz4740_gpio_set(gpio_port_c, Jz4740_lcd_gpio_spda, value & 0x8000 ? 1 : 0);
12.91 - jz4740_gpio_set(gpio_port_c, Jz4740_lcd_gpio_spck, 1);
12.92 - value = (value << 1);
12.93 - }
12.94 -
12.95 - jz4740_gpio_set(gpio_port_c, Jz4740_lcd_gpio_spen, 1);
12.96 -}
12.97 -
12.98 -// GPIO-based operations.
12.99 -
12.100 -static void lcd_display_pin_init(void)
12.101 -{
12.102 - Pin_slice mask = {.offset=0, .mask=(1 << Jz4740_lcd_gpio_spen) | (1 << Jz4740_lcd_gpio_spck) | (1 << Jz4740_lcd_gpio_spda)};
12.103 - Pin_slice slcd8_mask = {.offset=0, .mask=0x003c00ff};
12.104 -
12.105 - /* Configure SPI pins. */
12.106 -
12.107 - jz4740_gpio_multi_setup(gpio_port_c, &mask, L4VBUS_GPIO_SETUP_OUTPUT, 0);
12.108 -
12.109 - /* Configure SLCD8 pins. */
12.110 -
12.111 - jz4740_gpio_multi_config_pad(gpio_port_c, &slcd8_mask, Function_alt, 0);
12.112 -}
12.113 -
12.114 -static void lcd_display_on(void)
12.115 -{
12.116 - spi_write_reg(0x05, 0x1e); // GRB=0 (reset); PWM_DUTY=0b011 (70%, default); SHDB2=1, SHDB1=1 (power-related); STB=0 (standby)
12.117 - spi_write_reg(0x05, 0x5e); // GRB=1 (normal operation); ...
12.118 - spi_write_reg(0x07, 0x8d); // HBLK=141 (horizontal blanking period from start of hsync pulse to data start)
12.119 - spi_write_reg(0x13, 0x01); // IN_SEL=1 (alignment mode)
12.120 - spi_write_reg(0x05, 0x5f); // ...; STB=1 (not standby)
12.121 -}
12.122 -
12.123 -/* CPM operations. */
12.124 -
12.125 -static void lcd_set_timing(vidinfo_t *vid)
12.126 -{
12.127 - uint32_t pclk = jz4740_lcd_get_pixel_clock(vid);
12.128 -
12.129 - jz4740_cpm_stop_lcd(cpm_device);
12.130 -
12.131 - /*
12.132 - Original comment: LCDClock > 2.5*Pixclock
12.133 - However, the documentation indicates that a TFT panel needs a device clock
12.134 - 1.5 times that of the pixel clock, and a STN panel needs a device clock 3
12.135 - times that of the pixel clock.
12.136 - */
12.137 -
12.138 - jz4740_cpm_set_lcd_frequencies(cpm_device, pclk, 3);
12.139 - jz4740_cpm_update_output_frequency(cpm_device);
12.140 - jz4740_cpm_start_lcd(cpm_device);
12.141 -
12.142 - l4_sleep(1); // 1ms == 1000us
12.143 -}
12.144 -
12.145 -
12.146 -
12.147 -static int setup_memory(void)
12.148 -{
12.149 - l4re_ds_t fbmem, descmem;
12.150 - l4_size_t fb_size_out, desc_size_out;
12.151 - int result = 0;
12.152 -
12.153 - if (fb_vaddr)
12.154 - return 0;
12.155 -
12.156 - if (!panel_info)
12.157 - return 1;
12.158 -
12.159 - fb_size = jz4740_lcd_get_screen_size(panel_info);
12.160 - desc_size = jz4740_lcd_get_descriptors_size(panel_info);
12.161 -
12.162 - /* Obtain resource details describing the I/O memory. */
12.163 -
12.164 - if ((result = get_memory("jz4740-cpm", &cpm_virt_base, &cpm_virt_base_end)) < 0)
12.165 - return 1;
12.166 -
12.167 - if ((result = get_memory("jz4740-lcd", &lcd_virt_base, &lcd_virt_base_end)) < 0)
12.168 - return 1;
12.169 -
12.170 - if ((result = get_memory("jz4740-gpio", &gpio_virt_base, &gpio_virt_base_end)) < 0)
12.171 - return 1;
12.172 -
12.173 - /* Set the framebuffer up. */
12.174 -
12.175 - fbmem = l4re_util_cap_alloc();
12.176 - descmem = l4re_util_cap_alloc();
12.177 -
12.178 - if (l4_is_invalid_cap(fbmem) || l4_is_invalid_cap(descmem))
12.179 - return 1;
12.180 -
12.181 - /* Allocate memory for the framebuffer at 2**6 == 64 byte == 16 word alignment,
12.182 - also for the descriptors. */
12.183 -
12.184 - if (l4re_ma_alloc_align(fb_size, fbmem, L4RE_MA_CONTINUOUS | L4RE_MA_PINNED, 6) ||
12.185 - l4re_ma_alloc_align(desc_size, descmem, L4RE_MA_CONTINUOUS | L4RE_MA_PINNED, 6))
12.186 - return 1;
12.187 -
12.188 - /* Map the allocated memory, obtaining virtual addresses. */
12.189 -
12.190 - if (l4re_rm_attach(&fb_vaddr, fb_size,
12.191 - L4RE_RM_SEARCH_ADDR | L4RE_RM_EAGER_MAP,
12.192 - fbmem, 0, L4_PAGESHIFT) ||
12.193 - l4re_rm_attach(&desc_vaddr, desc_size,
12.194 - L4RE_RM_SEARCH_ADDR | L4RE_RM_EAGER_MAP,
12.195 - descmem, 0, L4_PAGESHIFT))
12.196 - return 1;
12.197 -
12.198 - fb_size_out = fb_size;
12.199 - desc_size_out = desc_size;
12.200 -
12.201 - if (l4re_ds_phys(fbmem, 0, &fb_paddr, &fb_size_out) ||
12.202 - l4re_ds_phys(descmem, 0, &desc_paddr, &desc_size_out))
12.203 - return 1;
12.204 -
12.205 - if ((fb_size_out != fb_size) || (desc_size_out != desc_size))
12.206 - return 1;
12.207 -
12.208 - cpm_device = jz4740_cpm_init(cpm_virt_base);
12.209 - gpio_port_c = jz4740_gpio_init(gpio_virt_base + 0x200, gpio_virt_base + 0x300, 32);
12.210 -
12.211 - return 0;
12.212 -}
12.213 -
12.214 -static void enable(void)
12.215 -{
12.216 - if (setup_memory())
12.217 - return;
12.218 -
12.219 - jz4740_lcd_set_base(panel_info, (void *) lcd_virt_base);
12.220 - jz4740_lcd_disable(panel_info);
12.221 -
12.222 - // Initialise the LCD controller and structures.
12.223 -
12.224 - jz4740_lcd_ctrl_init(
12.225 - (struct jz_fb_dma_descriptor *) desc_vaddr,
12.226 - (struct jz_fb_dma_descriptor *) desc_paddr,
12.227 - fb_vaddr,
12.228 - (void *) fb_paddr,
12.229 - panel_info);
12.230 -
12.231 - // Initialise the LCD peripheral.
12.232 -
12.233 - jz4740_lcd_hw_init(panel_info);
12.234 -
12.235 - // Initialise the clocks for the LCD controller.
12.236 -
12.237 - lcd_set_timing(panel_info);
12.238 -
12.239 - // Switch the display on using GPIO operations.
12.240 -
12.241 - lcd_display_pin_init();
12.242 - lcd_display_on();
12.243 -
12.244 - // Finally, enable the peripheral.
12.245 -
12.246 - jz4740_lcd_enable(panel_info);
12.247 -}
12.248 -
12.249 -
12.250 -
12.251 -int main(void)
12.252 -{
12.253 - l4_size_t *fb;
12.254 - l4_size_t i, mask, value, onpix, offpix;
12.255 -
12.256 - /* Configure the LCD. */
12.257 -
12.258 - panel_info = &nanonote_panel_info;
12.259 - enable();
12.260 -
12.261 - fb = (l4_size_t *) fb_vaddr;
12.262 -
12.263 - /* Try and show some values. */
12.264 -
12.265 - onpix = 0xffaaffaa; offpix = 0x11551155;
12.266 - mask = 0x80000000; value = 0x80000001;
12.267 -
12.268 - i = 0;
12.269 -
12.270 - while (i < fb_size / 4)
12.271 - {
12.272 - fb[i] = value & mask ? onpix : offpix;
12.273 - i++;
12.274 -
12.275 - if ((i % 10) == 0)
12.276 - {
12.277 - if (mask == 1) mask = 0x80000000;
12.278 - else mask >>= 1;
12.279 -
12.280 - onpix = (onpix >> 8) | ((onpix & 0xff) << 24);
12.281 - offpix = (offpix >> 8) | ((offpix & 0xff) << 24);
12.282 -
12.283 - if (i == 3200) value = jz4740_cpm_get_lcd_pixel_divider(cpm_device);
12.284 - else if (i == 6400) value = jz4740_cpm_get_lcd_pixel_frequency(cpm_device);
12.285 - else if (i == 9600) value = (l4_size_t) fb_vaddr;
12.286 - else if (i == 12800) value = fb_paddr;
12.287 - else if (i == 16000) value = ((struct jz_fb_dma_descriptor *) desc_vaddr)[0].fsadr;
12.288 - else if (i == 19200) value = REG32(lcd_virt_base + 0x00);
12.289 - else if (i == 22400) value = REG32(lcd_virt_base + 0x04);
12.290 - else if (i == 25600) value = REG32(lcd_virt_base + 0x30);
12.291 - else if (i == 28800) value = REG32(lcd_virt_base + 0x40);
12.292 - }
12.293 - }
12.294 -
12.295 - l4_cache_clean_data((long unsigned int) fb_vaddr, (long unsigned int) fb_vaddr + fb_size);
12.296 -
12.297 - while (1);
12.298 -
12.299 - return 0;
12.300 -}
13.1 --- a/pkg/landfall-examples/qi_lb60_lcd/xburst_types.h Tue May 29 22:26:18 2018 +0200
13.2 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000
13.3 @@ -1,31 +0,0 @@
13.4 -/*
13.5 - * Ingenic XBurst type definitions.
13.6 - *
13.7 - * Copyright 2009 (C) Qi Hardware Inc.
13.8 - * Author: Xiangfu Liu <xiangfu@sharism.cc>
13.9 - * Copyright (C) 2017 Paul Boddie <paul@boddie.org.uk>
13.10 - *
13.11 - * This program is free software: you can redistribute it and/or modify
13.12 - * it under the terms of the GNU General Public License as published by
13.13 - * the Free Software Foundation, either version 3 of the License, or
13.14 - * (at your option) any later version.
13.15 - *
13.16 - * This program is distributed in the hope that it will be useful,
13.17 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
13.18 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13.19 - * GNU General Public License for more details.
13.20 - *
13.21 - * You should have received a copy of the GNU General Public License
13.22 - * along with this program. If not, see <http://www.gnu.org/licenses/>.
13.23 - */
13.24 -
13.25 -#ifndef __XBURST_TYPES_H__
13.26 -#define __XBURST_TYPES_H__
13.27 -
13.28 -#include <stdint.h>
13.29 -
13.30 -#define REG8(addr) *((volatile uint8_t *)(addr))
13.31 -#define REG16(addr) *((volatile uint16_t *)(addr))
13.32 -#define REG32(addr) *((volatile uint32_t *)(addr))
13.33 -
13.34 -#endif /* __XBURST_TYPES_H__ */