1.1 --- a/pkg/devices/lib/cpm/include/cpm-common.h Sun Sep 17 23:27:45 2023 +0200
1.2 +++ b/pkg/devices/lib/cpm/include/cpm-common.h Sun Sep 17 23:41:57 2023 +0200
1.3 @@ -527,15 +527,6 @@
1.4
1.5 const char *clock_type() { return "pll"; }
1.6
1.7 - // General frequency modifiers.
1.8 -
1.9 - uint32_t get_multiplier(Cpm_regs ®s);
1.10 - void set_multiplier(Cpm_regs ®s, uint32_t multiplier);
1.11 - uint32_t get_input_divider(Cpm_regs ®s);
1.12 - void set_input_divider(Cpm_regs ®s, uint32_t divider);
1.13 - uint32_t get_output_divider(Cpm_regs ®s);
1.14 - void set_output_divider(Cpm_regs ®s, uint32_t divider);
1.15 -
1.16 // Output frequency.
1.17
1.18 uint32_t get_frequency(Cpm_regs ®s);
2.1 --- a/pkg/devices/lib/cpm/src/common.cc Sun Sep 17 23:27:45 2023 +0200
2.2 +++ b/pkg/devices/lib/cpm/src/common.cc Sun Sep 17 23:41:57 2023 +0200
2.3 @@ -605,54 +605,12 @@
2.4
2.5
2.6
2.7 -// PLL boilerplate.
2.8 +// PLL functionality.
2.9
2.10 Pll::~Pll()
2.11 {
2.12 }
2.13
2.14 -// Feedback (13-bit) multiplier.
2.15 -
2.16 -uint32_t
2.17 -Pll::get_multiplier(Cpm_regs ®s)
2.18 -{
2.19 - return _divider.get_multiplier(regs);
2.20 -}
2.21 -
2.22 -void
2.23 -Pll::set_multiplier(Cpm_regs ®s, uint32_t multiplier)
2.24 -{
2.25 - _divider.set_multiplier(regs, multiplier);
2.26 -}
2.27 -
2.28 -// Input (6-bit) divider.
2.29 -
2.30 -uint32_t
2.31 -Pll::get_input_divider(Cpm_regs ®s)
2.32 -{
2.33 - return _divider.get_input_divider(regs);
2.34 -}
2.35 -
2.36 -void
2.37 -Pll::set_input_divider(Cpm_regs ®s, uint32_t divider)
2.38 -{
2.39 - _divider.set_input_divider(regs, divider);
2.40 -}
2.41 -
2.42 -// Output (dual 3-bit) dividers.
2.43 -
2.44 -uint32_t
2.45 -Pll::get_output_divider(Cpm_regs ®s)
2.46 -{
2.47 - return _divider.get_output_divider(regs);
2.48 -}
2.49 -
2.50 -void
2.51 -Pll::set_output_divider(Cpm_regs ®s, uint32_t divider)
2.52 -{
2.53 - _divider.set_output_divider(regs, divider);
2.54 -}
2.55 -
2.56 uint32_t
2.57 Pll::get_frequency(Cpm_regs ®s)
2.58 {