1.1 --- a/pkg/devices/lib/dma/include/dma-jz4780.h Fri Nov 10 22:30:03 2023 +0100
1.2 +++ b/pkg/devices/lib/dma/include/dma-jz4780.h Fri Nov 10 22:30:39 2023 +0100
1.3 @@ -105,7 +105,8 @@
1.4 l4_cap_idx_t _irq = L4_INVALID_CAP;
1.5
1.6 public:
1.7 - Dma_jz4780_channel(Dma_jz4780_chip *chip, uint8_t channel, l4_addr_t start, l4_cap_idx_t irq);
1.8 + Dma_jz4780_channel(Dma_jz4780_chip *chip, uint8_t channel, l4_addr_t start,
1.9 + l4_cap_idx_t irq = L4_INVALID_CAP);
1.10
1.11 unsigned int transfer(uint32_t source, uint32_t destination,
1.12 unsigned int count,
1.13 @@ -160,7 +161,8 @@
1.14
1.15 void enable();
1.16
1.17 - Dma_jz4780_channel *get_channel(uint8_t channel, l4_cap_idx_t irq);
1.18 + Dma_jz4780_channel *get_channel(uint8_t channel,
1.19 + l4_cap_idx_t irq = L4_INVALID_CAP);
1.20
1.21 // Transaction control.
1.22
2.1 --- a/pkg/devices/lib/dma/src/jz4780.cc Fri Nov 10 22:30:03 2023 +0100
2.2 +++ b/pkg/devices/lib/dma/src/jz4780.cc Fri Nov 10 22:30:39 2023 +0100
2.3 @@ -393,7 +393,10 @@
2.4 bool
2.5 Dma_jz4780_channel::wait_for_irq()
2.6 {
2.7 - return !l4_error(l4_irq_receive(_irq, L4_IPC_NEVER)) && _chip->have_interrupt(_channel);
2.8 + if (l4_is_valid_cap(_irq))
2.9 + return !l4_error(l4_irq_receive(_irq, L4_IPC_NEVER)) && _chip->have_interrupt(_channel);
2.10 + else
2.11 + return true;
2.12 }
2.13
2.14 // Wait up to the given timeout (in microseconds) for an interrupt request,
2.15 @@ -402,7 +405,10 @@
2.16 bool
2.17 Dma_jz4780_channel::wait_for_irq(unsigned int timeout)
2.18 {
2.19 - return !l4_error(l4_irq_receive(_irq, l4_timeout(L4_IPC_TIMEOUT_NEVER, l4util_micros2l4to(timeout)))) && _chip->have_interrupt(_channel);
2.20 + if (l4_is_valid_cap(_irq))
2.21 + return !l4_error(l4_irq_receive(_irq, l4_timeout(L4_IPC_TIMEOUT_NEVER, l4util_micros2l4to(timeout)))) && _chip->have_interrupt(_channel);
2.22 + else
2.23 + return true;
2.24 }
2.25
2.26 // Acknowledge an interrupt condition.