1.1 --- a/pkg/devices/lib/aic/include/aic-x1600.h Fri Nov 03 18:09:49 2023 +0100
1.2 +++ b/pkg/devices/lib/aic/include/aic-x1600.h Fri Nov 03 19:58:11 2023 +0100
1.3 @@ -33,7 +33,7 @@
1.4 #include <l4/devices/dma-x1600.h>
1.5 #include <l4/devices/hw_mmio_register_block.h>
1.6
1.7 -// AIC channel.
1.8 +/* AIC channel. */
1.9
1.10 class Aic_x1600_channel
1.11 {
1.12 @@ -44,7 +44,7 @@
1.13 Cpm_x1600_chip *_cpm;
1.14 Dma_x1600_channel *_dma;
1.15
1.16 - // Buffer management.
1.17 + /* Buffer management. */
1.18
1.19 unsigned int _size = 0;
1.20 l4_addr_t _vaddr = 0;
1.21 @@ -52,14 +52,14 @@
1.22 l4_cap_idx_t _mem = L4_INVALID_CAP;
1.23
1.24 public:
1.25 - Aic_x1600_channel(l4_addr_t aic_start, l4_addr_t start,
1.26 - enum Clock_identifiers clock_rx,
1.27 - enum Clock_identifiers clock_tx,
1.28 - Cpm_x1600_chip *cpm,
1.29 - Dma_x1600_channel *dma);
1.30 + explicit Aic_x1600_channel(l4_addr_t aic_start, l4_addr_t start,
1.31 + enum Clock_identifiers clock_rx,
1.32 + enum Clock_identifiers clock_tx,
1.33 + Cpm_x1600_chip *cpm,
1.34 + Dma_x1600_channel *dma);
1.35
1.36 long get_buffer(uint32_t count, l4_addr_t *addr);
1.37 - unsigned int transfer(uint32_t count, uint32_t sample_rate, uint8_t sample_size);
1.38 + uint32_t transfer(uint32_t count, uint32_t sample_rate, uint8_t sample_size);
1.39
1.40 private:
1.41 void disable();
1.42 @@ -73,7 +73,7 @@
1.43 void set_trans_frequency(uint32_t sample_rate);
1.44 };
1.45
1.46 -// AIC device control.
1.47 +/* AIC device control. */
1.48
1.49 class Aic_x1600_chip
1.50 {
1.51 @@ -82,7 +82,8 @@
1.52 Cpm_x1600_chip *_cpm;
1.53
1.54 public:
1.55 - Aic_x1600_chip(l4_addr_t aic_start, l4_addr_t start, l4_addr_t end, Cpm_x1600_chip *cpm);
1.56 + explicit Aic_x1600_chip(l4_addr_t aic_start, l4_addr_t start, l4_addr_t end,
1.57 + Cpm_x1600_chip *cpm);
1.58
1.59 Aic_x1600_channel *get_channel(uint8_t channel, Dma_x1600_channel *dma);
1.60 };
1.61 @@ -101,6 +102,6 @@
1.62
1.63 long x1600_aic_get_buffer(void *channel, uint32_t count, l4_addr_t *addr);
1.64
1.65 -unsigned int x1600_aic_transfer(void *channel, uint32_t count, uint32_t sample_rate, uint8_t sample_size);
1.66 +uint32_t x1600_aic_transfer(void *channel, uint32_t count, uint32_t sample_rate, uint8_t sample_size);
1.67
1.68 EXTERN_C_END
2.1 --- a/pkg/devices/lib/aic/src/x1600.cc Fri Nov 03 18:09:49 2023 +0100
2.2 +++ b/pkg/devices/lib/aic/src/x1600.cc Fri Nov 03 19:58:11 2023 +0100
2.3 @@ -21,12 +21,11 @@
2.4
2.5 #include <l4/devices/aic-x1600.h>
2.6 #include <l4/devices/dma.h>
2.7 -#include <l4/devices/hw_mmio_register_block.h>
2.8 +#include <l4/sys/err.h>
2.9 +
2.10
2.11 -#include <l4/sys/icu.h>
2.12 -#include <l4/util/util.h>
2.13
2.14 -#include <stdio.h>
2.15 +/* Register definitions. */
2.16
2.17 enum Regs
2.18 {
2.19 @@ -52,9 +51,12 @@
2.20 Aic_tmaster = 0x0004, // TMASTER
2.21 Aic_rmaster = 0x0002, // RMASTER
2.22 Aic_enable = 0x0001, // ENB
2.23 +};
2.24
2.25 - Aic_rfifo_thold_bit = 24, // RFTH
2.26 - Aic_tfifo_thold_bit = 16, // TFTH
2.27 +enum Aic_config_shifts : unsigned
2.28 +{
2.29 + Aic_rfifo_thold_shift = 24, // RFTH
2.30 + Aic_tfifo_thold_shift = 16, // TFTH
2.31 };
2.32
2.33 enum Aic_fifo_limits : unsigned
2.34 @@ -126,10 +128,13 @@
2.35 Aic_tfifo_request = 0x08, // TFS
2.36 Aic_tfifo_loop_overrun = 0x04, // TFLOR
2.37 Aic_tfifo_loop_request = 0x02, // TFLS
2.38 +};
2.39
2.40 - Aic_rfifo_level_bit = 24, // RFL
2.41 - Aic_tfifo_loop_level_bit = 15, // TFLL
2.42 - Aic_tfifo_level_bit = 8, // TFL
2.43 +enum Aic_fifo_status_shifts : unsigned
2.44 +{
2.45 + Aic_rfifo_level_shift = 24, // RFL
2.46 + Aic_tfifo_loop_level_shift = 15, // TFLL
2.47 + Aic_tfifo_level_shift = 8, // TFL
2.48 };
2.49
2.50 enum Aic_i2s_msb_status_bits : unsigned
2.51 @@ -144,9 +149,12 @@
2.52 {
2.53 Aic_recv_divider_mask = 0x1ff0000, // RDIV
2.54 Aic_trans_divider_mask = 0x00001ff, // TDIV
2.55 +};
2.56
2.57 - Aic_recv_divider_bit = 16, // RDIV
2.58 - Aic_trans_divider_bit = 0, // TDIV
2.59 +enum Aic_i2s_msb_divider_shifts : unsigned
2.60 +{
2.61 + Aic_recv_divider_shift = 16, // RDIV
2.62 + Aic_trans_divider_shift = 0, // TDIV
2.63 };
2.64
2.65 enum Aic_i2s_msb_divider_limits : unsigned
2.66 @@ -172,7 +180,7 @@
2.67
2.68
2.69
2.70 -// Initialise a channel.
2.71 +/* Initialise a channel. */
2.72
2.73 Aic_x1600_channel::Aic_x1600_channel(l4_addr_t aic_start, l4_addr_t start,
2.74 enum Clock_identifiers clock_rx,
2.75 @@ -220,14 +228,10 @@
2.76 {
2.77 // NOTE: Setting transmit request threshold to 31 (15 * 2 + 1).
2.78
2.79 - printf("config = %08x\n", (uint32_t) _regs[Aic_config]);
2.80 -
2.81 _regs[Aic_config] = Aic_shared_clock | Aic_select_i2s_msb | Aic_reset |
2.82 - Aic_tmaster | Aic_enable | (15 << Aic_tfifo_thold_bit);
2.83 + Aic_tmaster | Aic_enable | (15 << Aic_tfifo_thold_shift);
2.84
2.85 _regs[Aic_i2s_msb_control] = Aic_select_i2s;
2.86 -
2.87 - printf("config = %08x\n", (uint32_t) _regs[Aic_config]);
2.88 }
2.89
2.90 /*
2.91 @@ -254,19 +258,14 @@
2.92 Aic_x1600_channel::set_recv_frequency(uint32_t sample_rate)
2.93 {
2.94 set_divider(_cpm->get_frequency(_clock_rx) / (sample_rate * 32 * 2),
2.95 - Aic_recv_divider_mask, Aic_recv_divider_limit, Aic_recv_divider_bit);
2.96 + Aic_recv_divider_mask, Aic_recv_divider_limit, Aic_recv_divider_shift);
2.97 }
2.98
2.99 void
2.100 Aic_x1600_channel::set_trans_frequency(uint32_t sample_rate)
2.101 {
2.102 - printf("tx %d / (freq %d * %d * 2) = %d vs. %d\n", _cpm->get_frequency(_clock_tx),
2.103 - sample_rate, 32,
2.104 - _cpm->get_frequency(_clock_tx) / (sample_rate * 32 * 2),
2.105 - Aic_trans_divider_limit);
2.106 -
2.107 set_divider(_cpm->get_frequency(_clock_tx) / (sample_rate * 32 * 2),
2.108 - Aic_trans_divider_mask, Aic_trans_divider_limit, Aic_trans_divider_bit);
2.109 + Aic_trans_divider_mask, Aic_trans_divider_limit, Aic_trans_divider_shift);
2.110 }
2.111
2.112 uint32_t
2.113 @@ -313,12 +312,11 @@
2.114 }
2.115 }
2.116
2.117 -// Obtain a DMA-accessible buffer for sample transfers.
2.118 +/* Obtain a DMA-accessible buffer for sample transfers. */
2.119
2.120 long
2.121 Aic_x1600_channel::get_buffer(uint32_t count, l4_addr_t *addr)
2.122 {
2.123 - printf("get_buffer(%d)\n", count);
2.124 long err = get_dma_region(count, 8, &_vaddr, &_paddr, &_mem);
2.125
2.126 if (err)
2.127 @@ -328,18 +326,15 @@
2.128
2.129 _size = count;
2.130 *addr = _vaddr;
2.131 - printf("size = %d\n", _size);
2.132 return L4_EOK;
2.133 }
2.134
2.135 -// Transfer a sample using the given byte count (total sample size), sample rate
2.136 -// (or frequency), sample unit size (or resolution, width).
2.137 +/* Transfer a sample using the given byte count (total sample size), sample rate
2.138 + (or frequency), sample unit size (or resolution, width). */
2.139
2.140 -unsigned int
2.141 +uint32_t
2.142 Aic_x1600_channel::transfer(uint32_t count, uint32_t sample_rate, uint8_t sample_size)
2.143 {
2.144 - printf("transfer(%d, %d, %d)\n", count, sample_rate, sample_size);
2.145 -
2.146 if (count > _size)
2.147 return 0;
2.148
2.149 @@ -373,38 +368,24 @@
2.150 Aic_enable_trans_dma |
2.151 Aic_enable_playback;
2.152
2.153 - printf("control = %08x\n", (uint32_t) _regs[Aic_control]);
2.154 - printf("config = %08x\n", (uint32_t) _regs[Aic_config]);
2.155 - printf("divider = %d\n", (uint32_t) _regs[Aic_i2s_msb_divider]);
2.156 - printf("status = %08x\n", (uint32_t) _regs[Aic_i2s_msb_status]);
2.157 - printf("fifo = %08x\n", (uint32_t) _regs[Aic_fifo_status]);
2.158 -
2.159 - // Transfer from the allocated region to the FIFO. Use an incrementing source
2.160 - // address with source width, destination width and transfer unit reflecting
2.161 - // the sample size, and with transfers initiated by an empty AIC transmit
2.162 - // FIFO.
2.163 -
2.164 - printf("transfer from %llx to %lx\n", _paddr, _aic_start + Aic_fifo_data);
2.165 + /* Transfer from the allocated region to the FIFO. Use an incrementing source
2.166 + address with source width, destination width and transfer unit reflecting
2.167 + the sample size, and with transfers initiated by an empty AIC transmit
2.168 + FIFO. */
2.169
2.170 - unsigned int sample_unit = (sample_size == 8) ? 1 :
2.171 - (sample_size == 16) ? 2 :
2.172 - 4;
2.173 - unsigned int unit_count = count / sample_unit;
2.174 + uint32_t sample_unit = (sample_size == 8) ? 1 : (sample_size == 16) ? 2 : 4;
2.175 + uint32_t unit_count = count / sample_unit;
2.176 + uint32_t to_transfer = _dma->transfer(_paddr,
2.177 + _aic_start + Aic_fifo_data,
2.178 + unit_count,
2.179 + true,
2.180 + false,
2.181 + sample_unit,
2.182 + sample_unit,
2.183 + sample_unit,
2.184 + Dma_request_aic_out);
2.185
2.186 - unsigned int to_transfer = _dma->transfer(_paddr,
2.187 - _aic_start + Aic_fifo_data,
2.188 - unit_count,
2.189 - true,
2.190 - false,
2.191 - sample_unit,
2.192 - sample_unit,
2.193 - sample_unit,
2.194 - Dma_request_aic_out);
2.195 -
2.196 - printf("status = %08x\n", (uint32_t) _regs[Aic_i2s_msb_status]);
2.197 - printf("fifo = %08x\n", (uint32_t) _regs[Aic_fifo_status]);
2.198 -
2.199 - unsigned int transferred = 0;
2.200 + uint32_t transferred = 0;
2.201
2.202 if (to_transfer)
2.203 transferred = to_transfer ? (unit_count - _dma->wait()) * sample_unit : 0;
2.204 @@ -460,7 +441,7 @@
2.205 return static_cast<Aic_x1600_channel *>(channel)->get_buffer(count, addr);
2.206 }
2.207
2.208 -unsigned int x1600_aic_transfer(void *channel, uint32_t count, uint32_t sample_rate, uint8_t sample_size)
2.209 +uint32_t x1600_aic_transfer(void *channel, uint32_t count, uint32_t sample_rate, uint8_t sample_size)
2.210 {
2.211 return static_cast<Aic_x1600_channel *>(channel)->transfer(count, sample_rate, sample_size);
2.212 }