paul@33 | 1 | /* |
paul@38 | 2 | * JzRISC LCD controller |
paul@33 | 3 | * |
paul@33 | 4 | * Copyright (C) Xiangfu Liu <xiangfu@sharism.cc> |
paul@93 | 5 | * Copyright (C) 2015, 2016 Paul Boddie <paul@boddie.org.uk> |
paul@33 | 6 | * |
paul@33 | 7 | * This program is free software; you can redistribute it and/or |
paul@33 | 8 | * modify it under the terms of the GNU General Public License as |
paul@33 | 9 | * published by the Free Software Foundation; either version 2 of |
paul@33 | 10 | * the License, or (at your option) any later version. |
paul@33 | 11 | * |
paul@33 | 12 | * This program is distributed in the hope that it will be useful, |
paul@33 | 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
paul@33 | 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
paul@33 | 15 | * GNU General Public License for more details. |
paul@33 | 16 | * |
paul@33 | 17 | * You should have received a copy of the GNU General Public License |
paul@33 | 18 | * along with this program; if not, write to the Free Software |
paul@42 | 19 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, |
paul@42 | 20 | * Boston, MA 02110-1301, USA |
paul@33 | 21 | */ |
paul@33 | 22 | |
paul@33 | 23 | #include "sdram.h" |
paul@33 | 24 | #include "jzlcd.h" |
paul@62 | 25 | #include "cpu.h" |
paul@33 | 26 | #include "board.h" |
paul@33 | 27 | |
paul@33 | 28 | #define align2(n) (n)=((((n)+1)>>1)<<1) |
paul@33 | 29 | #define align4(n) (n)=((((n)+3)>>2)<<2) |
paul@33 | 30 | #define align8(n) (n)=((((n)+7)>>3)<<3) |
paul@33 | 31 | |
paul@33 | 32 | extern struct jzfb_info jzfb; |
paul@34 | 33 | extern vidinfo_t panel_info; |
paul@33 | 34 | |
paul@100 | 35 | static unsigned short lcd_get_panels() |
paul@100 | 36 | { |
paul@100 | 37 | return ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL) || |
paul@100 | 38 | ((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL) ? 2 : 1; |
paul@100 | 39 | } |
paul@100 | 40 | |
paul@93 | 41 | static unsigned long lcd_get_size(vidinfo_t *vid) |
paul@33 | 42 | { |
paul@100 | 43 | /* Lines must be aligned to a word boundary. */ |
paul@100 | 44 | unsigned long line_length = ALIGN((vid->vl_col * NBITS(vid->vl_bpix)) / 8, sizeof(u32)); |
paul@93 | 45 | return line_length * vid->vl_row; |
paul@33 | 46 | } |
paul@33 | 47 | |
paul@100 | 48 | static unsigned long lcd_get_aligned_size(vidinfo_t *vid) |
paul@100 | 49 | { |
paul@100 | 50 | /* LCD_CTRL_BST_16 requires 16-word alignment. */ |
paul@100 | 51 | return ALIGN(lcd_get_size(vid), 16 * sizeof(u32)); |
paul@100 | 52 | } |
paul@100 | 53 | |
paul@100 | 54 | static unsigned long lcd_get_min_size(vidinfo_t *vid) |
paul@100 | 55 | { |
paul@100 | 56 | /* Lines must be aligned to a word boundary. */ |
paul@100 | 57 | unsigned long line_length = ALIGN((vid->vl_col * 32) / 8, sizeof(u32)); |
paul@100 | 58 | return line_length * vid->vl_row; |
paul@100 | 59 | } |
paul@100 | 60 | |
paul@100 | 61 | static unsigned long lcd_get_aligned_min_size(vidinfo_t *vid) |
paul@100 | 62 | { |
paul@100 | 63 | /* LCD_CTRL_BST_16 requires 16-word alignment. */ |
paul@100 | 64 | return ALIGN(lcd_get_min_size(vid), 16 * sizeof(u32)); |
paul@100 | 65 | } |
paul@100 | 66 | |
paul@98 | 67 | static unsigned long lcd_get_palette_size() |
paul@97 | 68 | { |
paul@97 | 69 | return 256 * sizeof(u16); |
paul@97 | 70 | } |
paul@97 | 71 | |
paul@100 | 72 | static unsigned long lcd_get_aligned_palette_size() |
paul@100 | 73 | { |
paul@100 | 74 | /* LCD_CTRL_BST_16 requires 16-word alignment. */ |
paul@100 | 75 | return ALIGN(lcd_get_palette_size(), 16 * sizeof(u32)); |
paul@100 | 76 | } |
paul@100 | 77 | |
paul@98 | 78 | static unsigned long lcd_get_descriptors_size() |
paul@98 | 79 | { |
paul@98 | 80 | return 3 * sizeof(struct jz_fb_dma_descriptor); |
paul@98 | 81 | } |
paul@98 | 82 | |
paul@100 | 83 | static unsigned long lcd_get_total_size(vidinfo_t *vid) |
paul@97 | 84 | { |
paul@100 | 85 | unsigned long size = lcd_get_aligned_size(vid) * lcd_get_panels(); |
paul@100 | 86 | unsigned long min_size = lcd_get_aligned_min_size(vid); |
paul@100 | 87 | |
paul@100 | 88 | /* Round up to nearest full page, or MMU section if defined. */ |
paul@100 | 89 | return ALIGN((size >= min_size ? size : min_size) + lcd_get_aligned_palette_size() + lcd_get_descriptors_size(), PAGE_SIZE); |
paul@93 | 90 | } |
paul@48 | 91 | |
paul@97 | 92 | static unsigned long lcd_get_palette(unsigned long addr) |
paul@93 | 93 | { |
paul@98 | 94 | /* Allocate memory at the end of the region for the palette. */ |
paul@100 | 95 | return addr - lcd_get_aligned_palette_size(); |
paul@98 | 96 | } |
paul@98 | 97 | |
paul@98 | 98 | static unsigned long lcd_get_descriptors(unsigned long addr) |
paul@98 | 99 | { |
paul@98 | 100 | /* Allocate memory before the palette for the descriptor array. */ |
paul@100 | 101 | return lcd_get_palette(addr) - lcd_get_descriptors_size(); |
paul@48 | 102 | } |
paul@48 | 103 | |
paul@100 | 104 | static unsigned long lcd_get_framebuffer(unsigned long addr, unsigned short panel) |
paul@97 | 105 | { |
paul@97 | 106 | /* Allocate pages for the frame buffer and palette. */ |
paul@100 | 107 | return addr - lcd_get_total_size(&panel_info) + (panel * lcd_get_aligned_size(&panel_info)); |
paul@97 | 108 | } |
paul@97 | 109 | |
paul@33 | 110 | static void jz_lcd_desc_init(vidinfo_t *vid) |
paul@33 | 111 | { |
paul@94 | 112 | struct jz_fb_dma_descriptor *descriptors; |
paul@33 | 113 | struct jz_fb_info * fbi; |
paul@95 | 114 | |
paul@33 | 115 | fbi = &vid->jz_fb; |
paul@96 | 116 | |
paul@96 | 117 | /* Allocate space for descriptors before the palette entries. */ |
paul@96 | 118 | |
paul@98 | 119 | descriptors = (struct jz_fb_dma_descriptor *) lcd_get_descriptors(get_memory_size()); |
paul@94 | 120 | fbi->dmadesc_fblow = (struct jz_fb_dma_descriptor *) &descriptors[0]; |
paul@94 | 121 | fbi->dmadesc_fbhigh = (struct jz_fb_dma_descriptor *) &descriptors[1]; |
paul@94 | 122 | fbi->dmadesc_palette = (struct jz_fb_dma_descriptor *) &descriptors[2]; |
paul@33 | 123 | |
paul@96 | 124 | /* Populate descriptors. */ |
paul@96 | 125 | |
paul@100 | 126 | if (lcd_get_panels() == 2) |
paul@100 | 127 | { |
paul@100 | 128 | fbi->dmadesc_fblow->fdadr = fbi->dmadesc_fblow; |
paul@100 | 129 | fbi->dmadesc_fblow->fsadr = lcd_get_framebuffer(get_memory_size(), 1); |
paul@100 | 130 | fbi->dmadesc_fblow->fidr = 0; |
paul@100 | 131 | fbi->dmadesc_fblow->ldcmd = lcd_get_size(vid) / 4 ; |
paul@33 | 132 | |
paul@100 | 133 | fbi->fdadr1 = fbi->dmadesc_fblow; /* only used in dual-panel mode */ |
paul@100 | 134 | } |
paul@33 | 135 | |
paul@95 | 136 | fbi->dmadesc_fbhigh->fsadr = fbi->screen; |
paul@33 | 137 | fbi->dmadesc_fbhigh->fidr = 0; |
paul@100 | 138 | fbi->dmadesc_fbhigh->ldcmd = lcd_get_size(vid) / 4; /* length in words */ |
paul@33 | 139 | |
paul@100 | 140 | if (NBITS(vid->vl_bpix) < 12) |
paul@33 | 141 | { |
paul@101 | 142 | fbi->dmadesc_palette->fsadr = fbi->palette; |
paul@101 | 143 | fbi->dmadesc_palette->fidr = 0; |
paul@101 | 144 | fbi->dmadesc_palette->ldcmd = (lcd_get_palette_size() / 4) | (1<<28); |
paul@101 | 145 | |
paul@33 | 146 | /* assume any mode with <12 bpp is palette driven */ |
paul@95 | 147 | fbi->dmadesc_palette->fdadr = fbi->dmadesc_fbhigh; |
paul@95 | 148 | fbi->dmadesc_fbhigh->fdadr = fbi->dmadesc_palette; |
paul@33 | 149 | /* flips back and forth between pal and fbhigh */ |
paul@95 | 150 | fbi->fdadr0 = fbi->dmadesc_palette; |
paul@33 | 151 | } else { |
paul@33 | 152 | /* palette shouldn't be loaded in true-color mode */ |
paul@95 | 153 | fbi->dmadesc_fbhigh->fdadr = fbi->dmadesc_fbhigh; |
paul@95 | 154 | fbi->fdadr0 = fbi->dmadesc_fbhigh; /* no pal just fbhigh */ |
paul@33 | 155 | } |
paul@33 | 156 | |
paul@33 | 157 | flush_cache_all(); |
paul@33 | 158 | } |
paul@33 | 159 | |
paul@101 | 160 | static inline u16 rgb8_to_rgb16(u8 rgb) |
paul@101 | 161 | { |
paul@101 | 162 | return ((rgb & 0xe0) << 8) | ((rgb & 0x1c) << 6) | ((rgb & 0x03) << 3); |
paul@101 | 163 | } |
paul@101 | 164 | |
paul@101 | 165 | static void lcd_init_palette() |
paul@101 | 166 | { |
paul@101 | 167 | u16 *palette = (u16 *) lcd_get_palette(get_memory_size()); |
paul@101 | 168 | u16 *end = (u16 *) ((unsigned long) palette + lcd_get_palette_size()); |
paul@101 | 169 | u16 value = 0; |
paul@101 | 170 | |
paul@101 | 171 | while (palette < end) |
paul@101 | 172 | { |
paul@101 | 173 | *palette = rgb8_to_rgb16(value); |
paul@101 | 174 | value++; |
paul@101 | 175 | palette++; |
paul@101 | 176 | } |
paul@101 | 177 | } |
paul@101 | 178 | |
paul@96 | 179 | static unsigned int jz_lcd_stn_init(unsigned int stnH) |
paul@96 | 180 | { |
paul@96 | 181 | unsigned int val = 0; |
paul@96 | 182 | |
paul@96 | 183 | switch (jzfb.bpp) { |
paul@96 | 184 | case 1: |
paul@96 | 185 | /* val |= LCD_CTRL_PEDN; */ |
paul@96 | 186 | case 2: |
paul@96 | 187 | val |= LCD_CTRL_FRC_2; |
paul@96 | 188 | break; |
paul@96 | 189 | case 4: |
paul@96 | 190 | val |= LCD_CTRL_FRC_4; |
paul@96 | 191 | break; |
paul@96 | 192 | case 8: |
paul@96 | 193 | default: |
paul@96 | 194 | val |= LCD_CTRL_FRC_16; |
paul@96 | 195 | break; |
paul@96 | 196 | } |
paul@96 | 197 | |
paul@96 | 198 | switch (jzfb.cfg & STN_DAT_PINMASK) { |
paul@96 | 199 | case STN_DAT_PIN1: |
paul@96 | 200 | /* Do not adjust the hori-param value. */ |
paul@96 | 201 | break; |
paul@96 | 202 | case STN_DAT_PIN2: |
paul@96 | 203 | align2(jzfb.hsw); |
paul@96 | 204 | align2(jzfb.elw); |
paul@96 | 205 | align2(jzfb.blw); |
paul@96 | 206 | break; |
paul@96 | 207 | case STN_DAT_PIN4: |
paul@96 | 208 | align4(jzfb.hsw); |
paul@96 | 209 | align4(jzfb.elw); |
paul@96 | 210 | align4(jzfb.blw); |
paul@96 | 211 | break; |
paul@96 | 212 | case STN_DAT_PIN8: |
paul@96 | 213 | align8(jzfb.hsw); |
paul@96 | 214 | align8(jzfb.elw); |
paul@96 | 215 | align8(jzfb.blw); |
paul@96 | 216 | break; |
paul@96 | 217 | } |
paul@96 | 218 | |
paul@96 | 219 | REG_LCD_VSYNC = (0 << 16) | jzfb.vsw; |
paul@96 | 220 | REG_LCD_HSYNC = ((jzfb.blw+jzfb.w) << 16) | (jzfb.blw+jzfb.w+jzfb.hsw); |
paul@96 | 221 | |
paul@96 | 222 | /* Screen setting */ |
paul@96 | 223 | REG_LCD_VAT = ((jzfb.blw + jzfb.w + jzfb.hsw + jzfb.elw) << 16) | (stnH + jzfb.vsw + jzfb.bfw + jzfb.efw); |
paul@96 | 224 | REG_LCD_DAH = (jzfb.blw << 16) | (jzfb.blw + jzfb.w); |
paul@96 | 225 | REG_LCD_DAV = (0 << 16) | (stnH); |
paul@96 | 226 | |
paul@96 | 227 | /* AC BIAs signal */ |
paul@96 | 228 | REG_LCD_PS = (0 << 16) | (stnH+jzfb.vsw+jzfb.efw+jzfb.bfw); |
paul@96 | 229 | |
paul@96 | 230 | return val; |
paul@96 | 231 | } |
paul@96 | 232 | |
paul@96 | 233 | static void jz_lcd_tft_init() |
paul@96 | 234 | { |
paul@96 | 235 | REG_LCD_VSYNC = (0 << 16) | jzfb.vsw; |
paul@96 | 236 | REG_LCD_HSYNC = (0 << 16) | jzfb.hsw; |
paul@96 | 237 | REG_LCD_DAV =((jzfb.vsw+jzfb.bfw) << 16) | (jzfb.vsw +jzfb.bfw+jzfb.h); |
paul@96 | 238 | REG_LCD_DAH = ((jzfb.hsw + jzfb.blw) << 16) | (jzfb.hsw + jzfb.blw + jzfb.w ); |
paul@96 | 239 | REG_LCD_VAT = (((jzfb.blw + jzfb.w + jzfb.elw + jzfb.hsw)) << 16) \ |
paul@96 | 240 | | (jzfb.vsw + jzfb.bfw + jzfb.h + jzfb.efw); |
paul@96 | 241 | } |
paul@96 | 242 | |
paul@98 | 243 | static unsigned int jz_lcd_get_pixel_clock() |
paul@98 | 244 | { |
paul@98 | 245 | unsigned int pclk; |
paul@98 | 246 | |
paul@98 | 247 | /* Derive pixel clock from frame clock. */ |
paul@98 | 248 | |
paul@98 | 249 | if ( (jzfb.cfg & MODE_MASK) != MODE_8BIT_SERIAL_TFT) { |
paul@98 | 250 | pclk = jzfb.fclk * (jzfb.w + jzfb.hsw + jzfb.elw + jzfb.blw) * |
paul@98 | 251 | (jzfb.h + jzfb.vsw + jzfb.efw + jzfb.bfw); |
paul@98 | 252 | } else { |
paul@98 | 253 | /* serial mode: Hsync period = 3*Width_Pixel */ |
paul@98 | 254 | pclk = jzfb.fclk * (jzfb.w*3 + jzfb.hsw + jzfb.elw + jzfb.blw) * |
paul@98 | 255 | (jzfb.h + jzfb.vsw + jzfb.efw + jzfb.bfw); |
paul@98 | 256 | } |
paul@98 | 257 | |
paul@98 | 258 | if (((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_SINGLE) || |
paul@98 | 259 | ((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL)) |
paul@98 | 260 | pclk = (pclk * 3); |
paul@98 | 261 | |
paul@98 | 262 | if (((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_SINGLE) || |
paul@98 | 263 | ((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL) || |
paul@98 | 264 | ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_SINGLE) || |
paul@98 | 265 | ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL)) |
paul@98 | 266 | pclk = pclk >> ((jzfb.cfg & STN_DAT_PINMASK) >> 4); |
paul@98 | 267 | |
paul@98 | 268 | if (((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL) || |
paul@98 | 269 | ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL)) |
paul@98 | 270 | pclk >>= 1; |
paul@98 | 271 | |
paul@98 | 272 | return pclk; |
paul@98 | 273 | } |
paul@98 | 274 | |
paul@98 | 275 | static void jz_lcd_set_timing(unsigned int pclk) |
paul@98 | 276 | { |
paul@98 | 277 | unsigned int val; |
paul@98 | 278 | |
paul@98 | 279 | #ifdef CONFIG_CPU_JZ4730 |
paul@98 | 280 | val = __cpm_get_pllout() / pclk; |
paul@98 | 281 | REG_CPM_CFCR2 = val - 1; |
paul@98 | 282 | val = pclk * 4 ; |
paul@98 | 283 | if ( val > 150000000 ) { |
paul@98 | 284 | val = 150000000; |
paul@98 | 285 | } |
paul@98 | 286 | val = __cpm_get_pllout() / val; |
paul@98 | 287 | val--; |
paul@98 | 288 | if ( val > 0xF ) |
paul@98 | 289 | val = 0xF; |
paul@98 | 290 | #else |
paul@98 | 291 | int pll_div; |
paul@98 | 292 | |
paul@98 | 293 | pll_div = ( REG_CPM_CPCCR & CPM_CPCCR_PCS ); /* clock source,0:pllout/2 1: pllout */ |
paul@98 | 294 | pll_div = pll_div ? 1 : 2 ; |
paul@98 | 295 | val = ( __cpm_get_pllout()/pll_div ) / pclk; |
paul@98 | 296 | val--; |
paul@98 | 297 | if ( val > 0x1ff ) { |
paul@98 | 298 | val = 0x1ff; |
paul@98 | 299 | } |
paul@98 | 300 | __cpm_set_pixdiv(val); |
paul@98 | 301 | |
paul@98 | 302 | val = pclk * 3 ; /* LCDClock > 2.5*Pixclock */ |
paul@98 | 303 | if ( val > 150000000 ) { |
paul@98 | 304 | val = 150000000; |
paul@98 | 305 | } |
paul@98 | 306 | val = ( __cpm_get_pllout()/pll_div ) / val; |
paul@98 | 307 | val--; |
paul@98 | 308 | if ( val > 0x1f ) { |
paul@98 | 309 | val = 0x1f; |
paul@98 | 310 | } |
paul@98 | 311 | #endif |
paul@98 | 312 | __cpm_set_ldiv( val ); |
paul@98 | 313 | REG_CPM_CPCCR |= CPM_CPCCR_CE ; /* update divide */ |
paul@98 | 314 | } |
paul@98 | 315 | |
paul@96 | 316 | static int jz_lcd_hw_init(vidinfo_t *vid) |
paul@33 | 317 | { |
paul@33 | 318 | struct jz_fb_info *fbi = &vid->jz_fb; |
paul@33 | 319 | unsigned int val = 0; |
paul@98 | 320 | unsigned int pclk = jz_lcd_get_pixel_clock(); |
paul@33 | 321 | |
paul@33 | 322 | /* Setting Control register */ |
paul@33 | 323 | switch (jzfb.bpp) { |
paul@33 | 324 | case 1: |
paul@33 | 325 | val |= LCD_CTRL_BPP_1; |
paul@33 | 326 | break; |
paul@33 | 327 | case 2: |
paul@33 | 328 | val |= LCD_CTRL_BPP_2; |
paul@33 | 329 | break; |
paul@33 | 330 | case 4: |
paul@33 | 331 | val |= LCD_CTRL_BPP_4; |
paul@33 | 332 | break; |
paul@33 | 333 | case 8: |
paul@33 | 334 | val |= LCD_CTRL_BPP_8; |
paul@33 | 335 | break; |
paul@33 | 336 | case 15: |
paul@33 | 337 | val |= LCD_CTRL_RGB555; |
paul@33 | 338 | case 16: |
paul@33 | 339 | val |= LCD_CTRL_BPP_16; |
paul@33 | 340 | break; |
paul@43 | 341 | #ifndef CONFIG_CPU_JZ4730 |
paul@33 | 342 | case 17 ... 32: |
paul@33 | 343 | val |= LCD_CTRL_BPP_18_24; /* target is 4bytes/pixel */ |
paul@33 | 344 | break; |
paul@43 | 345 | #endif |
paul@33 | 346 | default: |
paul@33 | 347 | /* printf("jz_lcd.c The BPP %d is not supported\n", jzfb.bpp); */ |
paul@33 | 348 | val |= LCD_CTRL_BPP_16; |
paul@33 | 349 | break; |
paul@33 | 350 | } |
paul@33 | 351 | |
paul@33 | 352 | switch (jzfb.cfg & MODE_MASK) { |
paul@33 | 353 | case MODE_STN_MONO_DUAL: |
paul@33 | 354 | case MODE_STN_COLOR_DUAL: |
paul@96 | 355 | val |= jz_lcd_stn_init(jzfb.h >> 1); |
paul@33 | 356 | break; |
paul@33 | 357 | |
paul@33 | 358 | case MODE_STN_MONO_SINGLE: |
paul@33 | 359 | case MODE_STN_COLOR_SINGLE: |
paul@96 | 360 | val |= jz_lcd_stn_init(jzfb.h); |
paul@33 | 361 | break; |
paul@33 | 362 | |
paul@33 | 363 | case MODE_TFT_GEN: |
paul@33 | 364 | case MODE_TFT_CASIO: |
paul@33 | 365 | case MODE_8BIT_SERIAL_TFT: |
paul@33 | 366 | case MODE_TFT_18BIT: |
paul@96 | 367 | jz_lcd_tft_init(); |
paul@33 | 368 | break; |
paul@33 | 369 | |
paul@33 | 370 | case MODE_TFT_SAMSUNG: |
paul@33 | 371 | { |
paul@33 | 372 | unsigned int total, tp_s, tp_e, ckv_s, ckv_e; |
paul@33 | 373 | unsigned int rev_s, rev_e, inv_s, inv_e; |
paul@33 | 374 | |
paul@96 | 375 | jz_lcd_tft_init(); |
paul@96 | 376 | |
paul@33 | 377 | total = jzfb.blw + jzfb.w + jzfb.elw + jzfb.hsw; |
paul@33 | 378 | tp_s = jzfb.blw + jzfb.w + 1; |
paul@33 | 379 | tp_e = tp_s + 1; |
paul@33 | 380 | /* ckv_s = tp_s - jz_clocks.pixclk/(1000000000/4100); */ |
paul@33 | 381 | ckv_s = tp_s - pclk/(1000000000/4100); |
paul@33 | 382 | ckv_e = tp_s + total; |
paul@33 | 383 | rev_s = tp_s - 11; /* -11.5 clk */ |
paul@33 | 384 | rev_e = rev_s + total; |
paul@33 | 385 | inv_s = tp_s; |
paul@33 | 386 | inv_e = inv_s + total; |
paul@33 | 387 | REG_LCD_CLS = (tp_s << 16) | tp_e; |
paul@33 | 388 | REG_LCD_PS = (ckv_s << 16) | ckv_e; |
paul@33 | 389 | REG_LCD_SPL = (rev_s << 16) | rev_e; |
paul@33 | 390 | REG_LCD_REV = (inv_s << 16) | inv_e; |
paul@33 | 391 | jzfb.cfg |= STFT_REVHI | STFT_SPLHI; |
paul@33 | 392 | break; |
paul@33 | 393 | } |
paul@96 | 394 | |
paul@33 | 395 | case MODE_TFT_SHARP: |
paul@33 | 396 | { |
paul@33 | 397 | unsigned int total, cls_s, cls_e, ps_s, ps_e; |
paul@33 | 398 | unsigned int spl_s, spl_e, rev_s, rev_e; |
paul@96 | 399 | |
paul@96 | 400 | jz_lcd_tft_init(); |
paul@96 | 401 | |
paul@33 | 402 | total = jzfb.blw + jzfb.w + jzfb.elw + jzfb.hsw; |
paul@33 | 403 | spl_s = 1; |
paul@33 | 404 | spl_e = spl_s + 1; |
paul@33 | 405 | cls_s = 0; |
paul@33 | 406 | cls_e = total - 60; /* > 4us (pclk = 80ns) */ |
paul@33 | 407 | ps_s = cls_s; |
paul@33 | 408 | ps_e = cls_e; |
paul@33 | 409 | rev_s = total - 40; /* > 3us (pclk = 80ns) */ |
paul@33 | 410 | rev_e = rev_s + total; |
paul@33 | 411 | jzfb.cfg |= STFT_PSHI; |
paul@33 | 412 | REG_LCD_SPL = (spl_s << 16) | spl_e; |
paul@33 | 413 | REG_LCD_CLS = (cls_s << 16) | cls_e; |
paul@33 | 414 | REG_LCD_PS = (ps_s << 16) | ps_e; |
paul@33 | 415 | REG_LCD_REV = (rev_s << 16) | rev_e; |
paul@33 | 416 | break; |
paul@33 | 417 | } |
paul@96 | 418 | |
paul@96 | 419 | default: |
paul@33 | 420 | break; |
paul@33 | 421 | } |
paul@33 | 422 | |
paul@33 | 423 | /* Configure the LCD panel */ |
paul@96 | 424 | |
paul@96 | 425 | val |= LCD_CTRL_BST_16; /* Burst Length is 16WORD=64Byte */ |
paul@96 | 426 | val |= LCD_CTRL_OFUP; /* OutFIFO underrun protect */ |
paul@96 | 427 | REG_LCD_CTRL = val; |
paul@33 | 428 | REG_LCD_CFG = jzfb.cfg; |
paul@33 | 429 | |
paul@98 | 430 | /* Timing reset. */ |
paul@33 | 431 | |
paul@98 | 432 | __cpm_stop_lcd(); |
paul@98 | 433 | jz_lcd_set_timing(pclk); |
paul@33 | 434 | __cpm_start_lcd(); |
paul@33 | 435 | udelay(1000); |
paul@33 | 436 | |
paul@96 | 437 | /* Configure DMA. */ |
paul@96 | 438 | |
paul@95 | 439 | REG_LCD_DA0 = (unsigned long) fbi->fdadr0; /* frame descriptor */ |
paul@33 | 440 | |
paul@33 | 441 | if (((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL) || |
paul@33 | 442 | ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL)) |
paul@95 | 443 | REG_LCD_DA1 = (unsigned long) fbi->fdadr1; /* frame descriptor */ |
paul@33 | 444 | |
paul@33 | 445 | return 0; |
paul@33 | 446 | } |
paul@33 | 447 | |
paul@101 | 448 | /* |
paul@101 | 449 | * Before enabling the LCD controller, LCD registers should be configured correctly. |
paul@101 | 450 | */ |
paul@101 | 451 | void lcd_enable(void) |
paul@33 | 452 | { |
paul@101 | 453 | REG_LCD_CTRL &= ~(1<<4); /* LCDCTRL.DIS */ |
paul@101 | 454 | REG_LCD_CTRL |= 1<<3; /* LCDCTRL.ENA*/ |
paul@101 | 455 | } |
paul@101 | 456 | |
paul@101 | 457 | void lcd_disable(void) |
paul@101 | 458 | { |
paul@101 | 459 | REG_LCD_CTRL |= (1<<4); /* LCDCTRL.DIS, regular disable */ |
paul@33 | 460 | } |
paul@33 | 461 | |
paul@101 | 462 | unsigned long lcd_ctrl_init() |
paul@33 | 463 | { |
paul@101 | 464 | struct jz_fb_info *fbi = &panel_info.jz_fb; |
paul@101 | 465 | |
paul@101 | 466 | /* Start from the top of memory and obtain palette and framebuffer regions. */ |
paul@101 | 467 | |
paul@101 | 468 | fbi->screen = lcd_get_framebuffer(get_memory_size(), 0); |
paul@101 | 469 | fbi->palette = lcd_get_palette(get_memory_size()); |
paul@101 | 470 | |
paul@101 | 471 | if (NBITS(panel_info.vl_bpix) < 12) |
paul@101 | 472 | lcd_init_palette(); |
paul@101 | 473 | |
paul@101 | 474 | jz_lcd_desc_init(&panel_info); |
paul@101 | 475 | jz_lcd_hw_init(&panel_info); |
paul@101 | 476 | |
paul@101 | 477 | return fbi->screen; |
paul@33 | 478 | } |