2017-07-11 | Paul Boddie | file changeset files shortlog | Introduced a separate clock and power management module, simplifying the LCD initialisation code, also simplifying the frequency calculations in the stage1 payload. |
paul@194 | 1 | #ifndef __MEMORY_H__ |
paul@194 | 2 | #define __MEMORY_H__ |
paul@194 | 3 | |
paul@194 | 4 | #define STAGE1_ARGS 0x80002008 |
paul@194 | 5 | #define STAGE1_STACK 0x80004000 |
paul@194 | 6 | |
paul@194 | 7 | #endif /* __MEMORY_H__ */ |