paul@9 | 1 | /* |
paul@9 | 2 | * JzRISC lcd controller |
paul@9 | 3 | * |
paul@15 | 4 | * Copyright (C) Xiangfu Liu <xiangfu@sharism.cc> |
paul@15 | 5 | * Copyright (C) 2015 Paul Boddie <paul@boddie.org.uk> |
paul@9 | 6 | * |
paul@9 | 7 | * This program is free software; you can redistribute it and/or |
paul@9 | 8 | * modify it under the terms of the GNU General Public License as |
paul@9 | 9 | * published by the Free Software Foundation; either version 2 of |
paul@9 | 10 | * the License, or (at your option) any later version. |
paul@9 | 11 | * |
paul@9 | 12 | * This program is distributed in the hope that it will be useful, |
paul@9 | 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
paul@9 | 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
paul@9 | 15 | * GNU General Public License for more details. |
paul@9 | 16 | * |
paul@9 | 17 | * You should have received a copy of the GNU General Public License |
paul@9 | 18 | * along with this program; if not, write to the Free Software |
paul@9 | 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
paul@9 | 20 | * MA 02111-1307 USA |
paul@9 | 21 | */ |
paul@9 | 22 | |
paul@9 | 23 | /* virt_to_phys() from u-boot/arch/mips/include/asm/addrspace.h |
paul@9 | 24 | via u-boot/arch/mips/include/asm/io.h */ |
paul@9 | 25 | #define virt_to_phys(n) (((int) n) & 0x1fffffff) |
paul@9 | 26 | |
paul@9 | 27 | #include "jz4740.h" |
paul@9 | 28 | #include "nanonote_gpm940b0.h" |
paul@9 | 29 | #include "board-nanonote.h" |
paul@9 | 30 | |
paul@9 | 31 | #define align2(n) (n)=((((n)+1)>>1)<<1) |
paul@9 | 32 | #define align4(n) (n)=((((n)+3)>>2)<<2) |
paul@9 | 33 | #define align8(n) (n)=((((n)+7)>>3)<<3) |
paul@9 | 34 | |
paul@9 | 35 | struct jzfb_info { |
paul@9 | 36 | unsigned int cfg; /* panel mode and pin usage etc. */ |
paul@9 | 37 | unsigned int w; |
paul@9 | 38 | unsigned int h; |
paul@9 | 39 | unsigned int bpp; /* bit per pixel */ |
paul@9 | 40 | unsigned int fclk; /* frame clk */ |
paul@9 | 41 | unsigned int hsw; /* hsync width, in pclk */ |
paul@9 | 42 | unsigned int vsw; /* vsync width, in line count */ |
paul@9 | 43 | unsigned int elw; /* end of line, in pclk */ |
paul@9 | 44 | unsigned int blw; /* begin of line, in pclk */ |
paul@9 | 45 | unsigned int efw; /* end of frame, in line count */ |
paul@9 | 46 | unsigned int bfw; /* begin of frame, in line count */ |
paul@9 | 47 | }; |
paul@9 | 48 | |
paul@9 | 49 | static struct jzfb_info jzfb = { |
paul@9 | 50 | MODE_8BIT_SERIAL_TFT | PCLK_N | HSYNC_N | VSYNC_N, |
paul@9 | 51 | 320, 240, 32, 70, 1, 1, 273, 140, 1, 20 |
paul@9 | 52 | }; |
paul@9 | 53 | |
paul@9 | 54 | vidinfo_t panel_info = { |
paul@9 | 55 | 320, 240, LCD_BPP, |
paul@9 | 56 | }; |
paul@9 | 57 | |
paul@15 | 58 | unsigned long lcd_get_size(void) |
paul@15 | 59 | { |
paul@15 | 60 | int line_length = (panel_info.vl_col * NBITS(panel_info.vl_bpix)) / 8; |
paul@15 | 61 | return line_length * panel_info.vl_row; |
paul@15 | 62 | } |
paul@9 | 63 | |
paul@9 | 64 | static int jz_lcd_init_mem(void *lcdbase, vidinfo_t *vid); |
paul@9 | 65 | static void jz_lcd_desc_init(vidinfo_t *vid); |
paul@9 | 66 | static int jz_lcd_hw_init(vidinfo_t *vid); |
paul@9 | 67 | |
paul@9 | 68 | void lcd_ctrl_init (void *lcdbase) |
paul@9 | 69 | { |
paul@9 | 70 | jz_lcd_init_mem(lcdbase, &panel_info); |
paul@9 | 71 | jz_lcd_desc_init(&panel_info); |
paul@9 | 72 | jz_lcd_hw_init(&panel_info); |
paul@9 | 73 | } |
paul@9 | 74 | |
paul@9 | 75 | /* |
paul@9 | 76 | * Before enabled lcd controller, lcd registers should be configured correctly. |
paul@9 | 77 | */ |
paul@9 | 78 | void lcd_enable (void) |
paul@9 | 79 | { |
paul@9 | 80 | REG_LCD_CTRL &= ~(1<<4); /* LCDCTRL.DIS */ |
paul@9 | 81 | REG_LCD_CTRL |= 1<<3; /* LCDCTRL.ENA*/ |
paul@9 | 82 | } |
paul@9 | 83 | |
paul@9 | 84 | void lcd_disable (void) |
paul@9 | 85 | { |
paul@9 | 86 | REG_LCD_CTRL |= (1<<4); /* LCDCTRL.DIS, regular disable */ |
paul@9 | 87 | /* REG_LCD_CTRL |= (1<<3); */ /* LCDCTRL.DIS, quikly disable */ |
paul@9 | 88 | } |
paul@9 | 89 | |
paul@9 | 90 | static int jz_lcd_init_mem(void *lcdbase, vidinfo_t *vid) |
paul@9 | 91 | { |
paul@9 | 92 | unsigned long palette_mem_size; |
paul@9 | 93 | struct jz_fb_info *fbi = &vid->jz_fb; |
paul@9 | 94 | int fb_size = vid->vl_row * (vid->vl_col * NBITS (vid->vl_bpix)) / 8; |
paul@9 | 95 | |
paul@9 | 96 | fbi->screen = (unsigned long)lcdbase; |
paul@9 | 97 | fbi->palette_size = 256; |
paul@9 | 98 | palette_mem_size = fbi->palette_size * sizeof(u16); |
paul@9 | 99 | |
paul@9 | 100 | /* debug("jz_lcd.c palette_mem_size = 0x%08lx\n", (unsigned long) palette_mem_size); */ |
paul@9 | 101 | /* locate palette and descs at end of page following fb */ |
paul@9 | 102 | fbi->palette = (unsigned long)lcdbase + fb_size + PAGE_SIZE - palette_mem_size; |
paul@9 | 103 | |
paul@9 | 104 | return 0; |
paul@9 | 105 | } |
paul@9 | 106 | |
paul@9 | 107 | static void jz_lcd_desc_init(vidinfo_t *vid) |
paul@9 | 108 | { |
paul@9 | 109 | struct jz_fb_info * fbi; |
paul@9 | 110 | fbi = &vid->jz_fb; |
paul@9 | 111 | fbi->dmadesc_fblow = (struct jz_fb_dma_descriptor *)((unsigned int)fbi->palette - 3*16); |
paul@9 | 112 | fbi->dmadesc_fbhigh = (struct jz_fb_dma_descriptor *)((unsigned int)fbi->palette - 2*16); |
paul@9 | 113 | fbi->dmadesc_palette = (struct jz_fb_dma_descriptor *)((unsigned int)fbi->palette - 1*16); |
paul@9 | 114 | |
paul@9 | 115 | #define BYTES_PER_PANEL (vid->vl_col * vid->vl_row * NBITS(vid->vl_bpix) / 8) |
paul@9 | 116 | |
paul@9 | 117 | /* populate descriptors */ |
paul@9 | 118 | fbi->dmadesc_fblow->fdadr = virt_to_phys(fbi->dmadesc_fblow); |
paul@9 | 119 | fbi->dmadesc_fblow->fsadr = virt_to_phys((void *)(fbi->screen + BYTES_PER_PANEL)); |
paul@9 | 120 | fbi->dmadesc_fblow->fidr = 0; |
paul@9 | 121 | fbi->dmadesc_fblow->ldcmd = BYTES_PER_PANEL / 4 ; |
paul@9 | 122 | |
paul@9 | 123 | fbi->fdadr1 = virt_to_phys(fbi->dmadesc_fblow); /* only used in dual-panel mode */ |
paul@9 | 124 | |
paul@9 | 125 | fbi->dmadesc_fbhigh->fsadr = virt_to_phys((void *)fbi->screen); |
paul@9 | 126 | fbi->dmadesc_fbhigh->fidr = 0; |
paul@9 | 127 | fbi->dmadesc_fbhigh->ldcmd = BYTES_PER_PANEL / 4; /* length in word */ |
paul@9 | 128 | |
paul@9 | 129 | fbi->dmadesc_palette->fsadr = virt_to_phys((void *)fbi->palette); |
paul@9 | 130 | fbi->dmadesc_palette->fidr = 0; |
paul@9 | 131 | fbi->dmadesc_palette->ldcmd = (fbi->palette_size * 2)/4 | (1<<28); |
paul@9 | 132 | |
paul@9 | 133 | if(NBITS(vid->vl_bpix) < 12) |
paul@9 | 134 | { |
paul@9 | 135 | /* assume any mode with <12 bpp is palette driven */ |
paul@9 | 136 | fbi->dmadesc_palette->fdadr = virt_to_phys(fbi->dmadesc_fbhigh); |
paul@9 | 137 | fbi->dmadesc_fbhigh->fdadr = virt_to_phys(fbi->dmadesc_palette); |
paul@9 | 138 | /* flips back and forth between pal and fbhigh */ |
paul@9 | 139 | fbi->fdadr0 = virt_to_phys(fbi->dmadesc_palette); |
paul@9 | 140 | } else { |
paul@9 | 141 | /* palette shouldn't be loaded in true-color mode */ |
paul@9 | 142 | fbi->dmadesc_fbhigh->fdadr = virt_to_phys((void *)fbi->dmadesc_fbhigh); |
paul@9 | 143 | fbi->fdadr0 = virt_to_phys(fbi->dmadesc_fbhigh); /* no pal just fbhigh */ |
paul@9 | 144 | } |
paul@9 | 145 | |
paul@9 | 146 | flush_cache_all(); |
paul@9 | 147 | } |
paul@9 | 148 | |
paul@9 | 149 | static int jz_lcd_hw_init(vidinfo_t *vid) |
paul@9 | 150 | { |
paul@9 | 151 | struct jz_fb_info *fbi = &vid->jz_fb; |
paul@9 | 152 | unsigned int val = 0; |
paul@9 | 153 | unsigned int pclk; |
paul@9 | 154 | unsigned int stnH; |
paul@9 | 155 | int pll_div; |
paul@9 | 156 | |
paul@9 | 157 | /* Setting Control register */ |
paul@9 | 158 | switch (jzfb.bpp) { |
paul@9 | 159 | case 1: |
paul@9 | 160 | val |= LCD_CTRL_BPP_1; |
paul@9 | 161 | break; |
paul@9 | 162 | case 2: |
paul@9 | 163 | val |= LCD_CTRL_BPP_2; |
paul@9 | 164 | break; |
paul@9 | 165 | case 4: |
paul@9 | 166 | val |= LCD_CTRL_BPP_4; |
paul@9 | 167 | break; |
paul@9 | 168 | case 8: |
paul@9 | 169 | val |= LCD_CTRL_BPP_8; |
paul@9 | 170 | break; |
paul@9 | 171 | case 15: |
paul@9 | 172 | val |= LCD_CTRL_RGB555; |
paul@9 | 173 | case 16: |
paul@9 | 174 | val |= LCD_CTRL_BPP_16; |
paul@9 | 175 | break; |
paul@9 | 176 | case 17 ... 32: |
paul@9 | 177 | val |= LCD_CTRL_BPP_18_24; /* target is 4bytes/pixel */ |
paul@9 | 178 | break; |
paul@9 | 179 | |
paul@9 | 180 | default: |
paul@9 | 181 | /* printf("jz_lcd.c The BPP %d is not supported\n", jzfb.bpp); */ |
paul@9 | 182 | val |= LCD_CTRL_BPP_16; |
paul@9 | 183 | break; |
paul@9 | 184 | } |
paul@9 | 185 | |
paul@9 | 186 | switch (jzfb.cfg & MODE_MASK) { |
paul@9 | 187 | case MODE_STN_MONO_DUAL: |
paul@9 | 188 | case MODE_STN_COLOR_DUAL: |
paul@9 | 189 | case MODE_STN_MONO_SINGLE: |
paul@9 | 190 | case MODE_STN_COLOR_SINGLE: |
paul@9 | 191 | switch (jzfb.bpp) { |
paul@9 | 192 | case 1: |
paul@9 | 193 | /* val |= LCD_CTRL_PEDN; */ |
paul@9 | 194 | case 2: |
paul@9 | 195 | val |= LCD_CTRL_FRC_2; |
paul@9 | 196 | break; |
paul@9 | 197 | case 4: |
paul@9 | 198 | val |= LCD_CTRL_FRC_4; |
paul@9 | 199 | break; |
paul@9 | 200 | case 8: |
paul@9 | 201 | default: |
paul@9 | 202 | val |= LCD_CTRL_FRC_16; |
paul@9 | 203 | break; |
paul@9 | 204 | } |
paul@9 | 205 | break; |
paul@9 | 206 | } |
paul@9 | 207 | |
paul@9 | 208 | val |= LCD_CTRL_BST_16; /* Burst Length is 16WORD=64Byte */ |
paul@9 | 209 | val |= LCD_CTRL_OFUP; /* OutFIFO underrun protect */ |
paul@9 | 210 | |
paul@9 | 211 | switch (jzfb.cfg & MODE_MASK) { |
paul@9 | 212 | case MODE_STN_MONO_DUAL: |
paul@9 | 213 | case MODE_STN_COLOR_DUAL: |
paul@9 | 214 | case MODE_STN_MONO_SINGLE: |
paul@9 | 215 | case MODE_STN_COLOR_SINGLE: |
paul@9 | 216 | switch (jzfb.cfg & STN_DAT_PINMASK) { |
paul@9 | 217 | case STN_DAT_PIN1: |
paul@9 | 218 | /* Do not adjust the hori-param value. */ |
paul@9 | 219 | break; |
paul@9 | 220 | case STN_DAT_PIN2: |
paul@9 | 221 | align2(jzfb.hsw); |
paul@9 | 222 | align2(jzfb.elw); |
paul@9 | 223 | align2(jzfb.blw); |
paul@9 | 224 | break; |
paul@9 | 225 | case STN_DAT_PIN4: |
paul@9 | 226 | align4(jzfb.hsw); |
paul@9 | 227 | align4(jzfb.elw); |
paul@9 | 228 | align4(jzfb.blw); |
paul@9 | 229 | break; |
paul@9 | 230 | case STN_DAT_PIN8: |
paul@9 | 231 | align8(jzfb.hsw); |
paul@9 | 232 | align8(jzfb.elw); |
paul@9 | 233 | align8(jzfb.blw); |
paul@9 | 234 | break; |
paul@9 | 235 | } |
paul@9 | 236 | break; |
paul@9 | 237 | } |
paul@9 | 238 | |
paul@9 | 239 | REG_LCD_CTRL = val; |
paul@9 | 240 | |
paul@9 | 241 | switch (jzfb.cfg & MODE_MASK) { |
paul@9 | 242 | case MODE_STN_MONO_DUAL: |
paul@9 | 243 | case MODE_STN_COLOR_DUAL: |
paul@9 | 244 | case MODE_STN_MONO_SINGLE: |
paul@9 | 245 | case MODE_STN_COLOR_SINGLE: |
paul@9 | 246 | if (((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL) || |
paul@9 | 247 | ((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL)) |
paul@9 | 248 | stnH = jzfb.h >> 1; |
paul@9 | 249 | else |
paul@9 | 250 | stnH = jzfb.h; |
paul@9 | 251 | |
paul@9 | 252 | REG_LCD_VSYNC = (0 << 16) | jzfb.vsw; |
paul@9 | 253 | REG_LCD_HSYNC = ((jzfb.blw+jzfb.w) << 16) | (jzfb.blw+jzfb.w+jzfb.hsw); |
paul@9 | 254 | |
paul@9 | 255 | /* Screen setting */ |
paul@9 | 256 | REG_LCD_VAT = ((jzfb.blw + jzfb.w + jzfb.hsw + jzfb.elw) << 16) | (stnH + jzfb.vsw + jzfb.bfw + jzfb.efw); |
paul@9 | 257 | REG_LCD_DAH = (jzfb.blw << 16) | (jzfb.blw + jzfb.w); |
paul@9 | 258 | REG_LCD_DAV = (0 << 16) | (stnH); |
paul@9 | 259 | |
paul@9 | 260 | /* AC BIAs signal */ |
paul@9 | 261 | REG_LCD_PS = (0 << 16) | (stnH+jzfb.vsw+jzfb.efw+jzfb.bfw); |
paul@9 | 262 | |
paul@9 | 263 | break; |
paul@9 | 264 | |
paul@9 | 265 | case MODE_TFT_GEN: |
paul@9 | 266 | case MODE_TFT_SHARP: |
paul@9 | 267 | case MODE_TFT_CASIO: |
paul@9 | 268 | case MODE_TFT_SAMSUNG: |
paul@9 | 269 | case MODE_8BIT_SERIAL_TFT: |
paul@9 | 270 | case MODE_TFT_18BIT: |
paul@9 | 271 | REG_LCD_VSYNC = (0 << 16) | jzfb.vsw; |
paul@9 | 272 | REG_LCD_HSYNC = (0 << 16) | jzfb.hsw; |
paul@9 | 273 | REG_LCD_DAV =((jzfb.vsw+jzfb.bfw) << 16) | (jzfb.vsw +jzfb.bfw+jzfb.h); |
paul@9 | 274 | REG_LCD_DAH = ((jzfb.hsw + jzfb.blw) << 16) | (jzfb.hsw + jzfb.blw + jzfb.w ); |
paul@9 | 275 | REG_LCD_VAT = (((jzfb.blw + jzfb.w + jzfb.elw + jzfb.hsw)) << 16) \ |
paul@9 | 276 | | (jzfb.vsw + jzfb.bfw + jzfb.h + jzfb.efw); |
paul@9 | 277 | break; |
paul@9 | 278 | } |
paul@9 | 279 | |
paul@9 | 280 | switch (jzfb.cfg & MODE_MASK) { |
paul@9 | 281 | case MODE_TFT_SAMSUNG: |
paul@9 | 282 | { |
paul@9 | 283 | unsigned int total, tp_s, tp_e, ckv_s, ckv_e; |
paul@9 | 284 | unsigned int rev_s, rev_e, inv_s, inv_e; |
paul@9 | 285 | |
paul@9 | 286 | pclk = val * (jzfb.w + jzfb.hsw + jzfb.elw + jzfb.blw) * |
paul@9 | 287 | (jzfb.h + jzfb.vsw + jzfb.efw + jzfb.bfw); /* Pixclk */ |
paul@9 | 288 | |
paul@9 | 289 | total = jzfb.blw + jzfb.w + jzfb.elw + jzfb.hsw; |
paul@9 | 290 | tp_s = jzfb.blw + jzfb.w + 1; |
paul@9 | 291 | tp_e = tp_s + 1; |
paul@9 | 292 | /* ckv_s = tp_s - jz_clocks.pixclk/(1000000000/4100); */ |
paul@9 | 293 | ckv_s = tp_s - pclk/(1000000000/4100); |
paul@9 | 294 | ckv_e = tp_s + total; |
paul@9 | 295 | rev_s = tp_s - 11; /* -11.5 clk */ |
paul@9 | 296 | rev_e = rev_s + total; |
paul@9 | 297 | inv_s = tp_s; |
paul@9 | 298 | inv_e = inv_s + total; |
paul@9 | 299 | REG_LCD_CLS = (tp_s << 16) | tp_e; |
paul@9 | 300 | REG_LCD_PS = (ckv_s << 16) | ckv_e; |
paul@9 | 301 | REG_LCD_SPL = (rev_s << 16) | rev_e; |
paul@9 | 302 | REG_LCD_REV = (inv_s << 16) | inv_e; |
paul@9 | 303 | jzfb.cfg |= STFT_REVHI | STFT_SPLHI; |
paul@9 | 304 | break; |
paul@9 | 305 | } |
paul@9 | 306 | case MODE_TFT_SHARP: |
paul@9 | 307 | { |
paul@9 | 308 | unsigned int total, cls_s, cls_e, ps_s, ps_e; |
paul@9 | 309 | unsigned int spl_s, spl_e, rev_s, rev_e; |
paul@9 | 310 | total = jzfb.blw + jzfb.w + jzfb.elw + jzfb.hsw; |
paul@9 | 311 | spl_s = 1; |
paul@9 | 312 | spl_e = spl_s + 1; |
paul@9 | 313 | cls_s = 0; |
paul@9 | 314 | cls_e = total - 60; /* > 4us (pclk = 80ns) */ |
paul@9 | 315 | ps_s = cls_s; |
paul@9 | 316 | ps_e = cls_e; |
paul@9 | 317 | rev_s = total - 40; /* > 3us (pclk = 80ns) */ |
paul@9 | 318 | rev_e = rev_s + total; |
paul@9 | 319 | jzfb.cfg |= STFT_PSHI; |
paul@9 | 320 | REG_LCD_SPL = (spl_s << 16) | spl_e; |
paul@9 | 321 | REG_LCD_CLS = (cls_s << 16) | cls_e; |
paul@9 | 322 | REG_LCD_PS = (ps_s << 16) | ps_e; |
paul@9 | 323 | REG_LCD_REV = (rev_s << 16) | rev_e; |
paul@9 | 324 | break; |
paul@9 | 325 | } |
paul@9 | 326 | case MODE_TFT_CASIO: |
paul@9 | 327 | break; |
paul@9 | 328 | } |
paul@9 | 329 | |
paul@9 | 330 | /* Configure the LCD panel */ |
paul@9 | 331 | REG_LCD_CFG = jzfb.cfg; |
paul@9 | 332 | |
paul@9 | 333 | /* Timing setting */ |
paul@9 | 334 | __cpm_stop_lcd(); |
paul@9 | 335 | |
paul@9 | 336 | val = jzfb.fclk; /* frame clk */ |
paul@9 | 337 | if ( (jzfb.cfg & MODE_MASK) != MODE_8BIT_SERIAL_TFT) { |
paul@9 | 338 | pclk = val * (jzfb.w + jzfb.hsw + jzfb.elw + jzfb.blw) * |
paul@9 | 339 | (jzfb.h + jzfb.vsw + jzfb.efw + jzfb.bfw); /* Pixclk */ |
paul@9 | 340 | } else { |
paul@9 | 341 | /* serial mode: Hsync period = 3*Width_Pixel */ |
paul@9 | 342 | pclk = val * (jzfb.w*3 + jzfb.hsw + jzfb.elw + jzfb.blw) * |
paul@9 | 343 | (jzfb.h + jzfb.vsw + jzfb.efw + jzfb.bfw); /* Pixclk */ |
paul@9 | 344 | } |
paul@9 | 345 | |
paul@9 | 346 | if (((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_SINGLE) || |
paul@9 | 347 | ((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL)) |
paul@9 | 348 | pclk = (pclk * 3); |
paul@9 | 349 | |
paul@9 | 350 | if (((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_SINGLE) || |
paul@9 | 351 | ((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL) || |
paul@9 | 352 | ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_SINGLE) || |
paul@9 | 353 | ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL)) |
paul@9 | 354 | pclk = pclk >> ((jzfb.cfg & STN_DAT_PINMASK) >> 4); |
paul@9 | 355 | |
paul@9 | 356 | if (((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL) || |
paul@9 | 357 | ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL)) |
paul@9 | 358 | pclk >>= 1; |
paul@9 | 359 | |
paul@9 | 360 | pll_div = ( REG_CPM_CPCCR & CPM_CPCCR_PCS ); /* clock source,0:pllout/2 1: pllout */ |
paul@9 | 361 | pll_div = pll_div ? 1 : 2 ; |
paul@9 | 362 | val = ( __cpm_get_pllout()/pll_div ) / pclk; |
paul@9 | 363 | val--; |
paul@9 | 364 | if ( val > 0x1ff ) { |
paul@9 | 365 | /* printf("CPM_LPCDR too large, set it to 0x1ff\n"); */ |
paul@9 | 366 | val = 0x1ff; |
paul@9 | 367 | } |
paul@9 | 368 | __cpm_set_pixdiv(val); |
paul@9 | 369 | |
paul@9 | 370 | val = pclk * 3 ; /* LCDClock > 2.5*Pixclock */ |
paul@9 | 371 | if ( val > 150000000 ) { |
paul@9 | 372 | /* printf("Warning: LCDClock=%d\n, LCDClock must less or equal to 150MHz.\n", val); */ |
paul@9 | 373 | /* printf("Change LCDClock to 150MHz\n"); */ |
paul@9 | 374 | val = 150000000; |
paul@9 | 375 | } |
paul@9 | 376 | val = ( __cpm_get_pllout()/pll_div ) / val; |
paul@9 | 377 | val--; |
paul@9 | 378 | if ( val > 0x1f ) { |
paul@9 | 379 | /* printf("CPM_CPCCR.LDIV too large, set it to 0x1f\n"); */ |
paul@9 | 380 | val = 0x1f; |
paul@9 | 381 | } |
paul@9 | 382 | __cpm_set_ldiv( val ); |
paul@9 | 383 | REG_CPM_CPCCR |= CPM_CPCCR_CE ; /* update divide */ |
paul@9 | 384 | |
paul@9 | 385 | __cpm_start_lcd(); |
paul@9 | 386 | udelay(1000); |
paul@9 | 387 | |
paul@9 | 388 | REG_LCD_DA0 = fbi->fdadr0; /* frame descripter*/ |
paul@9 | 389 | |
paul@9 | 390 | if (((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL) || |
paul@9 | 391 | ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL)) |
paul@9 | 392 | REG_LCD_DA1 = fbi->fdadr1; /* frame descripter*/ |
paul@9 | 393 | |
paul@9 | 394 | return 0; |
paul@9 | 395 | } |
paul@9 | 396 | |
paul@9 | 397 | void lcd_setcolreg (unsigned short regno, unsigned short red, unsigned short green, unsigned short blue) |
paul@9 | 398 | { |
paul@9 | 399 | } |
paul@9 | 400 | |
paul@9 | 401 | void lcd_initcolregs (void) |
paul@9 | 402 | { |
paul@9 | 403 | } |