paul@0 | 1 | /* |
paul@0 | 2 | * device board |
paul@0 | 3 | * |
paul@0 | 4 | * Copyright 2009 (C) Qi Hardware Inc., |
paul@0 | 5 | * Author: Xiangfu Liu <xiangfu@sharism.cc> |
paul@0 | 6 | * |
paul@0 | 7 | * This program is free software; you can redistribute it and/or |
paul@0 | 8 | * modify it under the terms of the GNU General Public License |
paul@0 | 9 | * version 3 as published by the Free Software Foundation. |
paul@0 | 10 | * |
paul@0 | 11 | * This program is distributed in the hope that it will be useful, |
paul@0 | 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
paul@0 | 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
paul@0 | 14 | * GNU General Public License for more details. |
paul@0 | 15 | * |
paul@0 | 16 | * You should have received a copy of the GNU General Public License |
paul@0 | 17 | * along with this program; if not, write to the Free Software |
paul@0 | 18 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, |
paul@0 | 19 | * Boston, MA 02110-1301, USA |
paul@0 | 20 | */ |
paul@0 | 21 | #ifndef _CONFIGS_H |
paul@0 | 22 | #define _CONFIGS_H |
paul@0 | 23 | |
paul@0 | 24 | /* Here are these common definitions */ |
paul@0 | 25 | /* Once your system configration change, just modify the file */ |
paul@0 | 26 | |
paul@2 | 27 | #include "xburst_types.h" |
paul@0 | 28 | |
paul@0 | 29 | #define CONFIG_NR_DRAM_BANKS 1 /* SDRAM BANK Number: 1, 2*/ |
paul@0 | 30 | #define SDRAM_CASL 3 /* CAS latency: 2 or 3 */ |
paul@0 | 31 | /* SDRAM Timings, unit: ns */ |
paul@0 | 32 | #define SDRAM_TRAS 45 /* RAS# Active Time */ |
paul@0 | 33 | #define SDRAM_RCD 20 /* RAS# to CAS# Delay */ |
paul@0 | 34 | #define SDRAM_TPC 20 /* RAS# Precharge Time */ |
paul@0 | 35 | #define SDRAM_TRWL 7 /* Write Latency Time */ |
paul@0 | 36 | #define SDRAM_TREF 15625 /* Refresh period: 4096 refresh cycles/64ms */ |
paul@0 | 37 | |
paul@0 | 38 | extern volatile u32 CPU_ID; |
paul@0 | 39 | extern volatile u8 SDRAM_BW16; |
paul@0 | 40 | extern volatile u8 SDRAM_BANK4; |
paul@0 | 41 | extern volatile u8 SDRAM_ROW; |
paul@0 | 42 | extern volatile u8 SDRAM_COL; |
paul@0 | 43 | extern volatile u8 CONFIG_MOBILE_SDRAM; |
paul@0 | 44 | extern volatile u32 CFG_CPU_SPEED; |
paul@0 | 45 | extern volatile u8 PHM_DIV; |
paul@0 | 46 | extern volatile u32 CFG_EXTAL; |
paul@0 | 47 | extern volatile u32 CONFIG_BAUDRATE; |
paul@0 | 48 | extern volatile u32 UART_BASE; |
paul@0 | 49 | extern volatile u8 CONFIG_MOBILE_SDRAM; |
paul@0 | 50 | extern volatile u8 IS_SHARE; |
paul@0 | 51 | #endif |