paul@68 | 1 | /* |
paul@114 | 2 | * Interrupt and TLB miss handling support. |
paul@68 | 3 | * |
paul@114 | 4 | * Copyright (C) 2015, 2016 Paul Boddie <paul@boddie.org.uk> |
paul@68 | 5 | * |
paul@68 | 6 | * This program is free software: you can redistribute it and/or modify |
paul@68 | 7 | * it under the terms of the GNU General Public License as published by |
paul@68 | 8 | * the Free Software Foundation, either version 3 of the License, or |
paul@68 | 9 | * (at your option) any later version. |
paul@68 | 10 | * |
paul@68 | 11 | * This program is distributed in the hope that it will be useful, |
paul@68 | 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
paul@68 | 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
paul@68 | 14 | * GNU General Public License for more details. |
paul@68 | 15 | * |
paul@68 | 16 | * You should have received a copy of the GNU General Public License |
paul@68 | 17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
paul@68 | 18 | */ |
paul@68 | 19 | |
paul@68 | 20 | .text |
paul@114 | 21 | .extern tlb_handler |
paul@86 | 22 | .extern interrupt_handler |
paul@114 | 23 | .globl _tlb_entry |
paul@68 | 24 | .globl _irq_entry |
paul@68 | 25 | .globl _end_entries |
paul@68 | 26 | .set noreorder |
paul@68 | 27 | |
paul@114 | 28 | _tlb_entry: |
paul@129 | 29 | /* Save the status. */ |
paul@129 | 30 | |
paul@129 | 31 | mfc0 $k0, $12 /* CP0_STATUS */ |
paul@129 | 32 | nop |
paul@129 | 33 | sw $k0, -120($sp) |
paul@129 | 34 | |
paul@129 | 35 | /* Mask interrupts. */ |
paul@129 | 36 | |
paul@129 | 37 | li $k1, 0xffff03ff |
paul@129 | 38 | and $k1, $k0, $k1 |
paul@129 | 39 | mtc0 $k1, $12 |
paul@129 | 40 | |
paul@127 | 41 | /* Save registers that the assembler wants to trash. */ |
paul@127 | 42 | |
paul@127 | 43 | sw $t9, -100($sp) |
paul@127 | 44 | sw $gp, -104($sp) |
paul@127 | 45 | sw $ra, -112($sp) |
paul@127 | 46 | |
paul@126 | 47 | lui $gp, %hi(_GLOBAL_OFFSET_TABLE_) |
paul@126 | 48 | ori $gp, $gp, %lo(_GLOBAL_OFFSET_TABLE_) |
paul@122 | 49 | la $k0, tlb_handler |
paul@114 | 50 | jr $k0 |
paul@114 | 51 | nop |
paul@114 | 52 | |
paul@68 | 53 | _irq_entry: |
paul@129 | 54 | /* Save the status. */ |
paul@129 | 55 | |
paul@129 | 56 | mfc0 $k0, $12 /* CP0_STATUS */ |
paul@129 | 57 | nop |
paul@129 | 58 | sw $k0, -120($sp) |
paul@129 | 59 | |
paul@129 | 60 | /* Mask interrupts. */ |
paul@129 | 61 | |
paul@129 | 62 | li $k1, 0xffff03ff |
paul@129 | 63 | and $k1, $k0, $k1 |
paul@129 | 64 | mtc0 $k1, $12 |
paul@129 | 65 | |
paul@127 | 66 | /* Save registers that the assembler wants to trash. */ |
paul@127 | 67 | |
paul@127 | 68 | sw $t9, -100($sp) |
paul@127 | 69 | sw $gp, -104($sp) |
paul@127 | 70 | sw $ra, -112($sp) |
paul@127 | 71 | |
paul@126 | 72 | lui $gp, %hi(_GLOBAL_OFFSET_TABLE_) |
paul@126 | 73 | ori $gp, $gp, %lo(_GLOBAL_OFFSET_TABLE_) |
paul@122 | 74 | la $k0, interrupt_handler |
paul@68 | 75 | jr $k0 |
paul@68 | 76 | nop |
paul@68 | 77 | |
paul@68 | 78 | _end_entries: |
paul@68 | 79 | |
paul@68 | 80 | .set reorder |