131:2bfc95ec6a5f
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2016-02-25 |
Paul Boddie |
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Separated error level and interrupt initialisation.
Made use of the EntryHi register instead of the Context register when handling
TLB misses in order to obtain the ASID. |
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stage2/irq.c stage2/stage2.c
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130:33216055a16c
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2016-02-25 |
Paul Boddie |
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Added missing ASID sections to EntryHi register values. |
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stage2/cpu.c
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129:d5fb9ec3001a
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2016-02-25 |
Paul Boddie |
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Moved status register saving and adjustment, saving the unmodified value. |
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stage2/entry.S stage2/handlers.S
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128:2919aadc3118
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2016-02-25 |
Paul Boddie |
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Make a copy of the global offset table for user mode use. |
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stage2/head2.S stage2/stage2.ld
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127:f95ea4416370
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2016-02-24 |
Paul Boddie |
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Attempt to prevent a system hang by saving certain registers early. |
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stage2/entry.S stage2/handlers.S
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126:44f118d517d2
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2016-02-24 |
Paul Boddie |
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Ensure that the GP is set up appropriately for interrupt and TLB miss handling. |
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stage2/entry.S stage2/handlers.S
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125:47cda5c6e99c
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2016-02-24 |
Paul Boddie |
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Disable user mode transitions for now. |
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stage2/irq.c
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124:5a8eb45b734a
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2016-02-24 |
Paul Boddie |
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Fixed the operation of the enter_user_mode function. |
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stage2/cpu.c
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123:62866e8d0f3b
57:62ee61016b75 122:24d8d5589ab5
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2016-02-24 |
Paul Boddie |
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Merged changes from the branch upon reverting to position-independent code. |
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stage2/board-minipc.h stage2/board-nanonote.h
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122:24d8d5589ab5
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2016-02-24 |
Paul Boddie |
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Switched to position-independent code to enable user mode execution. |
stage2-non-pic |
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stage2/Makefile stage2/entry.S stage2/head2.S stage2/stage2.ld
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