1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/stage2/nanonote_gpm940b0.c Sun Jun 07 23:06:08 2015 +0200
1.3 @@ -0,0 +1,403 @@
1.4 +/*
1.5 + * JzRISC lcd controller
1.6 + *
1.7 + * Copyright (C) Xiangfu Liu <xiangfu@sharism.cc>
1.8 + * Copyright (C) 2015 Paul Boddie <paul@boddie.org.uk>
1.9 + *
1.10 + * This program is free software; you can redistribute it and/or
1.11 + * modify it under the terms of the GNU General Public License as
1.12 + * published by the Free Software Foundation; either version 2 of
1.13 + * the License, or (at your option) any later version.
1.14 + *
1.15 + * This program is distributed in the hope that it will be useful,
1.16 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
1.17 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1.18 + * GNU General Public License for more details.
1.19 + *
1.20 + * You should have received a copy of the GNU General Public License
1.21 + * along with this program; if not, write to the Free Software
1.22 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
1.23 + * MA 02111-1307 USA
1.24 + */
1.25 +
1.26 +/* virt_to_phys() from u-boot/arch/mips/include/asm/addrspace.h
1.27 + via u-boot/arch/mips/include/asm/io.h */
1.28 +#define virt_to_phys(n) (((int) n) & 0x1fffffff)
1.29 +
1.30 +#include "jz4740.h"
1.31 +#include "nanonote_gpm940b0.h"
1.32 +#include "board-nanonote.h"
1.33 +
1.34 +#define align2(n) (n)=((((n)+1)>>1)<<1)
1.35 +#define align4(n) (n)=((((n)+3)>>2)<<2)
1.36 +#define align8(n) (n)=((((n)+7)>>3)<<3)
1.37 +
1.38 +struct jzfb_info {
1.39 + unsigned int cfg; /* panel mode and pin usage etc. */
1.40 + unsigned int w;
1.41 + unsigned int h;
1.42 + unsigned int bpp; /* bit per pixel */
1.43 + unsigned int fclk; /* frame clk */
1.44 + unsigned int hsw; /* hsync width, in pclk */
1.45 + unsigned int vsw; /* vsync width, in line count */
1.46 + unsigned int elw; /* end of line, in pclk */
1.47 + unsigned int blw; /* begin of line, in pclk */
1.48 + unsigned int efw; /* end of frame, in line count */
1.49 + unsigned int bfw; /* begin of frame, in line count */
1.50 +};
1.51 +
1.52 +static struct jzfb_info jzfb = {
1.53 + MODE_8BIT_SERIAL_TFT | PCLK_N | HSYNC_N | VSYNC_N,
1.54 + 320, 240, 32, 70, 1, 1, 273, 140, 1, 20
1.55 +};
1.56 +
1.57 +vidinfo_t panel_info = {
1.58 + 320, 240, LCD_BPP,
1.59 +};
1.60 +
1.61 +unsigned long lcd_get_size(void)
1.62 +{
1.63 + int line_length = (panel_info.vl_col * NBITS(panel_info.vl_bpix)) / 8;
1.64 + return line_length * panel_info.vl_row;
1.65 +}
1.66 +
1.67 +static int jz_lcd_init_mem(void *lcdbase, vidinfo_t *vid);
1.68 +static void jz_lcd_desc_init(vidinfo_t *vid);
1.69 +static int jz_lcd_hw_init(vidinfo_t *vid);
1.70 +
1.71 +void lcd_ctrl_init (void *lcdbase)
1.72 +{
1.73 + jz_lcd_init_mem(lcdbase, &panel_info);
1.74 + jz_lcd_desc_init(&panel_info);
1.75 + jz_lcd_hw_init(&panel_info);
1.76 +}
1.77 +
1.78 +/*
1.79 + * Before enabled lcd controller, lcd registers should be configured correctly.
1.80 + */
1.81 +void lcd_enable (void)
1.82 +{
1.83 + REG_LCD_CTRL &= ~(1<<4); /* LCDCTRL.DIS */
1.84 + REG_LCD_CTRL |= 1<<3; /* LCDCTRL.ENA*/
1.85 +}
1.86 +
1.87 +void lcd_disable (void)
1.88 +{
1.89 + REG_LCD_CTRL |= (1<<4); /* LCDCTRL.DIS, regular disable */
1.90 + /* REG_LCD_CTRL |= (1<<3); */ /* LCDCTRL.DIS, quikly disable */
1.91 +}
1.92 +
1.93 +static int jz_lcd_init_mem(void *lcdbase, vidinfo_t *vid)
1.94 +{
1.95 + unsigned long palette_mem_size;
1.96 + struct jz_fb_info *fbi = &vid->jz_fb;
1.97 + int fb_size = vid->vl_row * (vid->vl_col * NBITS (vid->vl_bpix)) / 8;
1.98 +
1.99 + fbi->screen = (unsigned long)lcdbase;
1.100 + fbi->palette_size = 256;
1.101 + palette_mem_size = fbi->palette_size * sizeof(u16);
1.102 +
1.103 + /* debug("jz_lcd.c palette_mem_size = 0x%08lx\n", (unsigned long) palette_mem_size); */
1.104 + /* locate palette and descs at end of page following fb */
1.105 + fbi->palette = (unsigned long)lcdbase + fb_size + PAGE_SIZE - palette_mem_size;
1.106 +
1.107 + return 0;
1.108 +}
1.109 +
1.110 +static void jz_lcd_desc_init(vidinfo_t *vid)
1.111 +{
1.112 + struct jz_fb_info * fbi;
1.113 + fbi = &vid->jz_fb;
1.114 + fbi->dmadesc_fblow = (struct jz_fb_dma_descriptor *)((unsigned int)fbi->palette - 3*16);
1.115 + fbi->dmadesc_fbhigh = (struct jz_fb_dma_descriptor *)((unsigned int)fbi->palette - 2*16);
1.116 + fbi->dmadesc_palette = (struct jz_fb_dma_descriptor *)((unsigned int)fbi->palette - 1*16);
1.117 +
1.118 + #define BYTES_PER_PANEL (vid->vl_col * vid->vl_row * NBITS(vid->vl_bpix) / 8)
1.119 +
1.120 + /* populate descriptors */
1.121 + fbi->dmadesc_fblow->fdadr = virt_to_phys(fbi->dmadesc_fblow);
1.122 + fbi->dmadesc_fblow->fsadr = virt_to_phys((void *)(fbi->screen + BYTES_PER_PANEL));
1.123 + fbi->dmadesc_fblow->fidr = 0;
1.124 + fbi->dmadesc_fblow->ldcmd = BYTES_PER_PANEL / 4 ;
1.125 +
1.126 + fbi->fdadr1 = virt_to_phys(fbi->dmadesc_fblow); /* only used in dual-panel mode */
1.127 +
1.128 + fbi->dmadesc_fbhigh->fsadr = virt_to_phys((void *)fbi->screen);
1.129 + fbi->dmadesc_fbhigh->fidr = 0;
1.130 + fbi->dmadesc_fbhigh->ldcmd = BYTES_PER_PANEL / 4; /* length in word */
1.131 +
1.132 + fbi->dmadesc_palette->fsadr = virt_to_phys((void *)fbi->palette);
1.133 + fbi->dmadesc_palette->fidr = 0;
1.134 + fbi->dmadesc_palette->ldcmd = (fbi->palette_size * 2)/4 | (1<<28);
1.135 +
1.136 + if(NBITS(vid->vl_bpix) < 12)
1.137 + {
1.138 + /* assume any mode with <12 bpp is palette driven */
1.139 + fbi->dmadesc_palette->fdadr = virt_to_phys(fbi->dmadesc_fbhigh);
1.140 + fbi->dmadesc_fbhigh->fdadr = virt_to_phys(fbi->dmadesc_palette);
1.141 + /* flips back and forth between pal and fbhigh */
1.142 + fbi->fdadr0 = virt_to_phys(fbi->dmadesc_palette);
1.143 + } else {
1.144 + /* palette shouldn't be loaded in true-color mode */
1.145 + fbi->dmadesc_fbhigh->fdadr = virt_to_phys((void *)fbi->dmadesc_fbhigh);
1.146 + fbi->fdadr0 = virt_to_phys(fbi->dmadesc_fbhigh); /* no pal just fbhigh */
1.147 + }
1.148 +
1.149 + flush_cache_all();
1.150 +}
1.151 +
1.152 +static int jz_lcd_hw_init(vidinfo_t *vid)
1.153 +{
1.154 + struct jz_fb_info *fbi = &vid->jz_fb;
1.155 + unsigned int val = 0;
1.156 + unsigned int pclk;
1.157 + unsigned int stnH;
1.158 + int pll_div;
1.159 +
1.160 + /* Setting Control register */
1.161 + switch (jzfb.bpp) {
1.162 + case 1:
1.163 + val |= LCD_CTRL_BPP_1;
1.164 + break;
1.165 + case 2:
1.166 + val |= LCD_CTRL_BPP_2;
1.167 + break;
1.168 + case 4:
1.169 + val |= LCD_CTRL_BPP_4;
1.170 + break;
1.171 + case 8:
1.172 + val |= LCD_CTRL_BPP_8;
1.173 + break;
1.174 + case 15:
1.175 + val |= LCD_CTRL_RGB555;
1.176 + case 16:
1.177 + val |= LCD_CTRL_BPP_16;
1.178 + break;
1.179 + case 17 ... 32:
1.180 + val |= LCD_CTRL_BPP_18_24; /* target is 4bytes/pixel */
1.181 + break;
1.182 +
1.183 + default:
1.184 + /* printf("jz_lcd.c The BPP %d is not supported\n", jzfb.bpp); */
1.185 + val |= LCD_CTRL_BPP_16;
1.186 + break;
1.187 + }
1.188 +
1.189 + switch (jzfb.cfg & MODE_MASK) {
1.190 + case MODE_STN_MONO_DUAL:
1.191 + case MODE_STN_COLOR_DUAL:
1.192 + case MODE_STN_MONO_SINGLE:
1.193 + case MODE_STN_COLOR_SINGLE:
1.194 + switch (jzfb.bpp) {
1.195 + case 1:
1.196 + /* val |= LCD_CTRL_PEDN; */
1.197 + case 2:
1.198 + val |= LCD_CTRL_FRC_2;
1.199 + break;
1.200 + case 4:
1.201 + val |= LCD_CTRL_FRC_4;
1.202 + break;
1.203 + case 8:
1.204 + default:
1.205 + val |= LCD_CTRL_FRC_16;
1.206 + break;
1.207 + }
1.208 + break;
1.209 + }
1.210 +
1.211 + val |= LCD_CTRL_BST_16; /* Burst Length is 16WORD=64Byte */
1.212 + val |= LCD_CTRL_OFUP; /* OutFIFO underrun protect */
1.213 +
1.214 + switch (jzfb.cfg & MODE_MASK) {
1.215 + case MODE_STN_MONO_DUAL:
1.216 + case MODE_STN_COLOR_DUAL:
1.217 + case MODE_STN_MONO_SINGLE:
1.218 + case MODE_STN_COLOR_SINGLE:
1.219 + switch (jzfb.cfg & STN_DAT_PINMASK) {
1.220 + case STN_DAT_PIN1:
1.221 + /* Do not adjust the hori-param value. */
1.222 + break;
1.223 + case STN_DAT_PIN2:
1.224 + align2(jzfb.hsw);
1.225 + align2(jzfb.elw);
1.226 + align2(jzfb.blw);
1.227 + break;
1.228 + case STN_DAT_PIN4:
1.229 + align4(jzfb.hsw);
1.230 + align4(jzfb.elw);
1.231 + align4(jzfb.blw);
1.232 + break;
1.233 + case STN_DAT_PIN8:
1.234 + align8(jzfb.hsw);
1.235 + align8(jzfb.elw);
1.236 + align8(jzfb.blw);
1.237 + break;
1.238 + }
1.239 + break;
1.240 + }
1.241 +
1.242 + REG_LCD_CTRL = val;
1.243 +
1.244 + switch (jzfb.cfg & MODE_MASK) {
1.245 + case MODE_STN_MONO_DUAL:
1.246 + case MODE_STN_COLOR_DUAL:
1.247 + case MODE_STN_MONO_SINGLE:
1.248 + case MODE_STN_COLOR_SINGLE:
1.249 + if (((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL) ||
1.250 + ((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL))
1.251 + stnH = jzfb.h >> 1;
1.252 + else
1.253 + stnH = jzfb.h;
1.254 +
1.255 + REG_LCD_VSYNC = (0 << 16) | jzfb.vsw;
1.256 + REG_LCD_HSYNC = ((jzfb.blw+jzfb.w) << 16) | (jzfb.blw+jzfb.w+jzfb.hsw);
1.257 +
1.258 + /* Screen setting */
1.259 + REG_LCD_VAT = ((jzfb.blw + jzfb.w + jzfb.hsw + jzfb.elw) << 16) | (stnH + jzfb.vsw + jzfb.bfw + jzfb.efw);
1.260 + REG_LCD_DAH = (jzfb.blw << 16) | (jzfb.blw + jzfb.w);
1.261 + REG_LCD_DAV = (0 << 16) | (stnH);
1.262 +
1.263 + /* AC BIAs signal */
1.264 + REG_LCD_PS = (0 << 16) | (stnH+jzfb.vsw+jzfb.efw+jzfb.bfw);
1.265 +
1.266 + break;
1.267 +
1.268 + case MODE_TFT_GEN:
1.269 + case MODE_TFT_SHARP:
1.270 + case MODE_TFT_CASIO:
1.271 + case MODE_TFT_SAMSUNG:
1.272 + case MODE_8BIT_SERIAL_TFT:
1.273 + case MODE_TFT_18BIT:
1.274 + REG_LCD_VSYNC = (0 << 16) | jzfb.vsw;
1.275 + REG_LCD_HSYNC = (0 << 16) | jzfb.hsw;
1.276 + REG_LCD_DAV =((jzfb.vsw+jzfb.bfw) << 16) | (jzfb.vsw +jzfb.bfw+jzfb.h);
1.277 + REG_LCD_DAH = ((jzfb.hsw + jzfb.blw) << 16) | (jzfb.hsw + jzfb.blw + jzfb.w );
1.278 + REG_LCD_VAT = (((jzfb.blw + jzfb.w + jzfb.elw + jzfb.hsw)) << 16) \
1.279 + | (jzfb.vsw + jzfb.bfw + jzfb.h + jzfb.efw);
1.280 + break;
1.281 + }
1.282 +
1.283 + switch (jzfb.cfg & MODE_MASK) {
1.284 + case MODE_TFT_SAMSUNG:
1.285 + {
1.286 + unsigned int total, tp_s, tp_e, ckv_s, ckv_e;
1.287 + unsigned int rev_s, rev_e, inv_s, inv_e;
1.288 +
1.289 + pclk = val * (jzfb.w + jzfb.hsw + jzfb.elw + jzfb.blw) *
1.290 + (jzfb.h + jzfb.vsw + jzfb.efw + jzfb.bfw); /* Pixclk */
1.291 +
1.292 + total = jzfb.blw + jzfb.w + jzfb.elw + jzfb.hsw;
1.293 + tp_s = jzfb.blw + jzfb.w + 1;
1.294 + tp_e = tp_s + 1;
1.295 + /* ckv_s = tp_s - jz_clocks.pixclk/(1000000000/4100); */
1.296 + ckv_s = tp_s - pclk/(1000000000/4100);
1.297 + ckv_e = tp_s + total;
1.298 + rev_s = tp_s - 11; /* -11.5 clk */
1.299 + rev_e = rev_s + total;
1.300 + inv_s = tp_s;
1.301 + inv_e = inv_s + total;
1.302 + REG_LCD_CLS = (tp_s << 16) | tp_e;
1.303 + REG_LCD_PS = (ckv_s << 16) | ckv_e;
1.304 + REG_LCD_SPL = (rev_s << 16) | rev_e;
1.305 + REG_LCD_REV = (inv_s << 16) | inv_e;
1.306 + jzfb.cfg |= STFT_REVHI | STFT_SPLHI;
1.307 + break;
1.308 + }
1.309 + case MODE_TFT_SHARP:
1.310 + {
1.311 + unsigned int total, cls_s, cls_e, ps_s, ps_e;
1.312 + unsigned int spl_s, spl_e, rev_s, rev_e;
1.313 + total = jzfb.blw + jzfb.w + jzfb.elw + jzfb.hsw;
1.314 + spl_s = 1;
1.315 + spl_e = spl_s + 1;
1.316 + cls_s = 0;
1.317 + cls_e = total - 60; /* > 4us (pclk = 80ns) */
1.318 + ps_s = cls_s;
1.319 + ps_e = cls_e;
1.320 + rev_s = total - 40; /* > 3us (pclk = 80ns) */
1.321 + rev_e = rev_s + total;
1.322 + jzfb.cfg |= STFT_PSHI;
1.323 + REG_LCD_SPL = (spl_s << 16) | spl_e;
1.324 + REG_LCD_CLS = (cls_s << 16) | cls_e;
1.325 + REG_LCD_PS = (ps_s << 16) | ps_e;
1.326 + REG_LCD_REV = (rev_s << 16) | rev_e;
1.327 + break;
1.328 + }
1.329 + case MODE_TFT_CASIO:
1.330 + break;
1.331 + }
1.332 +
1.333 + /* Configure the LCD panel */
1.334 + REG_LCD_CFG = jzfb.cfg;
1.335 +
1.336 + /* Timing setting */
1.337 + __cpm_stop_lcd();
1.338 +
1.339 + val = jzfb.fclk; /* frame clk */
1.340 + if ( (jzfb.cfg & MODE_MASK) != MODE_8BIT_SERIAL_TFT) {
1.341 + pclk = val * (jzfb.w + jzfb.hsw + jzfb.elw + jzfb.blw) *
1.342 + (jzfb.h + jzfb.vsw + jzfb.efw + jzfb.bfw); /* Pixclk */
1.343 + } else {
1.344 + /* serial mode: Hsync period = 3*Width_Pixel */
1.345 + pclk = val * (jzfb.w*3 + jzfb.hsw + jzfb.elw + jzfb.blw) *
1.346 + (jzfb.h + jzfb.vsw + jzfb.efw + jzfb.bfw); /* Pixclk */
1.347 + }
1.348 +
1.349 + if (((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_SINGLE) ||
1.350 + ((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL))
1.351 + pclk = (pclk * 3);
1.352 +
1.353 + if (((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_SINGLE) ||
1.354 + ((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL) ||
1.355 + ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_SINGLE) ||
1.356 + ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL))
1.357 + pclk = pclk >> ((jzfb.cfg & STN_DAT_PINMASK) >> 4);
1.358 +
1.359 + if (((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL) ||
1.360 + ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL))
1.361 + pclk >>= 1;
1.362 +
1.363 + pll_div = ( REG_CPM_CPCCR & CPM_CPCCR_PCS ); /* clock source,0:pllout/2 1: pllout */
1.364 + pll_div = pll_div ? 1 : 2 ;
1.365 + val = ( __cpm_get_pllout()/pll_div ) / pclk;
1.366 + val--;
1.367 + if ( val > 0x1ff ) {
1.368 + /* printf("CPM_LPCDR too large, set it to 0x1ff\n"); */
1.369 + val = 0x1ff;
1.370 + }
1.371 + __cpm_set_pixdiv(val);
1.372 +
1.373 + val = pclk * 3 ; /* LCDClock > 2.5*Pixclock */
1.374 + if ( val > 150000000 ) {
1.375 + /* printf("Warning: LCDClock=%d\n, LCDClock must less or equal to 150MHz.\n", val); */
1.376 + /* printf("Change LCDClock to 150MHz\n"); */
1.377 + val = 150000000;
1.378 + }
1.379 + val = ( __cpm_get_pllout()/pll_div ) / val;
1.380 + val--;
1.381 + if ( val > 0x1f ) {
1.382 + /* printf("CPM_CPCCR.LDIV too large, set it to 0x1f\n"); */
1.383 + val = 0x1f;
1.384 + }
1.385 + __cpm_set_ldiv( val );
1.386 + REG_CPM_CPCCR |= CPM_CPCCR_CE ; /* update divide */
1.387 +
1.388 + __cpm_start_lcd();
1.389 + udelay(1000);
1.390 +
1.391 + REG_LCD_DA0 = fbi->fdadr0; /* frame descripter*/
1.392 +
1.393 + if (((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL) ||
1.394 + ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL))
1.395 + REG_LCD_DA1 = fbi->fdadr1; /* frame descripter*/
1.396 +
1.397 + return 0;
1.398 +}
1.399 +
1.400 +void lcd_setcolreg (unsigned short regno, unsigned short red, unsigned short green, unsigned short blue)
1.401 +{
1.402 +}
1.403 +
1.404 +void lcd_initcolregs (void)
1.405 +{
1.406 +}