1.1 --- a/stage2/entry.S Sat Feb 27 17:23:49 2016 +0100
1.2 +++ b/stage2/entry.S Sat Feb 27 17:56:51 2016 +0100
1.3 @@ -20,6 +20,7 @@
1.4 .text
1.5 .extern interrupt_handler
1.6 .globl _tlb_entry
1.7 +.globl _exc_entry
1.8 .globl _irq_entry
1.9 .globl _end_entries
1.10 .set noreorder
1.11 @@ -27,7 +28,6 @@
1.12 /* NOTE: Duplicated from cpu.h. */
1.13
1.14 #define page_table_start 0x00040000
1.15 -#define page_table_task_size 0x00008000
1.16 #define page_table_task_size_log2 15
1.17
1.18 _tlb_entry:
1.19 @@ -94,6 +94,22 @@
1.20 eret
1.21 nop
1.22
1.23 +_exc_entry:
1.24 + /* Handle TLB refill exceptions. */
1.25 +
1.26 + mfc0 $k0, $13 /* CP0_CAUSE */
1.27 + li $k1, 0x0000007c
1.28 + and $k0, $k0, $k1 /* ExcCode << 2 */
1.29 + srl $k0, $k0, 2 /* ExcCode */
1.30 + addi $k1, $k0, -2 /* ExcCode == 2 */
1.31 + beqz $k1, _tlb_entry
1.32 + addi $k1, $k0, -3 /* ExcCode == 3 */
1.33 + beqz $k1, _tlb_entry
1.34 + nop
1.35 +_fail:
1.36 + b _fail
1.37 + nop
1.38 +
1.39 _irq_entry:
1.40 /* Save registers that the assembler wants to trash. */
1.41