1.1 --- a/stage2/head2.S Tue Jun 23 23:05:00 2015 +0200
1.2 +++ b/stage2/head2.S Tue Jun 23 23:08:19 2015 +0200
1.3 @@ -20,13 +20,81 @@
1.4 * along with this program. If not, see <http://www.gnu.org/licenses/>.
1.5 */
1.6
1.7 - .text
1.8 - .extern c_main
1.9 -
1.10 - .globl _start
1.11 - .set noreorder
1.12 +.text
1.13 +.extern c_main
1.14 +.extern _tlb_entry
1.15 +.extern _exc_entry
1.16 +.extern _irq_entry
1.17 +.extern _end_entries
1.18 +.globl _start
1.19 +.set noreorder
1.20 +
1.21 _start:
1.22 - add $29, $20, 0x3ffff0 /* sp */
1.23 - j c_main
1.24 + /* Initialise the stack. */
1.25 +
1.26 + la $sp, 0x80080000
1.27 +
1.28 + /* Copy TLB handling instructions. */
1.29 +
1.30 + lui $t0, %hi(_tlb_entry) /* start */
1.31 + ori $t0, $t0, %lo(_tlb_entry)
1.32 + li $t1, 0x80000000
1.33 + lui $t2, %hi(_exc_entry) /* end */
1.34 + ori $t2, $t2, %lo(_exc_entry)
1.35 +_tlb_copy:
1.36 + lw $t3, 0($t0)
1.37 + addiu $t0, $t0, 4
1.38 + sw $t3, 0($t1)
1.39 + bne $t0, $t2, _tlb_copy
1.40 + addiu $t1, $t1, 4 /* executed in delay slot before branch */
1.41 +
1.42 + /* Copy exception handling instructions. */
1.43 +
1.44 + move $t0, $t2 /* start */
1.45 + li $t1, 0x80000180
1.46 + lui $t2, %hi(_irq_entry) /* end */
1.47 + ori $t2, $t2, %lo(_irq_entry)
1.48 +_exc_copy:
1.49 + lw $t3, 0($t0)
1.50 + addiu $t0, $t0, 4
1.51 + sw $t3, 0($t1)
1.52 + bne $t0, $t2, _exc_copy
1.53 + addiu $t1, $t1, 4 /* executed in delay slot before branch */
1.54 +
1.55 + /* Copy IRQ handling instructions. */
1.56
1.57 - .set reorder
1.58 + move $t0, $t2 /* start */
1.59 + li $t1, 0x80000200
1.60 + lui $t2, %hi(_end_entries) /* end */
1.61 + ori $t2, $t2, %lo(_end_entries)
1.62 +_irq_copy:
1.63 + lw $t3, 0($t0)
1.64 + addiu $t0, $t0, 4
1.65 + sw $t3, 0($t1)
1.66 + bne $t0, $t2, _irq_copy
1.67 + addiu $t1, $t1, 4 /* executed in delay slot before branch */
1.68 +
1.69 + /* Initialise interrupts. */
1.70 +
1.71 + mfc0 $t3, $12 /* CP0_STATUS */
1.72 + nop
1.73 + li $t4, 0xffbf00e0 /* BEV = 0 (not bootloader vectors); IM = disable all */
1.74 + and $t3, $t3, $t4 /* ... KSU = 0 (kernel mode); ERL = 0; EXL = 0; IE = 0 */
1.75 + li $t4, 0x0000ff04 /* IM = enable IM7..IM0; ERL = 1 (set by default) */
1.76 + or $t3, $t3, $t4
1.77 + mtc0 $t3, $12
1.78 + nop
1.79 +
1.80 + li $t3, 0x00800000 /* IV = 1 (use 0x80000200 for interrupts) */
1.81 + mtc0 $t3, $13 /* CP0_CAUSE */
1.82 + nop
1.83 +
1.84 + mtc0 $zero, $15 /* CP0_EBASE (should be zero anyway) */
1.85 + nop
1.86 +
1.87 + /* Start the program. */
1.88 +
1.89 + j c_main
1.90 + nop
1.91 +
1.92 +.set reorder