1 /* 2 * Initialisation code for the stage 2 payload. 3 * 4 * Copyright 2009 (C) Qi Hardware Inc. 5 * Author: Wolfgang Spraul <wolfgang@sharism.cc> 6 * 7 * Copyright (C) 2015, 2016 Paul Boddie <paul@boddie.org.uk> 8 * 9 * This program is free software: you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation, either version 3 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program. If not, see <http://www.gnu.org/licenses/>. 21 */ 22 23 #include "sdram.h" 24 25 .text 26 .extern c_main 27 .extern _irq_entry 28 .extern _end_entries 29 .globl _start 30 .set noreorder 31 32 _start: 33 b real_start 34 nop 35 36 /* Apparently reserved region which, if used, breaks the USB Boot process. */ 37 38 .word 0x0 39 .word 0x0 40 .word 0x0 41 .word 0x0 42 .word 0x0 43 .word 0x0 44 .word 0x0 45 .word 0x0 46 47 real_start: 48 /* Initialise the stack. */ 49 50 la $sp, 0x80080000 51 52 /* Initialise the globals pointer. */ 53 54 lui $gp, %hi(_GLOBAL_OFFSET_TABLE_) 55 ori $gp, $gp, %lo(_GLOBAL_OFFSET_TABLE_) 56 57 move $k0, $ra 58 59 /* Copy TLB handling instructions. */ 60 61 la $t0, _tlb_entry /* start */ 62 li $t1, 0x80000000 63 la $t2, _irq_entry /* end */ 64 jal _copy 65 nop 66 67 /* Copy IRQ handling instructions. */ 68 69 la $t0, _irq_entry /* start */ 70 li $t1, 0x80000200 71 la $t2, _end_entries /* end */ 72 jal _copy 73 nop 74 75 move $ra, $k0 76 77 /* Enable caching. */ 78 79 li $t0, CONFIG_CM_CACHABLE_NONCOHERENT 80 mtc0 $t0, $16 /* CP0_CONFIG */ 81 nop 82 83 /* Start the program. */ 84 85 la $t9, c_main /* load the address of the routine */ 86 j c_main 87 nop 88 89 _copy: 90 /* Copy via $t3 the region from $t0 to $t2 into $t1. */ 91 92 lw $t3, 0($t0) 93 addiu $t0, $t0, 4 94 sw $t3, 0($t1) 95 bne $t0, $t2, _copy 96 addiu $t1, $t1, 4 /* executed in delay slot before branch */ 97 j $ra 98 nop 99 100 .set reorder