1 /* 2 * Initialisation code for the stage 2 payload. 3 * 4 * Copyright 2009 (C) Qi Hardware Inc. 5 * Author: Wolfgang Spraul <wolfgang@sharism.cc> 6 * 7 * Copyright (C) 2015, 2016 Paul Boddie <paul@boddie.org.uk> 8 * 9 * This program is free software: you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation, either version 3 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program. If not, see <http://www.gnu.org/licenses/>. 21 */ 22 23 #include "sdram.h" 24 25 .text 26 .extern c_main 27 .extern _irq_entry 28 .extern _end_entries 29 .extern _got_start 30 .extern _got_end 31 .extern _got_copy_start 32 .globl _start 33 .set noreorder 34 35 _start: 36 b real_start 37 nop 38 39 /* Apparently reserved region which, if used, breaks the USB Boot process. */ 40 41 .word 0x0 42 .word 0x0 43 .word 0x0 44 .word 0x0 45 .word 0x0 46 .word 0x0 47 .word 0x0 48 .word 0x0 49 50 real_start: 51 /* Initialise the stack. */ 52 53 la $sp, 0x80080000 54 55 /* Initialise the globals pointer. */ 56 57 lui $gp, %hi(_GLOBAL_OFFSET_TABLE_) 58 ori $gp, $gp, %lo(_GLOBAL_OFFSET_TABLE_) 59 60 move $k0, $ra 61 62 /* Copy TLB handling instructions. */ 63 64 la $t0, _tlb_entry /* start */ 65 li $t1, 0x80000000 66 la $t2, _irq_entry /* end */ 67 jal _copy 68 nop 69 70 /* Copy IRQ handling instructions. */ 71 72 la $t0, _irq_entry /* start */ 73 li $t1, 0x80000200 74 la $t2, _end_entries /* end */ 75 jal _copy 76 nop 77 78 /* Copy the offset table for user mode programs. */ 79 80 la $t0, _got_start /* start */ 81 la $t1, _got_copy_start 82 la $t2, _got_end /* end */ 83 li $t3, 0x80000000 /* adjustment */ 84 jal _copy_adjust 85 nop 86 87 move $ra, $k0 88 89 /* Enable caching. */ 90 91 li $t0, CONFIG_CM_CACHABLE_NONCOHERENT 92 mtc0 $t0, $16 /* CP0_CONFIG */ 93 nop 94 95 /* Start the program. */ 96 97 la $t9, c_main /* load the address of the routine */ 98 j c_main 99 nop 100 101 _copy: 102 /* Copy via $t3 the region from $t0 to $t2 into $t1. */ 103 104 lw $t3, 0($t0) 105 addiu $t0, $t0, 4 106 sw $t3, 0($t1) 107 bne $t0, $t2, _copy 108 addiu $t1, $t1, 4 /* executed in delay slot before branch */ 109 j $ra 110 nop 111 112 _copy_adjust: 113 /* Copy via $t4 the region from $t0 to $t2 into $t1, adjusting by $t3. */ 114 115 lw $t4, 0($t0) 116 addiu $t0, $t0, 4 117 subu $t4, $t4, $t3 118 sw $t4, 0($t1) 119 bne $t0, $t2, _copy_adjust 120 addiu $t1, $t1, 4 /* executed in delay slot before branch */ 121 j $ra 122 nop 123 124 .set reorder