1 /* 2 * JzRISC lcd controller 3 * 4 * Xiangfu Liu <xiangfu@sharism.cc> 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License as 8 * published by the Free Software Foundation; either version 2 of 9 * the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 19 * MA 02111-1307 USA 20 */ 21 22 #ifndef __QI_LB60_GPM940B0_H__ 23 #define __QI_LB60_GPM940B0_H__ 24 25 #include "nanonote.h" 26 #include "lcd.h" 27 28 struct lcd_desc{ 29 unsigned int next_desc; /* LCDDAx */ 30 unsigned int databuf; /* LCDSAx */ 31 unsigned int frame_id; /* LCDFIDx */ 32 unsigned int cmd; /* LCDCMDx */ 33 }; 34 35 #define MODE_MASK 0x0f 36 #define MODE_TFT_GEN 0x00 37 #define MODE_TFT_SHARP 0x01 38 #define MODE_TFT_CASIO 0x02 39 #define MODE_TFT_SAMSUNG 0x03 40 #define MODE_CCIR656_NONINT 0x04 41 #define MODE_CCIR656_INT 0x05 42 #define MODE_STN_COLOR_SINGLE 0x08 43 #define MODE_STN_MONO_SINGLE 0x09 44 #define MODE_STN_COLOR_DUAL 0x0a 45 #define MODE_STN_MONO_DUAL 0x0b 46 #define MODE_8BIT_SERIAL_TFT 0x0c 47 48 #define MODE_TFT_18BIT (1<<7) 49 50 #define STN_DAT_PIN1 (0x00 << 4) 51 #define STN_DAT_PIN2 (0x01 << 4) 52 #define STN_DAT_PIN4 (0x02 << 4) 53 #define STN_DAT_PIN8 (0x03 << 4) 54 #define STN_DAT_PINMASK STN_DAT_PIN8 55 56 #define STFT_PSHI (1 << 15) 57 #define STFT_CLSHI (1 << 14) 58 #define STFT_SPLHI (1 << 13) 59 #define STFT_REVHI (1 << 12) 60 61 #define SYNC_MASTER (0 << 16) 62 #define SYNC_SLAVE (1 << 16) 63 64 #define DE_P (0 << 9) 65 #define DE_N (1 << 9) 66 67 #define PCLK_P (0 << 10) 68 #define PCLK_N (1 << 10) 69 70 #define HSYNC_P (0 << 11) 71 #define HSYNC_N (1 << 11) 72 73 #define VSYNC_P (0 << 8) 74 #define VSYNC_N (1 << 8) 75 76 #define DATA_NORMAL (0 << 17) 77 #define DATA_INVERSE (1 << 17) 78 79 80 /* Jz LCDFB supported I/O controls. */ 81 #define FBIOSETBACKLIGHT 0x4688 82 #define FBIODISPON 0x4689 83 #define FBIODISPOFF 0x468a 84 #define FBIORESET 0x468b 85 #define FBIOPRINT_REG 0x468c 86 87 /* 88 * LCD panel specific definition 89 */ 90 #define MODE (0xc9) /* 8bit serial RGB */ 91 92 #define __spi_write_reg1(reg, val) \ 93 do { \ 94 unsigned char no; \ 95 unsigned short value; \ 96 unsigned char a=reg; \ 97 unsigned char b=val; \ 98 __gpio_set_pin(SPEN); \ 99 __gpio_set_pin(SPCK); \ 100 __gpio_clear_pin(SPDA); \ 101 __gpio_clear_pin(SPEN); \ 102 value=((a<<8)|(b&0xFF)); \ 103 for(no=0;no<16;no++) \ 104 { \ 105 __gpio_clear_pin(SPCK); \ 106 if((value&0x8000)==0x8000) \ 107 __gpio_set_pin(SPDA); \ 108 else \ 109 __gpio_clear_pin(SPDA); \ 110 __gpio_set_pin(SPCK); \ 111 value=(value<<1); \ 112 } \ 113 __gpio_set_pin(SPEN); \ 114 } while (0) 115 116 #define __lcd_display_pin_init() \ 117 do { \ 118 __cpm_start_tcu(); \ 119 __gpio_as_output(SPEN); /* use SPDA */ \ 120 __gpio_as_output(SPCK); /* use SPCK */ \ 121 __gpio_as_output(SPDA); /* use SPDA */ \ 122 } while (0) 123 124 #define __lcd_display_on() \ 125 do { \ 126 __spi_write_reg1(0x05, 0x1e); \ 127 __spi_write_reg1(0x05, 0x5e); \ 128 __spi_write_reg1(0x07, 0x8d); \ 129 __spi_write_reg1(0x13, 0x01); \ 130 __spi_write_reg1(0x05, 0x5f); \ 131 } while (0) 132 133 #define __lcd_display_off() \ 134 do { \ 135 __spi_write_reg1(0x05, 0x5e); \ 136 } while (0) 137 138 #endif /* __QI_LB60_GPM940B0_H__ */