1 /* 2 * Initialisation code for the stage 2 payload. 3 * 4 * Copyright 2009 (C) Qi Hardware Inc. 5 * Author: Wolfgang Spraul <wolfgang@sharism.cc> 6 * 7 * Copyright (C) 2015, 2016 Paul Boddie <paul@boddie.org.uk> 8 * 9 * This program is free software: you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation, either version 3 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program. If not, see <http://www.gnu.org/licenses/>. 21 */ 22 23 #include "sdram.h" 24 25 .text 26 .extern c_main 27 .extern _tlb_entry 28 .extern _exc_entry 29 .extern _irq_entry 30 .extern _end_entries 31 .extern _got_start 32 .extern _got_end 33 .extern _payload_start 34 .extern enter_task 35 .globl _start 36 .globl _enter_task 37 .set noreorder 38 39 _start: 40 b real_start 41 nop 42 43 /* Apparently reserved region which, if used, breaks the USB Boot process. */ 44 45 .word 0 46 .word 0 47 .word 0 48 .word 0 49 .word 0 50 .word 0 51 .word 0 52 .word 0 53 54 real_start: 55 /* Initialise the stack. */ 56 57 la $sp, 0x80080000 58 59 /* Initialise the globals pointer. */ 60 61 lui $gp, %hi(_GLOBAL_OFFSET_TABLE_) 62 ori $gp, $gp, %lo(_GLOBAL_OFFSET_TABLE_) 63 64 move $k0, $ra 65 66 /* Copy TLB handling instructions. */ 67 68 la $t0, _tlb_entry /* start */ 69 li $t1, 0x80000000 70 la $t2, _exc_entry /* end */ 71 jal _copy 72 nop 73 74 /* Copy exception handling instructions. */ 75 76 la $t0, _exc_entry /* start */ 77 li $t1, 0x80000180 78 la $t2, _irq_entry /* end */ 79 jal _copy 80 nop 81 82 /* Copy IRQ handling instructions. */ 83 84 la $t0, _irq_entry /* start */ 85 li $t1, 0x80000200 86 la $t2, _end_entries /* end */ 87 jal _copy 88 nop 89 90 /* Copy the offset table for user mode programs. */ 91 92 li $t3, 0x80000000 /* adjustment */ 93 la $t0, _got_start /* start */ 94 la $t1, _payload_start 95 subu $t1, $t0, $t1 96 addiu $t1, $t1, 0x1000 97 addu $t1, $t1, $t3 /* target = start - payload start + 0x80001000 */ 98 la $t2, _got_end /* end */ 99 jal _copy_adjust 100 nop 101 102 move $ra, $k0 103 104 /* Enable caching. */ 105 106 li $t0, CONFIG_CM_CACHABLE_NONCOHERENT 107 mtc0 $t0, $16 /* CP0_CONFIG */ 108 nop 109 110 /* Set up the enter task reference for convenience. */ 111 112 la $t0, enter_task 113 li $t1, 0x80000000 114 /* subu $t0, $t0, $t1 */ 115 la $t1, _enter_task 116 sw $t0, 0($t1) 117 118 /* Start the program. */ 119 120 la $t9, c_main /* load the address of the routine */ 121 j c_main 122 nop 123 124 _enter_task: 125 .word 0 126 127 _copy: 128 /* Copy via $t3 the region from $t0 to $t2 into $t1. */ 129 130 lw $t3, 0($t0) 131 addiu $t0, $t0, 4 132 sw $t3, 0($t1) 133 bne $t0, $t2, _copy 134 addiu $t1, $t1, 4 /* executed in delay slot before branch */ 135 jr $ra 136 nop 137 138 _copy_adjust: 139 /* Copy via $t4 the region from $t0 to $t2 into $t1, adjusting by $t3. */ 140 141 lw $t4, 0($t0) 142 addiu $t0, $t0, 4 143 subu $t4, $t4, $t3 144 sw $t4, 0($t1) 145 bne $t0, $t2, _copy_adjust 146 addiu $t1, $t1, 4 /* executed in delay slot before branch */ 147 jr $ra 148 nop 149 150 .set reorder