1 /* 2 * U-Boot and JzRISC LCD controller definitions 3 * 4 * Copyright (C) 2001 Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 * Copyright (C) 2005-2007, Ingenic Semiconductor Inc. 6 * Copyright (C) Xiangfu Liu <xiangfu@sharism.cc> 7 * Copyright (C) 2015 Paul Boddie <paul@boddie.org.uk> 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of 12 * the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22 * MA 02111-1307 USA 23 */ 24 25 #ifndef __JZLCD_H__ 26 #define __JZLCD_H__ 27 28 unsigned long lcd_get_size(void); 29 void lcd_ctrl_init(void *lcdbase); 30 void lcd_enable(void); 31 void lcd_disable(void); 32 33 /* 34 * Framebuffer characteristics 35 */ 36 struct jzfb_info { 37 unsigned int cfg; /* panel mode and pin usage etc. */ 38 unsigned int w; 39 unsigned int h; 40 unsigned int bpp; /* bit per pixel */ 41 unsigned int fclk; /* frame clk */ 42 unsigned int hsw; /* hsync width, in pclk */ 43 unsigned int vsw; /* vsync width, in line count */ 44 unsigned int elw; /* end of line, in pclk */ 45 unsigned int blw; /* begin of line, in pclk */ 46 unsigned int efw; /* end of frame, in line count */ 47 unsigned int bfw; /* begin of frame, in line count */ 48 }; 49 50 /* 51 * LCD controller stucture for JZSOC: JZ4740 52 */ 53 struct jz_fb_dma_descriptor { 54 unsigned long fdadr; /* Frame descriptor address register */ 55 unsigned long fsadr; /* Frame source address register */ 56 unsigned long fidr; /* Frame ID register */ 57 unsigned long ldcmd; /* Command register */ 58 }; 59 60 /* 61 * Jz LCD info 62 */ 63 struct jz_fb_info { 64 65 unsigned long fdadr0; /* physical address of frame/palette descriptor */ 66 unsigned long fdadr1; /* physical address of frame descriptor */ 67 68 /* DMA descriptors */ 69 struct jz_fb_dma_descriptor *dmadesc_fblow; 70 struct jz_fb_dma_descriptor *dmadesc_fbhigh; 71 struct jz_fb_dma_descriptor *dmadesc_palette; 72 unsigned long screen; /* address of frame buffer */ 73 unsigned long palette; /* address of palette memory */ 74 unsigned int palette_size; 75 }; 76 77 /* 78 * Concise display characteristics with low-level structure reference 79 */ 80 typedef struct vidinfo { 81 unsigned short vl_col; /* Number of columns (i.e. 640) */ 82 unsigned short vl_row; /* Number of rows (i.e. 480) */ 83 unsigned char vl_bpix; /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8 */ 84 85 struct jz_fb_info jz_fb; 86 } vidinfo_t; 87 88 /* General values for colour depths and framebuffer characteristics. */ 89 90 #define LCD_MONOCHROME 0 91 #define LCD_COLOR2 1 92 #define LCD_COLOR4 2 93 #define LCD_COLOR8 3 94 #define LCD_COLOR16 4 95 #define LCD_COLOR32 5 96 97 /* Calculate number of bits per pixel and number of colours. */ 98 99 #define NBITS(bit_code) (1 << (bit_code)) 100 #define NCOLORS(bit_code) (1 << NBITS(bit_code)) 101 102 /* Transfer and display types. */ 103 104 #define MODE_MASK 0x0f 105 #define MODE_TFT_GEN 0x00 106 #define MODE_TFT_SHARP 0x01 107 #define MODE_TFT_CASIO 0x02 108 #define MODE_TFT_SAMSUNG 0x03 109 #define MODE_CCIR656_NONINT 0x04 110 #define MODE_CCIR656_INT 0x05 111 #define MODE_STN_COLOR_SINGLE 0x08 112 #define MODE_STN_MONO_SINGLE 0x09 113 #define MODE_STN_COLOR_DUAL 0x0a 114 #define MODE_STN_MONO_DUAL 0x0b 115 #define MODE_8BIT_SERIAL_TFT 0x0c 116 117 #define MODE_TFT_18BIT (1<<7) 118 119 #define STN_DAT_PIN1 (0x00 << 4) 120 #define STN_DAT_PIN2 (0x01 << 4) 121 #define STN_DAT_PIN4 (0x02 << 4) 122 #define STN_DAT_PIN8 (0x03 << 4) 123 #define STN_DAT_PINMASK STN_DAT_PIN8 124 125 #define STFT_PSHI (1 << 15) 126 #define STFT_CLSHI (1 << 14) 127 #define STFT_SPLHI (1 << 13) 128 #define STFT_REVHI (1 << 12) 129 130 #define SYNC_MASTER (0 << 16) 131 #define SYNC_SLAVE (1 << 16) 132 133 #define DE_P (0 << 9) 134 #define DE_N (1 << 9) 135 136 #define PCLK_P (0 << 10) 137 #define PCLK_N (1 << 10) 138 139 #define HSYNC_P (0 << 11) 140 #define HSYNC_N (1 << 11) 141 142 #define VSYNC_P (0 << 8) 143 #define VSYNC_N (1 << 8) 144 145 #define DATA_NORMAL (0 << 17) 146 #define DATA_INVERSE (1 << 17) 147 148 #endif /* __JZLCD_H__ */