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Introduced kernel regions for task register storage. |
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Removed superfluous TLB mapping entry. |
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Put the page tables and the stacks in unmapped space, with the stacks occupying |
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Tidied up stack location calculations. |
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Added a generic exception handler to handle TLB misses during exceptions. |
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Minor formatting changes. |
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Fixed absent EPC initialisation. |
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Permit different test patterns. |
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Masking interrupts should not be necessary. |
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Introduced more immediate TLB miss handling in order to avoid stack usage and |
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Added a potentially useful TLB page miss mapping function. |
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Introduced a method of invoking task routines for testing. |
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Added elements of a task switching mechanism. |
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Introduced the start of a more complicated page mapping scheme. |
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Separated error level and interrupt initialisation. |
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Added missing ASID sections to EntryHi register values. |
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Moved status register saving and adjustment, saving the unmodified value. |
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Make a copy of the global offset table for user mode use. |
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Attempt to prevent a system hang by saving certain registers early. |
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Ensure that the GP is set up appropriately for interrupt and TLB miss handling. |
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Disable user mode transitions for now. |
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Fixed the operation of the enter_user_mode function. |
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Merged changes from the branch upon reverting to position-independent code. |
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Switched to position-independent code to enable user mode execution. |
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Pass parameters to the plot_pattern function. |
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Merged fixes. |
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Fixed initial TLB mapping. |
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Moved tlb_handle into the interrupt handling file. Added an idle wait loop. |
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Added index-based page mapping and page unmapping functions, allowing flags and |
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Removed spurious initial TLB mapping, exposing the actual replacement mechanism. |
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Enter user mode before starting the task. |
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Introduced elementary TLB handling; separated out register saving and loading. |
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Introduced a page mapping function. |
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Converted various multi-line macros into inline functions. |
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Removed probably superfluous no-operations and tidied slightly. |
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Mask interrupts while handling them, saving the status and EPC registers. |
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Allow the power button to trigger an interrupt, although handling does not work. |
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Employ normal GPIO level-testing to affect the test pattern, with the power |
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Attempted unsuccessfully to use GPIO interrupts. |
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Added a function to set the pixel depth for future use. |
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Correct bpp discrepancy. |
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Experiment with a different test pattern. |
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Supported 4bpp modes with a simple 121 4-bit RGB mapping. |
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Made the palette size correspond to the pixel depth. |
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Added support for 8bpp output with a simple 332 8-bit RGB palette mapping. |
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Added 16bpp support, fixed/improved dual panel support, handled apparent |
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Fixed region mapping comment. |
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Merged the allocated memory regions into one. |
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Tidied up the memory allocation of the palette and framebuffer regions. |
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Break up mode-specific parts of the LCD initialisation into separate functions. |
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Employed more accurate/appropriate types in structures and removed virtual |
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Use proper pointer arithmetic to initialise structure pointer members. |
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Tidied up, eliminating duplicated code, making functions static. |
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Fix presumed documentation transcription error for GPIO_PXFLGC. |
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Introduced nfd's details into the copyright message. |
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Fixed the TLB entries, allowing framebuffer access in kuseg (up to 0x02000000). |
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Changed the stage 2 base address for usbboot compatibility. |
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Initialise registers so that the stage 2 payload may use interrupts. |
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Added an empty region to the stage 2 header to make it work with USB Boot again. |
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Reverted to the simpler ci20-os (CI20 bare-metal project) handling of |
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