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Made the palette size correspond to the pixel depth. |
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Added support for 8bpp output with a simple 332 8-bit RGB palette mapping. |
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Added 16bpp support, fixed/improved dual panel support, handled apparent |
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Fixed region mapping comment. |
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Merged the allocated memory regions into one. |
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Tidied up the memory allocation of the palette and framebuffer regions. |
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Break up mode-specific parts of the LCD initialisation into separate functions. |
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Employed more accurate/appropriate types in structures and removed virtual |
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Use proper pointer arithmetic to initialise structure pointer members. |
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Tidied up, eliminating duplicated code, making functions static. |
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Fix presumed documentation transcription error for GPIO_PXFLGC. |
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Introduced nfd's details into the copyright message. |
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Fixed the TLB entries, allowing framebuffer access in kuseg (up to 0x02000000). |
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Changed the stage 2 base address for usbboot compatibility. |
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Initialise registers so that the stage 2 payload may use interrupts. |
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Added an empty region to the stage 2 header to make it work with USB Boot again. |
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Reverted to the simpler ci20-os (CI20 bare-metal project) handling of |
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Write through uncached memory to test memory access. This avoids page faults |
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Made the initialisation of interrupts only clear BEV in the status register. |
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Attempted to map two 16MB regions, one for the program and one for the screen. |
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Changed the boot script to actually work with USB Boot, given possible problems |
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Changed the boot script to actually work with USB Boot, given possible problems |
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Changed the payload to load at 0x80000000, positioning the vectors at the base |
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Added a separate "kernel" stack. |
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Reverted dirty bit usage, fixed EntryLo1 setting. |
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Experiment with loading the program at 0x80001000. |
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Modified the page bits and removed the apparently superfluous EBASE operation. |
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Made a common code copying routine (produces spurious assembler warnings). |
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Added more compatibility macros to slightly reduce separate code regions. |
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Introduced TLB/MMU initialisation and moved status/interrupt-related code into |
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Added some debugging functionality. |
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Added ErrorEPC to the stored registers. |
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Minor reformatting and tidying. |
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Added globals pointer initialisation, removed apparently superfluous no-pic flag |
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Attempted to add support for interrupts, although this does not currently work. |
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Moved definitions and corrected them, adding also an interrupt enable function. |
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Changed the style of the linker script, originally to attempt to provide |
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Updated the documentation, noting the switch to xbboot and MMC boot support. |
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Replaced duplicated definitions with a single board-specific header file. |
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Fixed minor licensing details and reformatted boilerplate. |
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Made a separate file containing CPU-specific operations. |
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Fixed licensing to match the xbboot origin. |
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Switched to xbboot usage which supports the revised stage 2 payload. |
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Tidied up the header. |
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Introduced initial support for non-PIC stage 2 payloads that do not need their |
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Added SDRAM pin initialisation for the jz4730 MiniPC. |
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Updated jz4730 MiniPC details; reformatted various definitions. |
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Added a tentative test for a started device to the MiniPC support. |
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Made the stage 2 payload work as a uImage file with U-Boot (2012.10-rc2). |
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Removed the buzzer test for now. Removed result from timer_init. |
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Removed superfluous flag from the linker invocation. |
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Added a buzzer for testing purposes. |
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Replaced direct register usage with convenience macro usage. |
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Removed redundant include flags. |
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Moved framebuffer workspace initialisation into the specific driver file. |
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Added LCD_DE to the supposedly required GPIO pins for the serial LCD. |
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Added uImage generation support. |
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Removed NAND and SDRAM initialisation from the jz4730 stage 1 process. |
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Updated the documentation. |
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Introduced support for building the jz4730 MiniPC target, adding missing |
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