# HG changeset patch # User Paul Boddie # Date 1456438879 -3600 # Node ID 2bfc95ec6a5f34a884dbf17e4637454c807b9cde # Parent 33216055a16c360dfcb8ba428725f67e0c400500 Separated error level and interrupt initialisation. Made use of the EntryHi register instead of the Context register when handling TLB misses in order to obtain the ASID. diff -r 33216055a16c -r 2bfc95ec6a5f stage2/irq.c --- a/stage2/irq.c Thu Feb 25 22:28:24 2016 +0100 +++ b/stage2/irq.c Thu Feb 25 23:21:19 2016 +0100 @@ -62,7 +62,6 @@ void irq_init() { timer_init_irq(); - handle_error_level(); init_interrupts(); enable_interrupts(); } @@ -102,20 +101,22 @@ void tlb_handle() { - u32 context, virtual, physical; + u32 asid, virtual, physical; /* Obtain the bad virtual address. */ asm volatile( - "mfc0 %0, $4\n" /* CP0_CONTEXT */ - : "=r" (context) + "mfc0 %0, $10\n" /* CP0_ENTRYHI */ + "nop\n" + : "=r" (virtual) ); - + /* Obtain a virtual address region with 8KB resolution. */ - - virtual = (context & 0x007ffff0) << 9; - - /* The appropriate physical address depends on the current task. */ + + asid = virtual & 0xff; + virtual = virtual & 0xffffe000; + + /* The appropriate physical address should depend on the current task. */ physical = virtual; @@ -123,6 +124,6 @@ Request a physical region mapping two 4KB pages. Pages employ C=3, dirty, valid, with the task number as the ASID. */ - - map_page(virtual, physical, 4 * 1024, 0x1f, 0); -} + + map_page(virtual, physical, 4 * 1024, 0x1e, asid); +} diff -r 33216055a16c -r 2bfc95ec6a5f stage2/stage2.c --- a/stage2/stage2.c Thu Feb 25 22:28:24 2016 +0100 +++ b/stage2/stage2.c Thu Feb 25 23:21:19 2016 +0100 @@ -44,6 +44,7 @@ } lcd_init(); + handle_error_level(); irq_init(); start_task();