# HG changeset patch # User Paul Boddie # Date 1449340932 -3600 # Node ID 430ab64882a15b0856e0747f03167efd852d0775 # Parent cfc5b09d218b79359b65dc972884bd5957568257 Write through uncached memory to test memory access. This avoids page faults but means that the TLB is not being set up properly. Still, ERL can now be cleared. diff -r cfc5b09d218b -r 430ab64882a1 stage2/lcd.c --- a/stage2/lcd.c Sat Dec 05 19:40:53 2015 +0100 +++ b/stage2/lcd.c Sat Dec 05 19:42:12 2015 +0100 @@ -39,7 +39,7 @@ { unsigned short v_max = panel_info.vl_row; unsigned short h_max = panel_info.vl_col; - u32 *pix = (u32 *)lcd_base + v * h_max + h; + u32 *pix = (u32 *)lcd_base + 0xa0000000 + v * h_max + h; /* NOTE: Code assumes 32 bits/pixel. */ #ifdef NORMAL @@ -70,12 +70,12 @@ void clear_pixel(unsigned short h, unsigned short v) { unsigned short h_max = panel_info.vl_col; - u32 *pix = (u32 *)lcd_base + v * h_max + h; + u32 *pix = (u32 *)lcd_base + 0xa0000000 + v * h_max + h; *pix = 0; } -static void test_pattern(void *lcd_base) +void test_pattern(void *lcd_base) { unsigned short v_max = panel_info.vl_row; unsigned short h_max = panel_info.vl_col; @@ -93,7 +93,7 @@ unsigned short v_max = panel_info.vl_row; unsigned short h_max = panel_info.vl_col; unsigned short v, h; - u32 *pix = (u32 *)lcd_base; + u32 *pix = (u32 *)lcd_base + 0xa0000000; for (v = 0; v < v_max; v += 1) { for (h = 0; h < h_max; h += 1) { diff -r cfc5b09d218b -r 430ab64882a1 stage2/lcd.h --- a/stage2/lcd.h Sat Dec 05 19:40:53 2015 +0100 +++ b/stage2/lcd.h Sat Dec 05 19:42:12 2015 +0100 @@ -10,4 +10,6 @@ void test_pixel(unsigned short h, unsigned short v); void clear_pixel(unsigned short h, unsigned short v); +void test_pattern(); + #endif /* __LCD_H__ */