# HG changeset patch # User Paul Boddie # Date 1499619889 -7200 # Node ID 6cf4059ed4474774695f4f9475e09c58b15c6a8d # Parent 58cf8c659804597a2a4c29b82930a40ee1a8b669 Continued the parameterisation of the LCD configuration activity. diff -r 58cf8c659804 -r 6cf4059ed447 stage2/jzlcd.c --- a/stage2/jzlcd.c Sun Jul 09 18:31:15 2017 +0200 +++ b/stage2/jzlcd.c Sun Jul 09 19:04:49 2017 +0200 @@ -23,8 +23,7 @@ #include "sdram.h" #include "jzlcd.h" #include "board.h" - -extern vidinfo_t panel_info; +#include "xburst_types.h" /* for REG32 */ /* Useful alignment operations. */ @@ -564,34 +563,27 @@ /* Set the colour depth. */ -void lcd_set_bpp(uint8_t bpp) +void jz4740_lcd_set_bpp(uint8_t bpp, vidinfo_t *vid) { - vidinfo_t *vid = &panel_info; vid->jz_fb->bpp = bpp; } -void lcd_enable() +void jz4740_lcd_enable(vidinfo_t *vid) { - vidinfo_t *vid = &panel_info; - /* Clear the disable bit (DIS) and set the enable bit (ENA). */ lcd_ctrl_set(vid, LCD_CTRL, (lcd_ctrl_get(vid, LCD_CTRL) & ~LCD_CTRL_DIS) | LCD_CTRL_ENA); } -void lcd_disable() +void jz4740_lcd_disable(vidinfo_t *vid) { - vidinfo_t *vid = &panel_info; - /* Set the disable bit (DIS). */ lcd_ctrl_set(vid, LCD_CTRL, lcd_ctrl_get(vid, LCD_CTRL) | LCD_CTRL_DIS); } -void lcd_quick_disable() +void jz4740_lcd_quick_disable(vidinfo_t *vid) { - vidinfo_t *vid = &panel_info; - /* Clear the enable bit (ENA) for quick disable. */ lcd_ctrl_set(vid, LCD_CTRL, lcd_ctrl_get(vid, LCD_CTRL) & ~LCD_CTRL_ENA); diff -r 58cf8c659804 -r 6cf4059ed447 stage2/jzlcd.h --- a/stage2/jzlcd.h Sun Jul 09 18:31:15 2017 +0200 +++ b/stage2/jzlcd.h Sun Jul 09 19:04:49 2017 +0200 @@ -1,8 +1,10 @@ /* - * U-Boot and JzRISC LCD controller definitions + * U-Boot and jz4740 LCD controller definitions. * * Copyright (C) 2001 Wolfgang Denk, DENX Software Engineering, wd@denx.de. * Copyright (C) 2005-2007, Ingenic Semiconductor Inc. + * Copyright (C) 2009 Qi Hardware Inc. + * Author: Xiangfu Liu * Copyright (C) Xiangfu Liu * Copyright (C) 2015, 2016, 2017 Paul Boddie * @@ -67,6 +69,8 @@ struct jz_fb_dma_descriptor *dmadesc_fb1; struct jz_fb_dma_descriptor *dmadesc_palette; + /* Region addresses. */ + uint32_t screen; /* address of first frame buffer (base of memory used) */ uint32_t palette; /* address of palette memory */ uint32_t total; /* total memory used */ @@ -80,6 +84,8 @@ void *lcd; /* address of LCD controller registers */ } vidinfo_t; + + /* Public functions. */ uint32_t jz4740_lcd_get_total_size(vidinfo_t *vid); @@ -87,17 +93,19 @@ void jz4740_lcd_ctrl_init(void *lcd_base, void *fb_vaddr, vidinfo_t *vid); void jz4740_lcd_hw_init(vidinfo_t *vid); void jz4740_lcd_dma_init(vidinfo_t *vid); -void lcd_set_bpp(uint8_t bpp); -uint32_t lcd_ctrl_init(); -void lcd_enable(); -void lcd_disable(); +void jz4740_lcd_set_bpp(uint8_t bpp, vidinfo_t *vid); +void jz4740_lcd_enable(vidinfo_t *vid); +void jz4740_lcd_disable(vidinfo_t *vid); +void jz4740_lcd_quick_disable(vidinfo_t *vid); + + /* Alignment/rounding macros. */ #define ALIGN(x,a) __ALIGN_MASK((x),(typeof(x))(a)-1) #define __ALIGN_MASK(x,mask) (((x)+(mask))&~(mask)) -/* Transfer and display types. */ +/* Display device mode select (LCD_CFG.MODE). */ #define MODE_MASK 0x0f #define MODE_TFT_GEN 0x00 @@ -112,40 +120,54 @@ #define MODE_STN_MONO_DUAL 0x0b #define MODE_8BIT_SERIAL_TFT 0x0c +/* 16-bit or 18-bit TFT panel selection (LCD_CFG.18/16). */ + #define MODE_TFT_18BIT (1<<7) -#define STN_DAT_PIN1 (0x00 << 4) -#define STN_DAT_PIN2 (0x01 << 4) -#define STN_DAT_PIN4 (0x02 << 4) -#define STN_DAT_PIN8 (0x03 << 4) -#define STN_DAT_PINMASK STN_DAT_PIN8 +/* STN pin utilisation (LCD_CFG.PDW). */ + +#define STN_DAT_PIN1 (0x00 << 4) +#define STN_DAT_PIN2 (0x01 << 4) +#define STN_DAT_PIN4 (0x02 << 4) +#define STN_DAT_PIN8 (0x03 << 4) +#define STN_DAT_PINMASK STN_DAT_PIN8 + +/* Pin reset states (LCD_CFG). */ -#define STFT_PSHI (1 << 15) -#define STFT_CLSHI (1 << 14) -#define STFT_SPLHI (1 << 13) -#define STFT_REVHI (1 << 12) +#define STFT_PSHI (1 << 15) +#define STFT_CLSHI (1 << 14) +#define STFT_SPLHI (1 << 13) +#define STFT_REVHI (1 << 12) -#define SYNC_MASTER (0 << 16) -#define SYNC_SLAVE (1 << 16) +/* Sync direction (LCD_CFG.SYNDIR). */ + +#define SYNC_MASTER (0 << 16) +#define SYNC_SLAVE (1 << 16) + +/* Data enable polarity (LCD_CFG.DEP). */ -#define DE_P (0 << 9) -#define DE_N (1 << 9) +#define DE_P (0 << 9) +#define DE_N (1 << 9) + +/* Pixel clock polarity (LCD_CFG.PCP). */ -#define PCLK_P (0 << 10) -#define PCLK_N (1 << 10) +#define PCLK_P (0 << 10) +#define PCLK_N (1 << 10) -#define HSYNC_P (0 << 11) -#define HSYNC_N (1 << 11) +/* Horizontal sync polarity (LCD_CFG.HSP). */ -#define VSYNC_P (0 << 8) -#define VSYNC_N (1 << 8) +#define HSYNC_P (0 << 11) +#define HSYNC_N (1 << 11) + +/* Vertical sync polarity (LCD_CFG.VSP). */ -#define DATA_NORMAL (0 << 17) -#define DATA_INVERSE (1 << 17) +#define VSYNC_P (0 << 8) +#define VSYNC_N (1 << 8) -/* LCD register base. */ +/* Inverse output data (LCD_CFG.INVDAT). */ -#define LCD_BASE_KSEG1 0xB3050000 +#define DATA_NORMAL (0 << 17) +#define DATA_INVERSE (1 << 17) /* Register offsets. */ diff -r 58cf8c659804 -r 6cf4059ed447 stage2/lcd.c --- a/stage2/lcd.c Sun Jul 09 18:31:15 2017 +0200 +++ b/stage2/lcd.c Sun Jul 09 19:04:49 2017 +0200 @@ -20,6 +20,7 @@ #include "board-display.h" +#include "lcd.h" #include "jzlcd.h" #include "sdram.h" #include "cpu.h" @@ -333,6 +334,36 @@ udelay(1000); } +static void lcd_display_pin_init() +{ + __lcd_display_pin_init(); +} + +static void lcd_display_on() +{ + __lcd_display_on(); +} + +static void lcd_set_bpp(uint8_t bpp) +{ + jz4740_lcd_set_bpp(bpp, &panel_info); +} + +static void lcd_enable() +{ + jz4740_lcd_enable(&panel_info); +} + +static void lcd_disable() +{ + jz4740_lcd_disable(&panel_info); +} + +static void lcd_quick_disable() +{ + jz4740_lcd_quick_disable(&panel_info); +} + uint32_t lcd_ctrl_init() { vidinfo_t *vid = &panel_info; @@ -354,8 +385,8 @@ void lcd_init() { - __lcd_display_pin_init(); - __lcd_display_on(); + lcd_display_pin_init(); + lcd_display_on(); /* Initialise the member here since the address is otherwise invalid. */ diff -r 58cf8c659804 -r 6cf4059ed447 stage2/lcd.h --- a/stage2/lcd.h Sun Jul 09 18:31:15 2017 +0200 +++ b/stage2/lcd.h Sun Jul 09 19:04:49 2017 +0200 @@ -3,6 +3,8 @@ #include +#define LCD_BASE_KSEG1 0xB3050000 + /* Initialisation functions. */ void lcd_init();