# HG changeset patch
# User Paul Boddie <paul@boddie.org.uk>
# Date 1475505386 -7200
# Node ID 6e8ae1e82437e7baa3df6fb4e5a071d6afc9b814
# Parent  cda6ef50864871d7688e3f21bf23cfca7e6d4ba6
Tidied and renamed some memory definitions, attempting to make sure that GPIO
region entries are properly defined.

diff -r cda6ef508648 -r 6e8ae1e82437 stage2/board.h
--- a/stage2/board.h	Mon Oct 03 15:26:26 2016 +0200
+++ b/stage2/board.h	Mon Oct 03 16:36:26 2016 +0200
@@ -1,6 +1,8 @@
 #ifndef __BOARD_H__
 #define __BOARD_H__
 
+#ifndef __ASSEMBLER__
+
 /* Utility functions. */
 
 void udelay(unsigned long);
@@ -29,6 +31,10 @@
 
 #endif /* CONFIG_CPU_JZ4730 */
 
+#endif /* __ASSEMBLER__ */
+
+
+
 /* Select the board definitions according to the configuration. */
 
 #ifdef CONFIG_CPU_JZ4730_MINIPC
diff -r cda6ef508648 -r 6e8ae1e82437 stage2/entry.S
--- a/stage2/entry.S	Mon Oct 03 15:26:26 2016 +0200
+++ b/stage2/entry.S	Mon Oct 03 16:36:26 2016 +0200
@@ -47,7 +47,7 @@
 	andi $k1, $k0, 0xff			/* ASID */
 	li $k0, STAGE2_PAGE_TABLE_TASK
 	mul $k0, $k0, $k1			/* [ASID] (ASID * STAGE2_PAGE_TABLE_TASK) */
-	li $k1, STAGE2_PAGE_TABLE		/* page_table */
+	li $k1, STAGE2_PAGE_TABLE_BASE		/* page_table */
 	addu $k1, $k0, $k1			/* page_table[ASID] */
 
 	mfc0 $k0, CP0_CONTEXT
diff -r cda6ef508648 -r 6e8ae1e82437 stage2/memory.h
--- a/stage2/memory.h	Mon Oct 03 15:26:26 2016 +0200
+++ b/stage2/memory.h	Mon Oct 03 16:36:26 2016 +0200
@@ -1,18 +1,30 @@
 #ifndef __MEMORY_H__
 #define __MEMORY_H__
 
-/* Kernel mode addresses. */
+#include "board.h"
+
+/* Kernel stack addresses. */
 
 #define STAGE2_INIT_STACK	0x80004000
 #define STAGE2_EXCEPTION_STACK	0x80008000
 
-#define STAGE2_PAGE_TABLE	0x81400000
-#define STAGE2_PAGE_TABLE_TASK	0x00008000
+/* Page table details accessed in kernel mode. */
+
+#define STAGE2_PAGE_TABLE_TOP	0x82000000
+#define STAGE2_PAGE_TABLE_BASE	0x81400000
+
+/* Page table virtual address limit. */
+
+#define STAGE2_VIRTUAL_TOP	0x08000000
+
+/* Page table computed task structure size. */
+
+#define STAGE2_PAGE_TABLE_TASK	(STAGE2_VIRTUAL_TOP / (2 * STAGE2_PAGESIZE))
 
 /* User mode and physical addresses. */
 
-#define TASK_GPIO_BASE		0x7fff0000
-#define TASK_STACK_TOP		0x7fff0000
+#define TASK_GPIO_BASE		(STAGE2_VIRTUAL_TOP - GPIO_REGION_SIZE)
+#define TASK_STACK_TOP		TASK_GPIO_BASE
 #define TASK_STACK_PHYSICAL	0x01c00000
 #define TASK_STACK_SIZE		0x00002000
 
diff -r cda6ef508648 -r 6e8ae1e82437 stage2/task_gpio.c
--- a/stage2/task_gpio.c	Mon Oct 03 15:26:26 2016 +0200
+++ b/stage2/task_gpio.c	Mon Oct 03 16:36:26 2016 +0200
@@ -26,12 +26,17 @@
 
 void task_gpio_init(unsigned short task)
 {
+	u32 virtual, physical;
+
         /* Map the I/O region to the task. */
 
-        init_page_table(STAGE2_PAGE_TABLE,
-                TASK_GPIO_BASE,
-                GPIO_BASE,
-                page_size(GPIO_REGION_SIZE), TLB_WRITE, task);
+	for (virtual = TASK_GPIO_BASE, physical = GPIO_BASE;
+		virtual < (u32) TASK_GPIO_BASE + (u32) GPIO_REGION_SIZE;
+		virtual += page_size(STAGE2_PAGESIZE), physical += page_size(STAGE2_PAGESIZE))
+	{
+		init_page_table(STAGE2_PAGE_TABLE_BASE, virtual, physical,
+			page_size(STAGE2_PAGESIZE), TLB_WRITE, task);
+	}
 }
 
 inline void task_gpio_set_pin(unsigned short pin)
diff -r cda6ef508648 -r 6e8ae1e82437 stage2/tasks.c
--- a/stage2/tasks.c	Mon Oct 03 15:26:26 2016 +0200
+++ b/stage2/tasks.c	Mon Oct 03 16:36:26 2016 +0200
@@ -81,7 +81,7 @@
 
 	physical = TASK_STACK_PHYSICAL - TASK_STACK_SIZE * task;
 
-	init_page_table(STAGE2_PAGE_TABLE,
+	init_page_table(STAGE2_PAGE_TABLE_BASE,
 		previous_page(virtual, STAGE2_PAGESIZE),
 		previous_page(physical, STAGE2_PAGESIZE),
 		STAGE2_PAGESIZE, TLB_WRITE, task);
@@ -102,7 +102,7 @@
 
 	/* Map the global object table for the task. */
 
-	init_page_table(STAGE2_PAGE_TABLE,
+	init_page_table(STAGE2_PAGE_TABLE_BASE,
 		user_address((u32) &_got_start),
 		user_address((u32) &_got_copy_start),
 		STAGE2_PAGESIZE, TLB_READ, task);
@@ -113,7 +113,7 @@
 		address < (u32) &_got_start;
 		address = next_page(address, STAGE2_PAGESIZE))
 	{
-		init_page_table(STAGE2_PAGE_TABLE,
+		init_page_table(STAGE2_PAGE_TABLE_BASE,
 			user_address(address),
 			user_address(address),
 			STAGE2_PAGESIZE, TLB_READ, task);
@@ -125,7 +125,7 @@
 		address < (u32) &_memory_end;
 		address = next_page(address, STAGE2_PAGESIZE))
 	{
-		init_page_table(STAGE2_PAGE_TABLE,
+		init_page_table(STAGE2_PAGE_TABLE_BASE,
 			user_address(address),
 			user_address(address),
 			STAGE2_PAGESIZE, TLB_WRITE, task);