# HG changeset patch # User Paul Boddie # Date 1433455685 -7200 # Node ID 9c7a60352d9e078315f43dbcaa5c93bd34dba825 # Parent bc0b11bb6de8af879d015a3a6935af97caaa2ef5 Fixed payload building, header usage, and pin initialisation. diff -r bc0b11bb6de8 -r 9c7a60352d9e Makefile --- a/Makefile Fri Jun 05 00:07:00 2015 +0200 +++ b/Makefile Fri Jun 05 00:08:05 2015 +0200 @@ -23,17 +23,23 @@ OBJCOPY=$(ARCH)-objcopy OBJDUMP=$(ARCH)-objdump -CFLAGS = -Wall -fno-unit-at-a-time -fno-zero-initialized-in-bss \ - -march=mips32 -mno-abi-calls \ - -Iinclude +# NOTE: -O2 is actually needed to prevent memcpy references, whereas probably +# NOTE: one of the -f{freestanding, no-hosted, no-builtin} options should work. +# NOTE: See: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=56888 + +ASM_INC = /usr/src/linux-headers-4.0.0-1-common/arch/mips/include +CFLAGS = -O2 -Wall -fno-pic -fno-unit-at-a-time -fno-zero-initialized-in-bss \ + -ffreestanding -fno-hosted -fno-builtin \ + -march=mips32 -mno-abicalls \ + -Iinclude -I$(ASM_INC) -I$(ASM_INC)/asm/mach-generic LDFLAGS = -nostdlib -EL -T target.ld PAYLOAD = stage1.bin TARGET = $(PAYLOAD:.bin=.elf) DUMP = $(PAYLOAD:.bin=.dump) MAP = $(PAYLOAD:.bin=.map) -SRC = head.S stage1.c board-jz4740.c -OBJ = $(SRC:.c=.o) +SRC = head.S stage1.c board-nanonote.c +OBJ = $(filter %.o,$(SRC:.c=.o) $(SRC:.S=.o)) .PHONY: all clean distclean @@ -45,10 +51,7 @@ distclean: clean echo "Nothing else to clean." -$(TARGET): $(OBJ) - $(LD) $(LDFLAGS) $(OBJ) -o $@ - -.bin.elf: +$(PAYLOAD): $(TARGET) $(OBJCOPY) -O binary $< $@+ $(OBJDUMP) -D $< > $(DUMP) $(OBJDUMP) -h $< > $(MAP) @@ -56,6 +59,9 @@ chmod -x $@+ mv -f $@+ $@ +$(TARGET): $(OBJ) + $(LD) $(LDFLAGS) $(OBJ) -o $@ + .c.o: $(CC) -c $(CFLAGS) $< -o $@ diff -r bc0b11bb6de8 -r 9c7a60352d9e board-nanonote.c --- a/board-nanonote.c Fri Jun 05 00:07:00 2015 +0200 +++ b/board-nanonote.c Fri Jun 05 00:08:05 2015 +0200 @@ -21,6 +21,7 @@ #include "jz4740.h" #include "configs.h" +#include "nanonote.h" void gpio_init(void) { @@ -37,7 +38,7 @@ /* * Initialize LCD pins */ - __gpio_as_lcd_8bit(); + __gpio_as_slcd_8bit(); /* * Initialize MSC pins diff -r bc0b11bb6de8 -r 9c7a60352d9e include/configs.h --- a/include/configs.h Fri Jun 05 00:07:00 2015 +0200 +++ b/include/configs.h Fri Jun 05 00:08:05 2015 +0200 @@ -24,7 +24,7 @@ /* Here are these common definitions */ /* Once your system configration change, just modify the file */ -#include "target/xburst_types.h" +#include "xburst_types.h" #define CONFIG_NR_DRAM_BANKS 1 /* SDRAM BANK Number: 1, 2*/ #define SDRAM_CASL 3 /* CAS latency: 2 or 3 */ diff -r bc0b11bb6de8 -r 9c7a60352d9e stage1.c --- a/stage1.c Fri Jun 05 00:07:00 2015 +0200 +++ b/stage1.c Fri Jun 05 00:08:05 2015 +0200 @@ -20,6 +20,7 @@ #include "jz4740.h" #include "board-nanonote.h" +#include "usb_boot_defines.h" struct fw_args *fw_args; volatile u32 CPU_ID; @@ -62,5 +63,4 @@ gpio_init(); pll_init(); sdram_init(); - nand_init(); }