# HG changeset patch
# User Paul Boddie <paul@boddie.org.uk>
# Date 1475447956 -7200
# Node ID a95d655275ac2a60a5f05af7e2a4273373e48f36
# Parent  62eec209b04febbec5fa3fb039d191a62b863374
Added initial support for task-based GPIO access.

diff -r 62eec209b04f -r a95d655275ac stage2/Makefile
--- a/stage2/Makefile	Sun Oct 02 22:38:07 2016 +0200
+++ b/stage2/Makefile	Mon Oct 03 00:39:16 2016 +0200
@@ -60,7 +60,7 @@
 
 # Configure generic objects.
 
-CORE_SRC = stage2.c cpu.c lcd.c jzlcd.c board.c irq.c paging.c tasks.c
+CORE_SRC = stage2.c cpu.c lcd.c jzlcd.c board.c irq.c paging.c tasks.c task_gpio.c
 CORE_OBJ = $(CORE_SRC:.c=.o)
 
 # Add tasks.
diff -r 62eec209b04f -r a95d655275ac stage2/task_gpio.c
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/stage2/task_gpio.c	Mon Oct 03 00:39:16 2016 +0200
@@ -0,0 +1,50 @@
+/*
+ * GPIO access for tasks.
+ *
+ * Copyright (C) 2016 Paul Boddie <paul@boddie.org.uk>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "board.h"
+#include "mips.h"
+#include "cpu.h"
+#include "paging.h"
+#include "memory.h"
+#include "task_gpio.h"
+
+void task_gpio_init(unsigned short task)
+{
+        /* Map the I/O region to the task. */
+
+        init_page_table(STAGE2_PAGE_TABLE,
+                TASK_GPIO_BASE,
+                GPIO_BASE,
+                page_size(GPIO_REGION_SIZE), TLB_WRITE, task);
+}
+
+inline void task_gpio_set_pin(unsigned short pin)
+{
+        TASK_REG_GPIO_PXDATS(pin / 32) = (1 << (pin % 32));
+}
+
+inline void task_gpio_clear_pin(unsigned short pin)
+{
+        TASK_REG_GPIO_PXDATS(pin / 32) = (1 << (pin % 32));
+}
+
+inline int task_gpio_get_pin(unsigned short pin)
+{
+	return TASK_REG_GPIO_PXPIN(pin / 32) & (1 << (pin % 32));
+}
diff -r 62eec209b04f -r a95d655275ac stage2/task_gpio.h
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/stage2/task_gpio.h	Mon Oct 03 00:39:16 2016 +0200
@@ -0,0 +1,24 @@
+#ifndef __TASK_GPIO_H__
+#define __TASK_GPIO_H__
+
+#include "memory.h"
+#include "xburst_types.h"
+
+/* Special task versions of GPIO operations. */
+
+#define TASK_GPIO_PXPIN(n)	(TASK_GPIO_BASE + (0x00 + (n)*0x100)) /* PIN Level Register */
+#define TASK_GPIO_PXDAT(n)	(TASK_GPIO_BASE + (0x10 + (n)*0x100)) /* Port Data Register */
+#define TASK_GPIO_PXDATS(n)	(TASK_GPIO_BASE + (0x14 + (n)*0x100)) /* Port Data Set Register */
+#define TASK_GPIO_PXDATC(n)	(TASK_GPIO_BASE + (0x18 + (n)*0x100)) /* Port Data Clear Register */
+
+#define TASK_REG_GPIO_PXPIN(n)	REG32(TASK_GPIO_PXPIN((n)))  /* PIN level */
+#define TASK_REG_GPIO_PXDAT(n)	REG32(TASK_GPIO_PXDAT((n)))  /* 1: interrupt pending */
+#define TASK_REG_GPIO_PXDATS(n)	REG32(TASK_GPIO_PXDATS((n)))
+#define TASK_REG_GPIO_PXDATC(n)	REG32(TASK_GPIO_PXDATC((n)))
+
+void task_gpio_init(unsigned short task);
+void task_gpio_set_pin(unsigned short pin);
+void task_gpio_clear_pin(unsigned short pin);
+int task_gpio_get_pin(unsigned short pin);
+
+#endif /* __TASK_GPIO_H__ */