# HG changeset patch
# User Paul Boddie <paul@boddie.org.uk>
# Date 1453678135 -3600
# Node ID d2f7bb50475c3cbe7ee6be432e23e27467fd2c08
# Parent  92c2b5e1a251a547d2b473722b85e9f7d3fc09d4
Break up mode-specific parts of the LCD initialisation into separate functions.

diff -r 92c2b5e1a251 -r d2f7bb50475c stage2/jzlcd.c
--- a/stage2/jzlcd.c	Sun Jan 24 21:37:15 2016 +0100
+++ b/stage2/jzlcd.c	Mon Jan 25 00:28:55 2016 +0100
@@ -103,12 +103,16 @@
 	struct jz_fb_info * fbi;
 
 	fbi = &vid->jz_fb;
+
+	/* Allocate space for descriptors before the palette entries. */
+
 	descriptors = ((struct jz_fb_dma_descriptor *) fbi->palette) - 3;
 	fbi->dmadesc_fblow = (struct jz_fb_dma_descriptor *) &descriptors[0];
 	fbi->dmadesc_fbhigh = (struct jz_fb_dma_descriptor *) &descriptors[1];
 	fbi->dmadesc_palette = (struct jz_fb_dma_descriptor *) &descriptors[2];
 
-	/* populate descriptors */
+	/* Populate descriptors. */
+
 	fbi->dmadesc_fblow->fdadr = fbi->dmadesc_fblow;
 	fbi->dmadesc_fblow->fsadr = fbi->screen + lcd_get_size(vid);
 	fbi->dmadesc_fblow->fidr  = 0;
@@ -140,12 +144,75 @@
 	flush_cache_all();
 }
 
-static int  jz_lcd_hw_init(vidinfo_t *vid)
+static unsigned int jz_lcd_stn_init(unsigned int stnH)
+{
+	unsigned int val = 0;
+
+	switch (jzfb.bpp) {
+	case 1:
+		/* val |= LCD_CTRL_PEDN; */
+	case 2:
+		val |= LCD_CTRL_FRC_2;
+		break;
+	case 4:
+		val |= LCD_CTRL_FRC_4;
+		break;
+	case 8:
+	default:
+		val |= LCD_CTRL_FRC_16;
+		break;
+	}
+
+	switch (jzfb.cfg & STN_DAT_PINMASK) {
+	case STN_DAT_PIN1:
+		/* Do not adjust the hori-param value. */
+		break;
+	case STN_DAT_PIN2:
+		align2(jzfb.hsw);
+		align2(jzfb.elw);
+		align2(jzfb.blw);
+		break;
+	case STN_DAT_PIN4:
+		align4(jzfb.hsw);
+		align4(jzfb.elw);
+		align4(jzfb.blw);
+		break;
+	case STN_DAT_PIN8:
+		align8(jzfb.hsw);
+		align8(jzfb.elw);
+		align8(jzfb.blw);
+		break;
+	}
+
+	REG_LCD_VSYNC = (0 << 16) | jzfb.vsw;
+	REG_LCD_HSYNC = ((jzfb.blw+jzfb.w) << 16) | (jzfb.blw+jzfb.w+jzfb.hsw);
+
+	/* Screen setting */
+	REG_LCD_VAT = ((jzfb.blw + jzfb.w + jzfb.hsw + jzfb.elw) << 16) | (stnH + jzfb.vsw + jzfb.bfw + jzfb.efw);
+	REG_LCD_DAH = (jzfb.blw << 16) | (jzfb.blw + jzfb.w);
+	REG_LCD_DAV = (0 << 16) | (stnH);
+
+	/* AC BIAs signal */
+	REG_LCD_PS = (0 << 16) | (stnH+jzfb.vsw+jzfb.efw+jzfb.bfw);
+
+	return val;
+}
+
+static void jz_lcd_tft_init()
+{
+	REG_LCD_VSYNC = (0 << 16) | jzfb.vsw;
+	REG_LCD_HSYNC = (0 << 16) | jzfb.hsw;
+	REG_LCD_DAV =((jzfb.vsw+jzfb.bfw) << 16) | (jzfb.vsw +jzfb.bfw+jzfb.h);
+	REG_LCD_DAH = ((jzfb.hsw + jzfb.blw) << 16) | (jzfb.hsw + jzfb.blw + jzfb.w );
+	REG_LCD_VAT = (((jzfb.blw + jzfb.w + jzfb.elw + jzfb.hsw)) << 16) \
+		| (jzfb.vsw + jzfb.bfw + jzfb.h + jzfb.efw);
+}
+
+static int jz_lcd_hw_init(vidinfo_t *vid)
 {
 	struct jz_fb_info *fbi = &vid->jz_fb;
 	unsigned int val = 0;
 	unsigned int pclk;
-	unsigned int stnH;
 #ifndef CONFIG_CPU_JZ4730
 	int pll_div;
 #endif
@@ -183,103 +250,28 @@
 	switch (jzfb.cfg & MODE_MASK) {
 	case MODE_STN_MONO_DUAL:
 	case MODE_STN_COLOR_DUAL:
-	case MODE_STN_MONO_SINGLE:
-	case MODE_STN_COLOR_SINGLE:
-		switch (jzfb.bpp) {
-		case 1:
-			/* val |= LCD_CTRL_PEDN; */
-		case 2:
-			val |= LCD_CTRL_FRC_2;
-			break;
-		case 4:
-			val |= LCD_CTRL_FRC_4;
-			break;
-		case 8:
-		default:
-			val |= LCD_CTRL_FRC_16;
-			break;
-		}
+		val |= jz_lcd_stn_init(jzfb.h >> 1);
 		break;
-	}
 
-	val |= LCD_CTRL_BST_16;		/* Burst Length is 16WORD=64Byte */
-	val |= LCD_CTRL_OFUP;		/* OutFIFO underrun protect */
-
-	switch (jzfb.cfg & MODE_MASK) {
-	case MODE_STN_MONO_DUAL:
-	case MODE_STN_COLOR_DUAL:
 	case MODE_STN_MONO_SINGLE:
 	case MODE_STN_COLOR_SINGLE:
-		switch (jzfb.cfg & STN_DAT_PINMASK) {
-		case STN_DAT_PIN1:
-			/* Do not adjust the hori-param value. */
-			break;
-		case STN_DAT_PIN2:
-			align2(jzfb.hsw);
-			align2(jzfb.elw);
-			align2(jzfb.blw);
-			break;
-		case STN_DAT_PIN4:
-			align4(jzfb.hsw);
-			align4(jzfb.elw);
-			align4(jzfb.blw);
-			break;
-		case STN_DAT_PIN8:
-			align8(jzfb.hsw);
-			align8(jzfb.elw);
-			align8(jzfb.blw);
-			break;
-		}
-		break;
-	}
-
-	REG_LCD_CTRL = val;
-
-	switch (jzfb.cfg & MODE_MASK) {
-	case MODE_STN_MONO_DUAL:
-	case MODE_STN_COLOR_DUAL:
-	case MODE_STN_MONO_SINGLE:
-	case MODE_STN_COLOR_SINGLE:
-		if (((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL) ||
-		    ((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL))
-			stnH = jzfb.h >> 1;
-		else
-			stnH = jzfb.h;
-
-		REG_LCD_VSYNC = (0 << 16) | jzfb.vsw;
-		REG_LCD_HSYNC = ((jzfb.blw+jzfb.w) << 16) | (jzfb.blw+jzfb.w+jzfb.hsw);
-
-		/* Screen setting */
-		REG_LCD_VAT = ((jzfb.blw + jzfb.w + jzfb.hsw + jzfb.elw) << 16) | (stnH + jzfb.vsw + jzfb.bfw + jzfb.efw);
-		REG_LCD_DAH = (jzfb.blw << 16) | (jzfb.blw + jzfb.w);
-		REG_LCD_DAV = (0 << 16) | (stnH);
-
-		/* AC BIAs signal */
-		REG_LCD_PS = (0 << 16) | (stnH+jzfb.vsw+jzfb.efw+jzfb.bfw);
-
+		val |= jz_lcd_stn_init(jzfb.h);
 		break;
 
 	case MODE_TFT_GEN:
-	case MODE_TFT_SHARP:
 	case MODE_TFT_CASIO:
-	case MODE_TFT_SAMSUNG:
 	case MODE_8BIT_SERIAL_TFT:
 	case MODE_TFT_18BIT:
-		REG_LCD_VSYNC = (0 << 16) | jzfb.vsw;
-		REG_LCD_HSYNC = (0 << 16) | jzfb.hsw;
-		REG_LCD_DAV =((jzfb.vsw+jzfb.bfw) << 16) | (jzfb.vsw +jzfb.bfw+jzfb.h);
-		REG_LCD_DAH = ((jzfb.hsw + jzfb.blw) << 16) | (jzfb.hsw + jzfb.blw + jzfb.w );
-		REG_LCD_VAT = (((jzfb.blw + jzfb.w + jzfb.elw + jzfb.hsw)) << 16) \
-			| (jzfb.vsw + jzfb.bfw + jzfb.h + jzfb.efw);
+		jz_lcd_tft_init();
 		break;
-	}
 
-	switch (jzfb.cfg & MODE_MASK) {
 	case MODE_TFT_SAMSUNG:
 	{
 		unsigned int total, tp_s, tp_e, ckv_s, ckv_e;
 		unsigned int rev_s, rev_e, inv_s, inv_e;
 
+		jz_lcd_tft_init();
+
 		pclk = val * (jzfb.w + jzfb.hsw + jzfb.elw + jzfb.blw) *
 			(jzfb.h + jzfb.vsw + jzfb.efw + jzfb.bfw); /* Pixclk */
 
@@ -300,10 +292,14 @@
 		jzfb.cfg |= STFT_REVHI | STFT_SPLHI;
 		break;
 	}
+
 	case MODE_TFT_SHARP:
 	{
 		unsigned int total, cls_s, cls_e, ps_s, ps_e;
 		unsigned int spl_s, spl_e, rev_s, rev_e;
+
+		jz_lcd_tft_init();
+
 		total = jzfb.blw + jzfb.w + jzfb.elw + jzfb.hsw;
 		spl_s = 1;
 		spl_e = spl_s + 1;
@@ -320,11 +316,16 @@
 		REG_LCD_REV = (rev_s << 16) | rev_e;
 		break;
 	}
-	case MODE_TFT_CASIO:
+
+	default:
 		break;
 	}
 
 	/* Configure the LCD panel */
+
+	val |= LCD_CTRL_BST_16;		/* Burst Length is 16WORD=64Byte */
+	val |= LCD_CTRL_OFUP;		/* OutFIFO underrun protect */
+	REG_LCD_CTRL = val;
 	REG_LCD_CFG = jzfb.cfg;
 
 	/* Timing setting */
@@ -391,6 +392,8 @@
 	__cpm_start_lcd();
 	udelay(1000);
 
+	/* Configure DMA. */
+
 	REG_LCD_DA0 = (unsigned long) fbi->fdadr0; /* frame descriptor */
 
 	if (((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL) ||