1.1 --- a/stage2/cpu.c Fri Feb 26 01:09:43 2016 +0100
1.2 +++ b/stage2/cpu.c Fri Feb 26 01:13:51 2016 +0100
1.3 @@ -239,6 +239,28 @@
1.4 );
1.5 }
1.6
1.7 +void map_page_miss(u32 physical, u32 pagesize, u8 flags)
1.8 +{
1.9 + u32 lower = ((physical & 0xfffff000) >> 6) | flags;
1.10 + u32 upper = (((physical + pagesize) & 0xfffff000) >> 6) | flags;
1.11 + u32 pagemask = ((pagesize - 1) & 0xfffff000) << 1;
1.12 +
1.13 + asm volatile(
1.14 + "mtc0 %2, $5\n" /* CP0_PAGEMASK */
1.15 +
1.16 + /* Set physical address. */
1.17 +
1.18 + "mtc0 %0, $2\n" /* CP0_ENTRYLO0 */
1.19 + "mtc0 %1, $3\n" /* CP0_ENTRYLO1 */
1.20 + "nop\n"
1.21 +
1.22 + "tlbwr\n"
1.23 + "nop"
1.24 + :
1.25 + : "r" (lower), "r" (upper), "r" (pagemask)
1.26 + );
1.27 +}
1.28 +
1.29 void unmap_page(u32 virtual, u32 physical, u32 pagesize, u8 flags, u8 asid)
1.30 {
1.31 u32 start = (virtual & 0xffffe000) | asid; /* VPN2 | ASID*/
2.1 --- a/stage2/cpu.h Fri Feb 26 01:09:43 2016 +0100
2.2 +++ b/stage2/cpu.h Fri Feb 26 01:13:51 2016 +0100
2.3 @@ -12,6 +12,7 @@
2.4 void init_interrupts(void);
2.5 void init_tlb(void);
2.6 void map_page(u32, u32, u32, u8, u8);
2.7 +void map_page_miss(u32, u32, u8);
2.8 void map_page_index(u32, u32, u32, u8, u8, u32);
2.9 void unmap_page(u32, u32, u32, u8, u8);
2.10
3.1 --- a/stage2/irq.c Fri Feb 26 01:09:43 2016 +0100
3.2 +++ b/stage2/irq.c Fri Feb 26 01:13:51 2016 +0100
3.3 @@ -138,7 +138,7 @@
3.4 Pages employ C=3, dirty, valid, with the task number as the ASID.
3.5 */
3.6
3.7 - map_page(virtual, physical, pagesize, 0x1e, asid);
3.8 + map_page_miss(physical, pagesize, 0x1e);
3.9 }
3.10
3.11 void start_task(unsigned short task)