1.1 --- a/include/mips.h Mon Oct 03 18:27:56 2016 +0200
1.2 +++ b/include/mips.h Mon Oct 03 21:46:10 2016 +0200
1.3 @@ -27,6 +27,7 @@
1.4 #define CAUSE_IV 0x00800000
1.5
1.6 #define TLB_CACHED 0x00000018
1.7 +#define TLB_UNCACHED 0x00000010
1.8 #define TLB_DIRTY 0x00000004
1.9 #define TLB_VALID 0x00000002
1.10 #define TLB_GLOBAL 0x00000001
2.1 --- a/stage2/task_gpio.c Mon Oct 03 18:27:56 2016 +0200
2.2 +++ b/stage2/task_gpio.c Mon Oct 03 21:46:10 2016 +0200
2.3 @@ -35,10 +35,20 @@
2.4 virtual += page_size(STAGE2_PAGESIZE), physical += page_size(STAGE2_PAGESIZE))
2.5 {
2.6 init_page_table(STAGE2_PAGE_TABLE_BASE, virtual, physical,
2.7 - page_size(STAGE2_PAGESIZE), TLB_WRITE, task);
2.8 + page_size(STAGE2_PAGESIZE), TLB_UNCACHED | TLB_DIRTY | TLB_VALID, task);
2.9 }
2.10 }
2.11
2.12 +void task_gpio_as_input(unsigned short pin)
2.13 +{
2.14 + TASK_REG_GPIO_PXDIRC(pin / 32) = (1 << (pin % 32));
2.15 +}
2.16 +
2.17 +void task_gpio_as_output(unsigned short pin)
2.18 +{
2.19 + TASK_REG_GPIO_PXDIRS(pin / 32) = (1 << (pin % 32));
2.20 +}
2.21 +
2.22 inline void task_gpio_set_pin(unsigned short pin)
2.23 {
2.24 TASK_REG_GPIO_PXDATS(pin / 32) = (1 << (pin % 32));
3.1 --- a/stage2/task_gpio.h Mon Oct 03 18:27:56 2016 +0200
3.2 +++ b/stage2/task_gpio.h Mon Oct 03 21:46:10 2016 +0200
3.3 @@ -11,12 +11,22 @@
3.4 #define TASK_GPIO_PXDATS(n) (TASK_GPIO_BASE + (0x14 + (n)*0x100)) /* Port Data Set Register */
3.5 #define TASK_GPIO_PXDATC(n) (TASK_GPIO_BASE + (0x18 + (n)*0x100)) /* Port Data Clear Register */
3.6
3.7 -#define TASK_REG_GPIO_PXPIN(n) REG32(TASK_GPIO_PXPIN((n))) /* PIN level */
3.8 -#define TASK_REG_GPIO_PXDAT(n) REG32(TASK_GPIO_PXDAT((n))) /* 1: interrupt pending */
3.9 +#define TASK_GPIO_PXDIR(n) (TASK_GPIO_BASE + (0x60 + (n)*0x100)) /* Direction Register */
3.10 +#define TASK_GPIO_PXDIRS(n) (TASK_GPIO_BASE + (0x64 + (n)*0x100)) /* Direction Set Register */
3.11 +#define TASK_GPIO_PXDIRC(n) (TASK_GPIO_BASE + (0x68 + (n)*0x100)) /* Direction Clear Register */
3.12 +
3.13 +#define TASK_REG_GPIO_PXPIN(n) REG32(TASK_GPIO_PXPIN((n)))
3.14 +#define TASK_REG_GPIO_PXDAT(n) REG32(TASK_GPIO_PXDAT((n)))
3.15 #define TASK_REG_GPIO_PXDATS(n) REG32(TASK_GPIO_PXDATS((n)))
3.16 #define TASK_REG_GPIO_PXDATC(n) REG32(TASK_GPIO_PXDATC((n)))
3.17
3.18 +#define TASK_REG_GPIO_PXDIR(n) REG32(TASK_GPIO_PXDIR((n)))
3.19 +#define TASK_REG_GPIO_PXDIRS(n) REG32(TASK_GPIO_PXDIRS((n)))
3.20 +#define TASK_REG_GPIO_PXDIRC(n) REG32(TASK_GPIO_PXDIRC((n)))
3.21 +
3.22 void task_gpio_init(unsigned short task);
3.23 +void task_gpio_as_input(unsigned short pin);
3.24 +void task_gpio_as_output(unsigned short pin);
3.25 void task_gpio_set_pin(unsigned short pin);
3.26 void task_gpio_clear_pin(unsigned short pin);
3.27 int task_gpio_get_pin(unsigned short pin);