1.1 --- a/README.txt Sat Jun 13 00:06:18 2015 +0200
1.2 +++ b/README.txt Wed Feb 24 16:13:46 2016 +0100
1.3 @@ -8,19 +8,45 @@
1.4 routines for "bare metal" software usage in order to illustrate the
1.5 initialisation requirements and to make it possible to deploy other software.
1.6
1.7 +An attempt has been made to also generate payloads for the jz4730-based
1.8 +MiniPC/Mipsbook/Minibook device. This device does not appear to support USB
1.9 +boot mode, and thus any payloads will need to be deployed by other means, such
1.10 +as through the use of SD/MMC media.
1.11 +
1.12 +Deployment over USB
1.13 +-------------------
1.14 +
1.15 The payloads can be deployed on the Ben NanoNote using the USB boot mode as
1.16 described on the Qi-Hardware site:
1.17
1.18 http://en.qi-hardware.com/wiki/USB_BOOT_mode
1.19
1.20 -A suitable command can be issued on a USB host machine as follows (given
1.21 +The provided script can be issued on a USB host machine as follows (given
1.22 sufficient privileges):
1.23
1.24 -usbboot -c 'boot' -1 stage1/stage1.bin -2 stage2/stage2.bin
1.25 +./boot_usb
1.26 +
1.27 +This employs the xbboot program which is available in the xburst-tools
1.28 +package:
1.29 +
1.30 +http://en.qi-hardware.com/wiki/Xburst-tools
1.31 +
1.32 +The different MiniPC products do not appear to support USB boot.
1.33 +
1.34 +Deployment using microSD/SD/MMC Media
1.35 +-------------------------------------
1.36
1.37 -An attempt has been made to also generate payloads for the jz4730-based
1.38 -MiniPC/Mipsbook/Minibook device. This device does not appear to support USB
1.39 -boot mode, and thus any payloads will need to be deployed by other means.
1.40 +The stage 2 payload can be written to a suitable media card as a uImage file
1.41 +which can then be loaded and invoked by a U-Boot bootloader already installed
1.42 +on the Ben NanoNote or MiniPC product.
1.43 +
1.44 +Typically, U-Boot on the Ben NanoNote will look for such a file located at
1.45 +/boot/uImage within the first partition of a microSD card. On the MiniPC,
1.46 +U-Boot will look for a file located at /uImage (in other words, a file called
1.47 +uImage in the top-level directory) within the first partition of an SD card.
1.48 +
1.49 +Since U-Boot should have initialised the RAM and clocks, the stage 1 payload
1.50 +is superfluous, and only the stage 2 payload is needed in this situation.
1.51
1.52 Related U-Boot Resources
1.53 ------------------------
2.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
2.2 +++ b/boot_usb Wed Feb 24 16:13:46 2016 +0100
2.3 @@ -0,0 +1,31 @@
2.4 +#!/bin/sh
2.5 +
2.6 +# To use the installed stage1 payload...
2.7 +
2.8 +if [ "$1" = '--default1' ]; then
2.9 + if xbboot -u 0x81c00000 stage2/stage2.bin ; then
2.10 + exit 0
2.11 + else
2.12 + exit 1
2.13 + fi
2.14 +
2.15 +# To use usbboot, which is less elegant but sometimes more reliable...
2.16 +
2.17 +elif [ "$1" = '--usbboot' ]; then
2.18 + if usbboot -c 'boot' -1 stage1/stage1.bin -2 stage2/stage2.bin ; then
2.19 + exit 0
2.20 + else
2.21 + exit 1
2.22 + fi
2.23 +fi
2.24 +
2.25 +# Otherwise, use the generated payloads with xbboot.
2.26 +
2.27 +xbboot set_addr 0x80002000
2.28 +xbboot bulk_write stage1/stage1.bin
2.29 +xbboot start1 0x80002000
2.30 +xbboot get_info
2.31 +xbboot set_addr 0x81c00000
2.32 +xbboot bulk_write stage2/stage2.bin
2.33 +xbboot flush_cache
2.34 +xbboot start2 0x81c00000
3.1 --- a/include/jz4730.h Sat Jun 13 00:06:18 2015 +0200
3.2 +++ b/include/jz4730.h Wed Feb 24 16:13:46 2016 +0100
3.3 @@ -2,7 +2,7 @@
3.4 * Include file for Ingenic Semiconductor's JZ4730 CPU.
3.5 *
3.6 * Copyright (C) 2006 - 2007 Ingenic Semiconductor Inc.
3.7 - * Copyright (C) 2009 Qi Hardware Inc.,
3.8 + * Copyright (C) 2009 Qi Hardware Inc.
3.9 * Author: Xiangfu Liu <xiangfu@sharism.cc>
3.10 * Copyright (C) 2015 Paul Boddie <paul@boddie.org.uk>
3.11 *
4.1 --- a/include/jz4730_compat.h Sat Jun 13 00:06:18 2015 +0200
4.2 +++ b/include/jz4730_compat.h Wed Feb 24 16:13:46 2016 +0100
4.3 @@ -1,12 +1,12 @@
4.4 /*
4.5 - * Compatibility definitions for using jz4740 code with the jz4730
4.6 + * Compatibility definitions for using jz4740 code with the jz4730.
4.7 *
4.8 * Copyright (C) 2015 Paul Boddie <paul@boddie.org.uk>
4.9 *
4.10 - * This program is free software; you can redistribute it and/or
4.11 - * modify it under the terms of the GNU General Public License
4.12 - * as published by the Free Software Foundation; either version
4.13 - * 3 of the License, or (at your option) any later version.
4.14 + * This program is free software: you can redistribute it and/or modify
4.15 + * it under the terms of the GNU General Public License as published by
4.16 + * the Free Software Foundation, either version 3 of the License, or
4.17 + * (at your option) any later version.
4.18 *
4.19 * This program is distributed in the hope that it will be useful,
4.20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
4.21 @@ -14,9 +14,7 @@
4.22 * GNU General Public License for more details.
4.23 *
4.24 * You should have received a copy of the GNU General Public License
4.25 - * along with this program; if not, write to the Free Software
4.26 - * Foundation, Inc., 51 Franklin Street, Fifth Floor,
4.27 - * Boston, MA 02110-1301, USA
4.28 + * along with this program. If not, see <http://www.gnu.org/licenses/>.
4.29 */
4.30
4.31 #ifndef __JZ4730_COMPAT_H__
4.32 @@ -25,6 +23,7 @@
4.33 #define REG_CPM_CPCCR REG_CPM_CFCR
4.34 #define REG_CPM_CPPCR REG_CPM_PLCR1
4.35
4.36 +#define CPM_CPCCR_CE CPM_CFCR_UPE
4.37 #define CPM_CPCCR_CDIV_BIT CPM_CFCR_IFR_BIT
4.38 #define CPM_CPCCR_HDIV_BIT CPM_CFCR_SFR_BIT
4.39 #define CPM_CPCCR_PDIV_BIT CPM_CFCR_PFR_BIT
4.40 @@ -37,4 +36,6 @@
4.41 #define CPM_CPPCR_PLLST_BIT CPM_PLCR1_PLL1ST_BIT
4.42 #define CPM_CPPCR_PLLEN CPM_PLCR1_PLL1EN
4.43
4.44 +#define __cpm_set_ldiv __cpm_set_lcdclk_div
4.45 +
4.46 #endif /* __JZ4730_COMPAT_H__ */
5.1 --- a/include/jz4740.h Sat Jun 13 00:06:18 2015 +0200
5.2 +++ b/include/jz4740.h Wed Feb 24 16:13:46 2016 +0100
5.3 @@ -2,7 +2,7 @@
5.4 * Include file for Ingenic Semiconductor's JZ4740 CPU.
5.5 *
5.6 * Copyright (C) 2006 - 2007 Ingenic Semiconductor Inc.
5.7 - * Copyright (C) 2009 Qi Hardware Inc.,
5.8 + * Copyright (C) 2009 Qi Hardware Inc.
5.9 * Author: Xiangfu Liu <xiangfu@sharism.cc>
5.10 * Copyright (C) 2015 Paul Boddie <paul@boddie.org.uk>
5.11 *
5.12 @@ -803,7 +803,7 @@
5.13 #define GPIO_PXTRGS(n) (GPIO_BASE + (0x74 + (n)*0x100)) /* Trigger Set Register */
5.14 #define GPIO_PXTRGC(n) (GPIO_BASE + (0x78 + (n)*0x100)) /* Trigger Set Register */
5.15 #define GPIO_PXFLG(n) (GPIO_BASE + (0x80 + (n)*0x100)) /* Port Flag Register */
5.16 -#define GPIO_PXFLGC(n) (GPIO_BASE + (0x14 + (n)*0x100)) /* Port Flag clear Register */
5.17 +#define GPIO_PXFLGC(n) (GPIO_BASE + (0x84 + (n)*0x100)) /* Port Flag clear Register */
5.18
5.19 #define REG_GPIO_PXPIN(n) REG32(GPIO_PXPIN((n))) /* PIN level */
5.20 #define REG_GPIO_PXDAT(n) REG32(GPIO_PXDAT((n))) /* 1: interrupt pending */
6.1 --- a/include/minipc.h Sat Jun 13 00:06:18 2015 +0200
6.2 +++ b/include/minipc.h Wed Feb 24 16:13:46 2016 +0100
6.3 @@ -1,14 +1,14 @@
6.4 /*
6.5 - * MiniPC configuration parameters
6.6 + * MiniPC configuration parameters.
6.7 *
6.8 * Copyright (C) 2009 Qi Hardware Inc.
6.9 * Authors: Xiangfu Liu <xiangfu@openmobilefree.net>
6.10 - * Copyright (C) 2015 Paul Boddie <paul@boddie.org.uk>
6.11 + * Copyright (C) 2015, 2016 Paul Boddie <paul@boddie.org.uk>
6.12 *
6.13 - * This program is free software; you can redistribute it and/or
6.14 - * modify it under the terms of the GNU General Public License
6.15 - * as published by the Free Software Foundation; either version
6.16 - * 3 of the License, or (at your option) any later version.
6.17 + * This program is free software: you can redistribute it and/or modify
6.18 + * it under the terms of the GNU General Public License as published by
6.19 + * the Free Software Foundation, either version 3 of the License, or
6.20 + * (at your option) any later version.
6.21 *
6.22 * This program is distributed in the hope that it will be useful,
6.23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
6.24 @@ -16,23 +16,18 @@
6.25 * GNU General Public License for more details.
6.26 *
6.27 * You should have received a copy of the GNU General Public License
6.28 - * along with this program; if not, write to the Free Software
6.29 - * Foundation, Inc., 51 Franklin Street, Fifth Floor,
6.30 - * Boston, MA 02110-1301, USA
6.31 + * along with this program. If not, see <http://www.gnu.org/licenses/>.
6.32 */
6.33
6.34 #ifndef __MINIPC_H__
6.35 #define __MINIPC_H__
6.36
6.37 /*
6.38 - * Display configuration
6.39 - */
6.40 -#define LCD_BPP LCD_COLOR32
6.41 -
6.42 -/*
6.43 * GPIO definition
6.44 */
6.45 #define GPIO_LED_EN 92
6.46 #define GPIO_DISP_OFF_N 93
6.47 +#define GPIO_PWM0 94
6.48 +#define GPIO_POWER 97
6.49
6.50 #endif /* __MINIPC_H__ */
7.1 --- a/include/nanonote.h Sat Jun 13 00:06:18 2015 +0200
7.2 +++ b/include/nanonote.h Wed Feb 24 16:13:46 2016 +0100
7.3 @@ -1,14 +1,14 @@
7.4 /*
7.5 - * Ben NanoNote configuration parameters
7.6 + * Ben NanoNote configuration parameters.
7.7 *
7.8 * Copyright (C) 2009 Qi Hardware Inc.
7.9 * Authors: Xiangfu Liu <xiangfu@openmobilefree.net>
7.10 - * Copyright (C) 2015 Paul Boddie <paul@boddie.org.uk>
7.11 + * Copyright (C) 2015, 2016 Paul Boddie <paul@boddie.org.uk>
7.12 *
7.13 - * This program is free software; you can redistribute it and/or
7.14 - * modify it under the terms of the GNU General Public License
7.15 - * as published by the Free Software Foundation; either version
7.16 - * 3 of the License, or (at your option) any later version.
7.17 + * This program is free software: you can redistribute it and/or modify
7.18 + * it under the terms of the GNU General Public License as published by
7.19 + * the Free Software Foundation, either version 3 of the License, or
7.20 + * (at your option) any later version.
7.21 *
7.22 * This program is distributed in the hope that it will be useful,
7.23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
7.24 @@ -16,20 +16,13 @@
7.25 * GNU General Public License for more details.
7.26 *
7.27 * You should have received a copy of the GNU General Public License
7.28 - * along with this program; if not, write to the Free Software
7.29 - * Foundation, Inc., 51 Franklin Street, Fifth Floor,
7.30 - * Boston, MA 02110-1301, USA
7.31 + * along with this program. If not, see <http://www.gnu.org/licenses/>.
7.32 */
7.33
7.34 #ifndef __NANONOTE_H__
7.35 #define __NANONOTE_H__
7.36
7.37 /*
7.38 - * Display configuration
7.39 - */
7.40 -#define LCD_BPP LCD_COLOR32
7.41 -
7.42 -/*
7.43 * GPIO definition
7.44 * See: http://en.qi-hardware.com/wiki/Hardware_basics
7.45 */
7.46 @@ -49,6 +42,8 @@
7.47 #define GPIO_KEYIN_BASE (3 * 32 + 18)
7.48 #define GPIO_KEYIN_8 (3 * 32 + 26)
7.49
7.50 +#define GPIO_POWER (3 * 32 + 29)
7.51 +
7.52 #define GPIO_SD_CD_N GPIO_SD_DETECT /* SD Card insert detect */
7.53 #define GPIO_SD_VCC_EN_N GPIO_SDPW_EN /* SD Card Power Enable */
7.54
8.1 --- a/include/sdram.h Sat Jun 13 00:06:18 2015 +0200
8.2 +++ b/include/sdram.h Wed Feb 24 16:13:46 2016 +0100
8.3 @@ -1,14 +1,17 @@
8.4 /*
8.5 - * Common SDRAM configuration
8.6 + * Common SDRAM configuration.
8.7 + *
8.8 + * Copyright (C) 1996, 1997 by Ralf Baechle
8.9 *
8.10 * Copyright (C) 2009 Qi Hardware Inc.
8.11 * Authors: Xiangfu Liu <xiangfu@openmobilefree.net>
8.12 - * Copyright (C) 2015 Paul Boddie <paul@boddie.org.uk>
8.13 + *
8.14 + * Copyright (C) 2015, 2016 Paul Boddie <paul@boddie.org.uk>
8.15 *
8.16 - * This program is free software; you can redistribute it and/or
8.17 - * modify it under the terms of the GNU General Public License
8.18 - * as published by the Free Software Foundation; either version
8.19 - * 3 of the License, or (at your option) any later version.
8.20 + * This program is free software: you can redistribute it and/or modify
8.21 + * it under the terms of the GNU General Public License as published by
8.22 + * the Free Software Foundation, either version 3 of the License, or
8.23 + * (at your option) any later version.
8.24 *
8.25 * This program is distributed in the hope that it will be useful,
8.26 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8.27 @@ -16,19 +19,12 @@
8.28 * GNU General Public License for more details.
8.29 *
8.30 * You should have received a copy of the GNU General Public License
8.31 - * along with this program; if not, write to the Free Software
8.32 - * Foundation, Inc., 51 Franklin Street, Fifth Floor,
8.33 - * Boston, MA 02110-1301, USA
8.34 + * along with this program. If not, see <http://www.gnu.org/licenses/>.
8.35 */
8.36
8.37 #ifndef __SDRAM_H__
8.38 #define __SDRAM_H__
8.39
8.40 -/* virt_to_phys() from u-boot/arch/mips/include/asm/addrspace.h
8.41 - via u-boot/arch/mips/include/asm/io.h */
8.42 -/* #define virt_to_phys(n) (((int) n) & 0x1fffffff) */
8.43 -#define virt_to_phys(n) ((int) n)
8.44 -
8.45 /*
8.46 * RAM configuration
8.47 */
8.48 @@ -69,6 +65,15 @@
8.49 #define CONFIG_SYS_ICACHE_SIZE 16384
8.50 #define CONFIG_SYS_CACHELINE_SIZE 32
8.51
8.52 +#define Index_Invalidate_I 0x00
8.53 +#define Index_Writeback_Inv_D 0x01
8.54 +#define Index_Store_Tag_I 0x08
8.55 +#define Index_Store_Tag_D 0x09
8.56 +#define Hit_Writeback_Inv_D 0x15
8.57 +
8.58 +#define CONFIG_CM_UNCACHED 2
8.59 +#define CONFIG_CM_CACHABLE_NONCOHERENT 3
8.60 +
8.61 /*
8.62 * Memory configuration
8.63 */
9.1 --- a/include/usb_boot_defines.h Sat Jun 13 00:06:18 2015 +0200
9.2 +++ b/include/usb_boot_defines.h Wed Feb 24 16:13:46 2016 +0100
9.3 @@ -1,5 +1,7 @@
9.4 /*
9.5 - * Copyright(C) 2009 Qi Hardware Inc.,
9.6 + * USB boot definitions.
9.7 + *
9.8 + * Copyright (C) 2009 Qi Hardware Inc.
9.9 * Authors: Marek Lindner <lindner_marek@yahoo.de>
9.10 * Xiangfu Liu <xiangfu@sharism.cc>
9.11 *
10.1 --- a/include/xburst_types.h Sat Jun 13 00:06:18 2015 +0200
10.2 +++ b/include/xburst_types.h Wed Feb 24 16:13:46 2016 +0100
10.3 @@ -1,11 +1,13 @@
10.4 /*
10.5 - * Copyright 2009 (C) Qi Hardware Inc.,
10.6 + * Ingenic XBurst type definitions.
10.7 + *
10.8 + * Copyright 2009 (C) Qi Hardware Inc.
10.9 * Author: Xiangfu Liu <xiangfu@sharism.cc>
10.10 *
10.11 - * This program is free software; you can redistribute it and/or
10.12 - * modify it under the terms of the GNU General Public License
10.13 - * as published by the Free Software Foundation; either version
10.14 - * 3 of the License, or (at your option) any later version.
10.15 + * This program is free software: you can redistribute it and/or modify
10.16 + * it under the terms of the GNU General Public License as published by
10.17 + * the Free Software Foundation, either version 3 of the License, or
10.18 + * (at your option) any later version.
10.19 *
10.20 * This program is distributed in the hope that it will be useful,
10.21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10.22 @@ -13,9 +15,7 @@
10.23 * GNU General Public License for more details.
10.24 *
10.25 * You should have received a copy of the GNU General Public License
10.26 - * along with this program; if not, write to the Free Software
10.27 - * Foundation, Inc., 51 Franklin Street, Fifth Floor,
10.28 - * Boston, MA 02110-1301, USA
10.29 + * along with this program. If not, see <http://www.gnu.org/licenses/>.
10.30 */
10.31
10.32 #ifndef __XBURST_TYPES_H__
11.1 --- a/stage1/Makefile Sat Jun 13 00:06:18 2015 +0200
11.2 +++ b/stage1/Makefile Wed Feb 24 16:13:46 2016 +0100
11.3 @@ -3,18 +3,18 @@
11.4 # Copyright (C) 2015 Paul Boddie <paul@boddie.org.uk>
11.5 # Copyright (C) Xiangfu Liu <xiangfu@sharism.cc>
11.6 #
11.7 -# This program is free software; you can redistribute it and/or modify it under
11.8 -# the terms of the GNU General Public License as published by the Free Software
11.9 -# Foundation; either version 3 of the License, or (at your option) any later
11.10 -# version.
11.11 +# This program is free software: you can redistribute it and/or modify
11.12 +# it under the terms of the GNU General Public License as published by
11.13 +# the Free Software Foundation, either version 3 of the License, or
11.14 +# (at your option) any later version.
11.15 #
11.16 -# This program is distributed in the hope that it will be useful, but WITHOUT
11.17 -# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
11.18 -# FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
11.19 -# details.
11.20 +# This program is distributed in the hope that it will be useful,
11.21 +# but WITHOUT ANY WARRANTY; without even the implied warranty of
11.22 +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11.23 +# GNU General Public License for more details.
11.24 #
11.25 -# You should have received a copy of the GNU General Public License along with
11.26 -# this program. If not, see <http://www.gnu.org/licenses/>.
11.27 +# You should have received a copy of the GNU General Public License
11.28 +# along with this program. If not, see <http://www.gnu.org/licenses/>.
11.29
11.30 ARCH = mipsel-linux-gnu
11.31 CC = $(ARCH)-gcc
12.1 --- a/stage1/board.c Sat Jun 13 00:06:18 2015 +0200
12.2 +++ b/stage1/board.c Wed Feb 24 16:13:46 2016 +0100
12.3 @@ -7,18 +7,18 @@
12.4 * Copyright (C) Xiangfu Liu <xiangfu.z@gmail.com>
12.5 * Copyright (C) 2015 Paul Boddie <paul@boddie.org.uk>
12.6 *
12.7 - * This program is free software; you can redistribute it and/or modify it under
12.8 - * the terms of the GNU General Public License as published by the Free Software
12.9 - * Foundation; either version 3 of the License, or (at your option) any later
12.10 - * version.
12.11 + * This program is free software: you can redistribute it and/or modify
12.12 + * it under the terms of the GNU General Public License as published by
12.13 + * the Free Software Foundation, either version 3 of the License, or
12.14 + * (at your option) any later version.
12.15 *
12.16 - * This program is distributed in the hope that it will be useful, but WITHOUT
12.17 - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
12.18 - * FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
12.19 - * details.
12.20 + * This program is distributed in the hope that it will be useful,
12.21 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
12.22 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12.23 + * GNU General Public License for more details.
12.24 *
12.25 - * You should have received a copy of the GNU General Public License along with
12.26 - * this program. If not, see <http://www.gnu.org/licenses/>.
12.27 + * You should have received a copy of the GNU General Public License
12.28 + * along with this program. If not, see <http://www.gnu.org/licenses/>.
12.29 */
12.30
12.31 #ifdef CONFIG_CPU_JZ4730
12.32 @@ -49,10 +49,13 @@
12.33
12.34 fw_args = (struct fw_args *)0x80002008;
12.35 FW_CPU_ID = fw_args->cpu_id ;
12.36 - FW_SDRAM_BW16 = fw_args->bus_width;
12.37 - FW_SDRAM_BANK4 = fw_args->bank_num;
12.38 - FW_SDRAM_ROW = fw_args->row_addr;
12.39 - FW_SDRAM_COL = fw_args->col_addr;
12.40 +
12.41 + /* Where the arguments have not been initialised, use the defaults. */
12.42 +
12.43 + FW_SDRAM_BW16 = FW_CPU_ID ? fw_args->bus_width : SDRAM_BW16;
12.44 + FW_SDRAM_BANK4 = FW_CPU_ID ? fw_args->bank_num : SDRAM_BANK4;
12.45 + FW_SDRAM_ROW = FW_CPU_ID ? fw_args->row_addr : SDRAM_ROW;
12.46 + FW_SDRAM_COL = FW_CPU_ID ? fw_args->col_addr : SDRAM_COL;
12.47 FW_CONFIG_MOBILE_SDRAM = fw_args->is_mobile;
12.48 FW_IS_SHARE = fw_args->is_busshare;
12.49 }
13.1 --- a/stage1/head1.S Sat Jun 13 00:06:18 2015 +0200
13.2 +++ b/stage1/head1.S Wed Feb 24 16:13:46 2016 +0100
13.3 @@ -1,15 +1,15 @@
13.4 /*
13.5 - * Entry point of the firmware.
13.6 - * The firmware code is executed in the ICache.
13.7 + * Initialisation for the stage 1 payload with support for boot parameters.
13.8 + *
13.9 + * Copyright (C) 2009 Qi Hardware Inc.
13.10 + * Author: Wolfgang Spraul <wolfgang@sharism.cc>
13.11 *
13.12 - * Copyright 2009 (C) Qi Hardware Inc.,
13.13 - * Author: Xiangfu Liu <xiangfu@sharism.cc>
13.14 + * Copyright (C) 2015, 2016 Paul Boddie <paul@boddie.org.uk>
13.15 *
13.16 - * Copyright (C) 2015 Paul Boddie <paul@boddie.org.uk>
13.17 - *
13.18 - * This program is free software; you can redistribute it and/or
13.19 - * modify it under the terms of the GNU General Public License
13.20 - * version 3 as published by the Free Software Foundation.
13.21 + * This program is free software: you can redistribute it and/or modify
13.22 + * it under the terms of the GNU General Public License as published by
13.23 + * the Free Software Foundation, either version 3 of the License, or
13.24 + * (at your option) any later version.
13.25 *
13.26 * This program is distributed in the hope that it will be useful,
13.27 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13.28 @@ -17,36 +17,48 @@
13.29 * GNU General Public License for more details.
13.30 *
13.31 * You should have received a copy of the GNU General Public License
13.32 - * along with this program; if not, write to the Free Software
13.33 - * Foundation, Inc., 51 Franklin Street, Fifth Floor,
13.34 - * Boston, MA 02110-1301, USA
13.35 + * along with this program. If not, see <http://www.gnu.org/licenses/>.
13.36 */
13.37
13.38 - .text
13.39 +.text
13.40 +.extern c_main
13.41 +.globl _start
13.42 +.set noreorder
13.43
13.44 - .extern c_main
13.45 +#define CP0_STATUS $12
13.46 +#define CP0_CAUSE $13
13.47
13.48 - .globl _start
13.49 - .set noreorder
13.50 _start:
13.51 - b real_start
13.52 - nop
13.53 - .word 0x0 /* address: 0x80002008 */
13.54 - .word 0x0
13.55 - .word 0x0
13.56 - .word 0x0
13.57 - .word 0x0
13.58 - .word 0x0
13.59 - .word 0x0
13.60 - .word 0x0
13.61 - /* reserve 8 words for args sizeof(struct fw_args)
13.62 - */
13.63 -real_start:
13.64 - /*
13.65 - * setup stack, jump to C code
13.66 - */
13.67 - la $29, 0x80004000 /* sp */
13.68 - j c_main
13.69 + b real_start
13.70 nop
13.71
13.72 - .set reorder
13.73 + /* 8 words for firmware parameters (0x80002008), struct fw_args */
13.74 +
13.75 + .word 0x0
13.76 + .word 0x0
13.77 + .word 0x0
13.78 + .word 0x0
13.79 + .word 0x0
13.80 + .word 0x0
13.81 + .word 0x0
13.82 + .word 0x0
13.83 +
13.84 +real_start:
13.85 + /*
13.86 + Reset various registers. Otherwise, interrupts do not apparently get
13.87 + re-enabled properly later when requested.
13.88 + */
13.89 +
13.90 + li $t0, 0x0040fc04 /* BEV=1, interrupts enabled, ERL=1 */
13.91 + mtc0 $t0, CP0_STATUS
13.92 +
13.93 + li $t0, 0x00800000 /* IV=1 */
13.94 + mtc0 $t0, CP0_CAUSE
13.95 +
13.96 + /* Setup stack, jump to C code. */
13.97 +
13.98 + la $sp, 0x80004000
13.99 + j c_main
13.100 + nop
13.101 +
13.102 +.set reorder
14.1 --- a/stage1/stage1.c Sat Jun 13 00:06:18 2015 +0200
14.2 +++ b/stage1/stage1.c Wed Feb 24 16:13:46 2016 +0100
14.3 @@ -4,18 +4,18 @@
14.4 * Copyright (C) 2015 Paul Boddie <paul@boddie.org.uk>
14.5 * Copyright (C) Wolfgang Spraul <wolfgang@sharism.cc>
14.6 *
14.7 - * This program is free software; you can redistribute it and/or modify it under
14.8 - * the terms of the GNU General Public License as published by the Free Software
14.9 - * Foundation; either version 3 of the License, or (at your option) any later
14.10 - * version.
14.11 + * This program is free software: you can redistribute it and/or modify
14.12 + * it under the terms of the GNU General Public License as published by
14.13 + * the Free Software Foundation, either version 3 of the License, or
14.14 + * (at your option) any later version.
14.15 *
14.16 - * This program is distributed in the hope that it will be useful, but WITHOUT
14.17 - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
14.18 - * FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
14.19 - * details.
14.20 + * This program is distributed in the hope that it will be useful,
14.21 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
14.22 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14.23 + * GNU General Public License for more details.
14.24 *
14.25 - * You should have received a copy of the GNU General Public License along with
14.26 - * this program. If not, see <http://www.gnu.org/licenses/>.
14.27 + * You should have received a copy of the GNU General Public License
14.28 + * along with this program. If not, see <http://www.gnu.org/licenses/>.
14.29 */
14.30
14.31 #include "board.h"
15.1 --- a/stage2/Makefile Sat Jun 13 00:06:18 2015 +0200
15.2 +++ b/stage2/Makefile Wed Feb 24 16:13:46 2016 +0100
15.3 @@ -1,20 +1,20 @@
15.4 # Makefile - Build the NanoNote payload
15.5 #
15.6 -# Copyright (C) 2015 Paul Boddie <paul@boddie.org.uk>
15.7 +# Copyright (C) 2015, 2016 Paul Boddie <paul@boddie.org.uk>
15.8 # Copyright (C) Xiangfu Liu <xiangfu@sharism.cc>
15.9 #
15.10 -# This program is free software; you can redistribute it and/or modify it under
15.11 -# the terms of the GNU General Public License as published by the Free Software
15.12 -# Foundation; either version 3 of the License, or (at your option) any later
15.13 -# version.
15.14 +# This program is free software: you can redistribute it and/or modify
15.15 +# it under the terms of the GNU General Public License as published by
15.16 +# the Free Software Foundation, either version 3 of the License, or
15.17 +# (at your option) any later version.
15.18 #
15.19 -# This program is distributed in the hope that it will be useful, but WITHOUT
15.20 -# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
15.21 -# FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
15.22 -# details.
15.23 +# This program is distributed in the hope that it will be useful,
15.24 +# but WITHOUT ANY WARRANTY; without even the implied warranty of
15.25 +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15.26 +# GNU General Public License for more details.
15.27 #
15.28 -# You should have received a copy of the GNU General Public License along with
15.29 -# this program. If not, see <http://www.gnu.org/licenses/>.
15.30 +# You should have received a copy of the GNU General Public License
15.31 +# along with this program. If not, see <http://www.gnu.org/licenses/>.
15.32
15.33 ARCH = mipsel-linux-gnu
15.34 CC = $(ARCH)-gcc
15.35 @@ -30,10 +30,10 @@
15.36
15.37 CFLAGS = -O2 -Wall \
15.38 -fno-unit-at-a-time -fno-zero-initialized-in-bss \
15.39 - -ffreestanding -fno-hosted -fno-builtin \
15.40 - -march=mips32 -fPIC \
15.41 + -ffreestanding -fno-hosted -fno-builtin -fPIC \
15.42 + -march=mips32 \
15.43 -I../include
15.44 -LDFLAGS = -nostdlib -EL -pie
15.45 +LDFLAGS = -nostdlib -EL
15.46
15.47 UIMAGE = uImage
15.48 PAYLOAD = stage2.bin
15.49 @@ -62,8 +62,8 @@
15.50
15.51 # Ordering of objects is important and cannot be left to replacement rules.
15.52
15.53 -SRC = head2.S stage2.c lcd.c jzlcd.c board.c $(BOARD_SRC)
15.54 -OBJ = head2.o stage2.o lcd.o jzlcd.o board.o $(BOARD_OBJ)
15.55 +SRC = head2.S entry.S handlers.S stage2.c cpu.c lcd.c jzlcd.c board.c irq.c $(BOARD_SRC)
15.56 +OBJ = head2.o entry.o handlers.o stage2.o cpu.o lcd.o jzlcd.o board.o irq.o $(BOARD_OBJ)
15.57
15.58 .PHONY: all clean distclean
15.59
15.60 @@ -76,7 +76,7 @@
15.61 echo "Nothing else to clean."
15.62
15.63 $(UIMAGE): $(PAYLOAD)
15.64 - $(MKIMAGE) -A mips -O u-boot -T standalone -C none -a 0x80000000 -e 0x80000000 -n NanoPayload -d $(PAYLOAD) $(UIMAGE)
15.65 + $(MKIMAGE) -A mips -O linux -T kernel -C none -a 0x81c00000 -e 0x81c00000 -n NanoPayload -d $(PAYLOAD) $(UIMAGE)
15.66
15.67 $(PAYLOAD): $(TARGET)
15.68 $(OBJCOPY) -O binary $(@:.bin=.elf) $@+
16.1 --- a/stage2/board-minipc.c Sat Jun 13 00:06:18 2015 +0200
16.2 +++ b/stage2/board-minipc.c Wed Feb 24 16:13:46 2016 +0100
16.3 @@ -6,18 +6,18 @@
16.4 * Copyright (C) Xiangfu Liu <xiangfu.z@gmail.com>
16.5 * Copyright (C) 2015 Paul Boddie <paul@boddie.org.uk>
16.6 *
16.7 - * This program is free software; you can redistribute it and/or modify it under
16.8 - * the terms of the GNU General Public License as published by the Free Software
16.9 - * Foundation; either version 3 of the License, or (at your option) any later
16.10 - * version.
16.11 + * This program is free software: you can redistribute it and/or modify
16.12 + * it under the terms of the GNU General Public License as published by
16.13 + * the Free Software Foundation, either version 3 of the License, or
16.14 + * (at your option) any later version.
16.15 *
16.16 - * This program is distributed in the hope that it will be useful, but WITHOUT
16.17 - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
16.18 - * FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
16.19 - * details.
16.20 + * This program is distributed in the hope that it will be useful,
16.21 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
16.22 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16.23 + * GNU General Public License for more details.
16.24 *
16.25 - * You should have received a copy of the GNU General Public License along with
16.26 - * this program. If not, see <http://www.gnu.org/licenses/>.
16.27 + * You should have received a copy of the GNU General Public License
16.28 + * along with this program. If not, see <http://www.gnu.org/licenses/>.
16.29 */
16.30
16.31 #include "board.h"
16.32 @@ -62,7 +62,7 @@
16.33 unsigned long lastdec;
16.34
16.35 /*
16.36 - * timer without interrupts
16.37 + * Timer without interrupts.
16.38 */
16.39
16.40 int timer_init(void)
16.41 @@ -72,12 +72,25 @@
16.42 __ost_set_count(TIMER_CHAN, TIMER_FDATA);
16.43 __ost_enable_channel(TIMER_CHAN);
16.44
16.45 + __cpm_start_ost();
16.46 +
16.47 lastdec = TIMER_FDATA;
16.48 timestamp = 0;
16.49
16.50 return 0;
16.51 }
16.52
16.53 +/* Timer interrupt activation. */
16.54 +
16.55 +void timer_init_irq(void)
16.56 +{
16.57 + __ost_enable_interrupt(TIMER_CHAN);
16.58 + /* NOTE: Need flag clearing? */
16.59 + __intc_unmask_irq(TIMER_CHAN_IRQ);
16.60 +}
16.61 +
16.62 +/* Board startup detection. */
16.63 +
16.64 int is_started(void)
16.65 {
16.66 return REG_CPM_MSCR != 0;
17.1 --- a/stage2/board-minipc.h Sat Jun 13 00:06:18 2015 +0200
17.2 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000
17.3 @@ -1,12 +0,0 @@
17.4 -#ifndef __BOARD_MINIPC_H__
17.5 -#define __BOARD_MINIPC_H__
17.6 -
17.7 -/* Initialisation functions. */
17.8 -
17.9 -void gpio_init2(void);
17.10 -void cpm_init(void);
17.11 -void rtc_init(void);
17.12 -int timer_init(void);
17.13 -int is_started(void);
17.14 -
17.15 -#endif /* __BOARD_MINIPC_H__ */
18.1 --- a/stage2/board-nanonote.c Sat Jun 13 00:06:18 2015 +0200
18.2 +++ b/stage2/board-nanonote.c Wed Feb 24 16:13:46 2016 +0100
18.3 @@ -6,18 +6,18 @@
18.4 * Copyright (C) Xiangfu Liu <xiangfu.z@gmail.com>
18.5 * Copyright (C) 2015 Paul Boddie <paul@boddie.org.uk>
18.6 *
18.7 - * This program is free software; you can redistribute it and/or modify it under
18.8 - * the terms of the GNU General Public License as published by the Free Software
18.9 - * Foundation; either version 3 of the License, or (at your option) any later
18.10 - * version.
18.11 + * This program is free software: you can redistribute it and/or modify
18.12 + * it under the terms of the GNU General Public License as published by
18.13 + * the Free Software Foundation, either version 3 of the License, or
18.14 + * (at your option) any later version.
18.15 *
18.16 - * This program is distributed in the hope that it will be useful, but WITHOUT
18.17 - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
18.18 - * FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
18.19 - * details.
18.20 + * This program is distributed in the hope that it will be useful,
18.21 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
18.22 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18.23 + * GNU General Public License for more details.
18.24 *
18.25 - * You should have received a copy of the GNU General Public License along with
18.26 - * this program. If not, see <http://www.gnu.org/licenses/>.
18.27 + * You should have received a copy of the GNU General Public License
18.28 + * along with this program. If not, see <http://www.gnu.org/licenses/>.
18.29 */
18.30
18.31 #include "board.h"
18.32 @@ -57,6 +57,9 @@
18.33 __gpio_as_input(GPIO_KEYIN_8);
18.34 __gpio_enable_pull(GPIO_KEYIN_8);
18.35
18.36 + __gpio_as_input(GPIO_POWER);
18.37 + __gpio_enable_pull(GPIO_POWER);
18.38 +
18.39 __gpio_as_output(GPIO_AUDIO_POP);
18.40 __gpio_set_pin(GPIO_AUDIO_POP);
18.41
18.42 @@ -112,11 +115,12 @@
18.43 unsigned long lastdec;
18.44
18.45 /*
18.46 - * timer without interrupts
18.47 + * Timer without interrupts.
18.48 */
18.49
18.50 void timer_init(void)
18.51 {
18.52 + __tcu_disable_pwm_output(TIMER_CHAN);
18.53 __tcu_select_extalclk(TIMER_CHAN);
18.54 __tcu_select_clk_div256(TIMER_CHAN);
18.55 __tcu_set_count(TIMER_CHAN, 0);
18.56 @@ -128,10 +132,23 @@
18.57 __tcu_start_timer_clock(TIMER_CHAN);
18.58 __tcu_start_counter(TIMER_CHAN);
18.59
18.60 + __cpm_start_tcu();
18.61 +
18.62 lastdec = 0;
18.63 timestamp = 0;
18.64 }
18.65
18.66 +/* Timer interrupt activation. */
18.67 +
18.68 +void timer_init_irq(void)
18.69 +{
18.70 + __tcu_unmask_full_match_irq(TIMER_CHAN);
18.71 + __tcu_clear_full_match_flag(TIMER_CHAN);
18.72 + __intc_unmask_irq(TIMER_CHAN_IRQ);
18.73 +}
18.74 +
18.75 +/* Board startup detection. */
18.76 +
18.77 int is_started(void)
18.78 {
18.79 return REG_CPM_CLKGR != 0;
19.1 --- a/stage2/board-nanonote.h Sat Jun 13 00:06:18 2015 +0200
19.2 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000
19.3 @@ -1,12 +0,0 @@
19.4 -#ifndef __BOARD_NANONOTE_H__
19.5 -#define __BOARD_NANONOTE_H__
19.6 -
19.7 -/* Initialisation functions. */
19.8 -
19.9 -void gpio_init2(void);
19.10 -void cpm_init(void);
19.11 -void rtc_init(void);
19.12 -void timer_init(void);
19.13 -int is_started(void);
19.14 -
19.15 -#endif /* __BOARD_NANONOTE_H__ */
20.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
20.2 +++ b/stage2/board-specific.h Wed Feb 24 16:13:46 2016 +0100
20.3 @@ -0,0 +1,13 @@
20.4 +#ifndef __BOARD_SPECIFIC_H__
20.5 +#define __BOARD_SPECIFIC_H__
20.6 +
20.7 +/* Initialisation functions. */
20.8 +
20.9 +void gpio_init2(void);
20.10 +void cpm_init(void);
20.11 +void rtc_init(void);
20.12 +void timer_init(void);
20.13 +void timer_init_irq(void);
20.14 +int is_started(void);
20.15 +
20.16 +#endif /* __BOARD_SPECIFIC_H__ */
21.1 --- a/stage2/board.c Sat Jun 13 00:06:18 2015 +0200
21.2 +++ b/stage2/board.c Wed Feb 24 16:13:46 2016 +0100
21.3 @@ -1,23 +1,22 @@
21.4 /*
21.5 * Common routines supporting board initialisation.
21.6 *
21.7 - * Copyright (C) 2000-2009 Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
21.8 * Copyright (C) 2005-2006 Ingenic Semiconductor, <jlwei@ingenic.cn>
21.9 * Copyright (C) Xiangfu Liu <xiangfu.z@gmail.com>
21.10 * Copyright (C) 2015 Paul Boddie <paul@boddie.org.uk>
21.11 *
21.12 - * This program is free software; you can redistribute it and/or modify it under
21.13 - * the terms of the GNU General Public License as published by the Free Software
21.14 - * Foundation; either version 3 of the License, or (at your option) any later
21.15 - * version.
21.16 + * This program is free software: you can redistribute it and/or modify
21.17 + * it under the terms of the GNU General Public License as published by
21.18 + * the Free Software Foundation, either version 3 of the License, or
21.19 + * (at your option) any later version.
21.20 *
21.21 - * This program is distributed in the hope that it will be useful, but WITHOUT
21.22 - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
21.23 - * FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
21.24 - * details.
21.25 + * This program is distributed in the hope that it will be useful,
21.26 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
21.27 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21.28 + * GNU General Public License for more details.
21.29 *
21.30 - * You should have received a copy of the GNU General Public License along with
21.31 - * this program. If not, see <http://www.gnu.org/licenses/>.
21.32 + * You should have received a copy of the GNU General Public License
21.33 + * along with this program. If not, see <http://www.gnu.org/licenses/>.
21.34 */
21.35
21.36 #include "sdram.h"
21.37 @@ -157,63 +156,3 @@
21.38 {
21.39 return TIMER_HZ;
21.40 }
21.41 -
21.42 -/* CPU-specific routines from U-Boot.
21.43 - See: uboot-xburst/files/arch/mips/cpu/xburst/cpu.c
21.44 - See: u-boot/arch/mips/include/asm/cacheops.h
21.45 -*/
21.46 -
21.47 -#define Index_Store_Tag_I 0x08
21.48 -#define Index_Writeback_Inv_D 0x15
21.49 -
21.50 -void flush_icache_all(void)
21.51 -{
21.52 - u32 addr, t = 0;
21.53 -
21.54 - asm volatile ("mtc0 $0, $28"); /* Clear Taglo */
21.55 - asm volatile ("mtc0 $0, $29"); /* Clear TagHi */
21.56 -
21.57 - for (addr = KSEG0; addr < KSEG0 + CONFIG_SYS_ICACHE_SIZE;
21.58 - addr += CONFIG_SYS_CACHELINE_SIZE) {
21.59 - asm volatile (
21.60 - ".set mips3\n\t"
21.61 - " cache %0, 0(%1)\n\t"
21.62 - ".set mips2\n\t"
21.63 - :
21.64 - : "I" (Index_Store_Tag_I), "r"(addr));
21.65 - }
21.66 -
21.67 - /* invalicate btb */
21.68 - asm volatile (
21.69 - ".set mips32\n\t"
21.70 - "mfc0 %0, $16, 7\n\t"
21.71 - "nop\n\t"
21.72 - "ori %0,2\n\t"
21.73 - "mtc0 %0, $16, 7\n\t"
21.74 - ".set mips2\n\t"
21.75 - :
21.76 - : "r" (t));
21.77 -}
21.78 -
21.79 -void flush_dcache_all(void)
21.80 -{
21.81 - u32 addr;
21.82 -
21.83 - for (addr = KSEG0; addr < KSEG0 + CONFIG_SYS_DCACHE_SIZE;
21.84 - addr += CONFIG_SYS_CACHELINE_SIZE) {
21.85 - asm volatile (
21.86 - ".set mips3\n\t"
21.87 - " cache %0, 0(%1)\n\t"
21.88 - ".set mips2\n\t"
21.89 - :
21.90 - : "I" (Index_Writeback_Inv_D), "r"(addr));
21.91 - }
21.92 -
21.93 - asm volatile ("sync");
21.94 -}
21.95 -
21.96 -void flush_cache_all(void)
21.97 -{
21.98 - flush_dcache_all();
21.99 - flush_icache_all();
21.100 -}
22.1 --- a/stage2/board.h Sat Jun 13 00:06:18 2015 +0200
22.2 +++ b/stage2/board.h Wed Feb 24 16:13:46 2016 +0100
22.3 @@ -4,20 +4,21 @@
22.4 /* Utility functions. */
22.5
22.6 void udelay(unsigned long usec);
22.7 -void flush_cache_all(void);
22.8 unsigned long get_memory_size(void);
22.9
22.10 +#define TIMER_HZ CONFIG_SYS_HZ
22.11 +#define TIMER_CHAN 0
22.12 +#define TIMER_FDATA 0xffff /* timer full data value, limited to 16 bits */
22.13 +
22.14 #ifdef CONFIG_CPU_JZ4730
22.15 #include "jz4730.h"
22.16 -#define READ_TIMER __ost_get_count(TIMER_CHAN) /* macro to read the 32 bit timer */
22.17 -#define TIMER_FDATA 0xffffffff /* timer full data value */
22.18 +#include "jz4730_compat.h"
22.19 +#define READ_TIMER __ost_get_count(TIMER_CHAN) /* macro to read the 32 bit timer */
22.20 +#define TIMER_CHAN_IRQ IRQ_OST0
22.21 #else
22.22 #include "jz4740.h"
22.23 -#define READ_TIMER REG_TCU_TCNT(TIMER_CHAN) /* macro to read the 16 bit timer */
22.24 -#define TIMER_FDATA 0xffff /* timer full data value */
22.25 +#define READ_TIMER REG_TCU_TCNT(TIMER_CHAN) /* macro to read the 16 bit timer */
22.26 +#define TIMER_CHAN_IRQ IRQ_TCU0
22.27 #endif
22.28
22.29 -#define TIMER_HZ CONFIG_SYS_HZ
22.30 -#define TIMER_CHAN 0
22.31 -
22.32 #endif /* __BOARD_H__ */
23.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
23.2 +++ b/stage2/cpu.c Wed Feb 24 16:13:46 2016 +0100
23.3 @@ -0,0 +1,235 @@
23.4 +/*
23.5 + * CPU-specific routines originally from U-Boot.
23.6 + * See: uboot-xburst/files/arch/mips/cpu/xburst/cpu.c
23.7 + * See: u-boot/arch/mips/include/asm/cacheops.h
23.8 + *
23.9 + * Copyright (C) 2000-2009 Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
23.10 + * Copyright (C) 2015, 2016 Paul Boddie <paul@boddie.org.uk>
23.11 + *
23.12 + * This program is free software; you can redistribute it and/or
23.13 + * modify it under the terms of the GNU General Public License as
23.14 + * published by the Free Software Foundation; either version 2 of
23.15 + * the License, or (at your option) any later version.
23.16 + *
23.17 + * This program is distributed in the hope that it will be useful,
23.18 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
23.19 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23.20 + * GNU General Public License for more details.
23.21 + *
23.22 + * You should have received a copy of the GNU General Public License
23.23 + * along with this program; if not, write to the Free Software
23.24 + * Foundation, Inc., 51 Franklin Street, Fifth Floor,
23.25 + * Boston, MA 02110-1301, USA
23.26 + */
23.27 +
23.28 +#include "cpu.h"
23.29 +#include "sdram.h"
23.30 +
23.31 +void flush_icache_all(void)
23.32 +{
23.33 + u32 addr, t = 0;
23.34 +
23.35 + asm volatile ("mtc0 $0, $28"); /* Clear Taglo */
23.36 + asm volatile ("mtc0 $0, $29"); /* Clear TagHi */
23.37 +
23.38 + for (addr = KSEG0; addr < KSEG0 + CONFIG_SYS_ICACHE_SIZE;
23.39 + addr += CONFIG_SYS_CACHELINE_SIZE) {
23.40 + asm volatile (
23.41 + ".set mips3\n\t"
23.42 + " cache %0, 0(%1)\n\t"
23.43 + ".set mips2\n\t"
23.44 + :
23.45 + : "I" (Index_Store_Tag_I), "r"(addr));
23.46 + }
23.47 +
23.48 + /* invalicate btb */
23.49 + asm volatile (
23.50 + ".set mips32\n\t"
23.51 + "mfc0 %0, $16, 7\n\t"
23.52 + "nop\n\t"
23.53 + "ori %0,2\n\t"
23.54 + "mtc0 %0, $16, 7\n\t"
23.55 + ".set mips2\n\t"
23.56 + :
23.57 + : "r" (t));
23.58 +}
23.59 +
23.60 +void flush_dcache_all(void)
23.61 +{
23.62 + u32 addr;
23.63 +
23.64 + for (addr = KSEG0; addr < KSEG0 + CONFIG_SYS_DCACHE_SIZE;
23.65 + addr += CONFIG_SYS_CACHELINE_SIZE) {
23.66 + asm volatile (
23.67 + ".set mips3\n\t"
23.68 + " cache %0, 0(%1)\n\t"
23.69 + ".set mips2\n\t"
23.70 + :
23.71 + : "I" (Index_Writeback_Inv_D), "r"(addr));
23.72 + }
23.73 +
23.74 + asm volatile ("sync");
23.75 +}
23.76 +
23.77 +void flush_cache_all(void)
23.78 +{
23.79 + flush_dcache_all();
23.80 + flush_icache_all();
23.81 +}
23.82 +
23.83 +void handle_error_level(void)
23.84 +{
23.85 + asm volatile(
23.86 + "mfc0 $t3, $12\n" /* CP0_STATUS */
23.87 + "li $t4, 0xfffffffb\n" /* ERL = 0 */
23.88 + "and $t3, $t3, $t4\n"
23.89 + "mtc0 $t3, $12\n"
23.90 + "nop\n");
23.91 +}
23.92 +
23.93 +void enable_interrupts(void)
23.94 +{
23.95 + asm volatile(
23.96 + "mfc0 $t3, $12\n" /* CP0_STATUS */
23.97 + "li $t4, 0x0000fc01\n" /* IE = enable interrupts */
23.98 + "or $t3, $t3, $t4\n"
23.99 + "mtc0 $t3, $12\n"
23.100 + "nop\n");
23.101 +}
23.102 +
23.103 +void init_interrupts(void)
23.104 +{
23.105 + /* Set exception registers. */
23.106 +
23.107 + asm volatile(
23.108 + "mtc0 $zero, $18\n" /* CP0_WATCHLO */
23.109 + "li $t3, 0x00800000\n" /* IV = 1 (use 0x80000200 for interrupts) */
23.110 + "mtc0 $t3, $13\n" /* CP0_CAUSE */
23.111 + "mfc0 $t4, $12\n" /* CP0_STATUS */
23.112 + "li $t3, 0xffbfffff\n" /* BEV=0 */
23.113 + "and $t3, $t3, $t4\n"
23.114 + "mtc0 $t3, $12\n"
23.115 + "nop\n");
23.116 +}
23.117 +
23.118 +void enter_user_mode(void)
23.119 +{
23.120 + asm volatile(
23.121 + "mfc0 $t3, $12\n" /* CP0_STATUS */
23.122 + "li $t4, 0xffffffef\n" /* KSU = 2 (UM = 1) */
23.123 + "and $t3, $t3, $t4\n"
23.124 + "mtc0 $t3, $12\n"
23.125 + "nop\n");
23.126 +}
23.127 +
23.128 +void init_tlb(void)
23.129 +{
23.130 + asm volatile(
23.131 + "li $t1, 1\n" /* index of first randomly-replaced entry */
23.132 + "mtc0 $t1, $6\n" /* CP0_WIRED */
23.133 + "nop\n");
23.134 +
23.135 + map_page_index(0x80000000, 0x00000000, 16 * 1024 * 1024, 0x1f, 0, 0);
23.136 +}
23.137 +
23.138 +void map_page_index(u32 virtual, u32 physical, u32 pagesize, u8 flags, u8 asid, u32 index)
23.139 +{
23.140 + u32 start = virtual & 0xffffe000; /* VPN2 */
23.141 + u32 lower = ((physical & 0xfffff000) >> 6) | flags;
23.142 + u32 upper = (((physical + pagesize) & 0xfffff000) >> 6) | flags;
23.143 + u32 pagemask = ((pagesize - 1) & 0xfffff000) << 1;
23.144 +
23.145 + asm volatile(
23.146 + "mtc0 %3, $5\n" /* CP0_PAGEMASK */
23.147 +
23.148 + /* Set the index. */
23.149 +
23.150 + "mtc0 %4, $0\n" /* CP0_INDEX */
23.151 +
23.152 + /* Set physical address. */
23.153 +
23.154 + "mtc0 %0, $2\n" /* CP0_ENTRYLO0 */
23.155 + "mtc0 %1, $3\n" /* CP0_ENTRYLO1 */
23.156 +
23.157 + /* Set virtual address. */
23.158 +
23.159 + "mtc0 %2, $10\n" /* CP0_ENTRYHI */
23.160 + "nop\n"
23.161 +
23.162 + "tlbwi\n"
23.163 + "nop"
23.164 + :
23.165 + : "r" (lower), "r" (upper), "r" (start), "r" (pagemask), "r" (index)
23.166 + );
23.167 +}
23.168 +
23.169 +void map_page(u32 virtual, u32 physical, u32 pagesize, u8 flags, u8 asid)
23.170 +{
23.171 + u32 start = virtual & 0xffffe000; /* VPN2 */
23.172 + u32 lower = ((physical & 0xfffff000) >> 6) | flags;
23.173 + u32 upper = (((physical + pagesize) & 0xfffff000) >> 6) | flags;
23.174 + u32 pagemask = ((pagesize - 1) & 0xfffff000) << 1;
23.175 +
23.176 + asm volatile(
23.177 + "mtc0 %3, $5\n" /* CP0_PAGEMASK */
23.178 +
23.179 + /* Set physical address. */
23.180 +
23.181 + "mtc0 %0, $2\n" /* CP0_ENTRYLO0 */
23.182 + "mtc0 %1, $3\n" /* CP0_ENTRYLO1 */
23.183 +
23.184 + /* Set virtual address. */
23.185 +
23.186 + "mtc0 %2, $10\n" /* CP0_ENTRYHI */
23.187 + "nop\n"
23.188 +
23.189 + "tlbwr\n"
23.190 + "nop"
23.191 + :
23.192 + : "r" (lower), "r" (upper), "r" (start), "r" (pagemask)
23.193 + );
23.194 +}
23.195 +
23.196 +void unmap_page(u32 virtual, u32 physical, u32 pagesize, u8 flags, u8 asid)
23.197 +{
23.198 + u32 start = virtual & 0xffffe000; /* VPN2 */
23.199 + u32 lower = ((physical & 0xfffff000) >> 6) | flags;
23.200 + u32 upper = (((physical + pagesize) & 0xfffff000) >> 6) | flags;
23.201 + u32 pagemask = ((pagesize - 1) & 0xfffff000) << 1;
23.202 + u32 index = 0;
23.203 +
23.204 + asm volatile(
23.205 + "mtc0 %4, $5\n" /* CP0_PAGEMASK */
23.206 +
23.207 + /* Set physical address. */
23.208 +
23.209 + "mtc0 %1, $2\n" /* CP0_ENTRYLO0 */
23.210 + "mtc0 %2, $3\n" /* CP0_ENTRYLO1 */
23.211 +
23.212 + /* Set virtual address. */
23.213 +
23.214 + "mtc0 %3, $10\n" /* CP0_ENTRYHI */
23.215 + "nop\n"
23.216 +
23.217 + /* Find an existing mapping. */
23.218 +
23.219 + "tlbp\n"
23.220 + "nop\n"
23.221 +
23.222 + /* Read the index register to see if a match was found. */
23.223 +
23.224 + "mfc0 %0, $0\n" /* CP0_INDEX */
23.225 + "nop"
23.226 + : "=r" (index)
23.227 + : "r" (lower), "r" (upper), "r" (start), "r" (pagemask)
23.228 + );
23.229 +
23.230 + /* Return if the page is not mapped. */
23.231 +
23.232 + if (index & 0x80000000)
23.233 + return;
23.234 +
23.235 + /* Otherwise, invalidate the mapping. */
23.236 +
23.237 + map_page_index(virtual, physical, pagesize, flags & 0xfd, asid, index);
23.238 +}
24.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
24.2 +++ b/stage2/cpu.h Wed Feb 24 16:13:46 2016 +0100
24.3 @@ -0,0 +1,16 @@
24.4 +#ifndef __CPU_H__
24.5 +#define __CPU_H__
24.6 +
24.7 +#include "xburst_types.h"
24.8 +
24.9 +void flush_cache_all(void);
24.10 +void handle_error_level(void);
24.11 +void enter_user_mode(void);
24.12 +void enable_interrupts(void);
24.13 +void init_interrupts(void);
24.14 +void init_tlb(void);
24.15 +void map_page(u32, u32, u32, u8, u8);
24.16 +void map_page_index(u32, u32, u32, u8, u8, u32);
24.17 +void unmap_page(u32, u32, u32, u8, u8);
24.18 +
24.19 +#endif /* __CPU_H__ */
25.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
25.2 +++ b/stage2/entry.S Wed Feb 24 16:13:46 2016 +0100
25.3 @@ -0,0 +1,44 @@
25.4 +/*
25.5 + * Interrupt and TLB miss handling support.
25.6 + *
25.7 + * Copyright (C) 2015, 2016 Paul Boddie <paul@boddie.org.uk>
25.8 + *
25.9 + * This program is free software: you can redistribute it and/or modify
25.10 + * it under the terms of the GNU General Public License as published by
25.11 + * the Free Software Foundation, either version 3 of the License, or
25.12 + * (at your option) any later version.
25.13 + *
25.14 + * This program is distributed in the hope that it will be useful,
25.15 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
25.16 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25.17 + * GNU General Public License for more details.
25.18 + *
25.19 + * You should have received a copy of the GNU General Public License
25.20 + * along with this program. If not, see <http://www.gnu.org/licenses/>.
25.21 + */
25.22 +
25.23 +.text
25.24 +.extern tlb_handler
25.25 +.extern interrupt_handler
25.26 +.globl _tlb_entry
25.27 +.globl _irq_entry
25.28 +.globl _end_entries
25.29 +.set noreorder
25.30 +
25.31 +_tlb_entry:
25.32 + lui $k0, %hi(_GLOBAL_OFFSET_TABLE_)
25.33 + ori $k0, $k0, %lo(_GLOBAL_OFFSET_TABLE_)
25.34 + la $k0, tlb_handler
25.35 + jr $k0
25.36 + nop
25.37 +
25.38 +_irq_entry:
25.39 + lui $k0, %hi(_GLOBAL_OFFSET_TABLE_)
25.40 + ori $k0, $k0, %lo(_GLOBAL_OFFSET_TABLE_)
25.41 + la $k0, interrupt_handler
25.42 + jr $k0
25.43 + nop
25.44 +
25.45 +_end_entries:
25.46 +
25.47 +.set reorder
26.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
26.2 +++ b/stage2/handlers.S Wed Feb 24 16:13:46 2016 +0100
26.3 @@ -0,0 +1,147 @@
26.4 +/*
26.5 + * Handler routines.
26.6 + *
26.7 + * Copyright (C) 2015 Nicholas FitzRoy-Dale <wzdd.code@lardcave.net>
26.8 + * Copyright (C) 2015, 2016 Paul Boddie <paul@boddie.org.uk>
26.9 + *
26.10 + * This program is free software: you can redistribute it and/or modify
26.11 + * it under the terms of the GNU General Public License as published by
26.12 + * the Free Software Foundation, either version 3 of the License, or
26.13 + * (at your option) any later version.
26.14 + *
26.15 + * This program is distributed in the hope that it will be useful,
26.16 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
26.17 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26.18 + * GNU General Public License for more details.
26.19 + *
26.20 + * You should have received a copy of the GNU General Public License
26.21 + * along with this program. If not, see <http://www.gnu.org/licenses/>.
26.22 + */
26.23 +
26.24 +.text
26.25 +.extern tlb_handle
26.26 +.extern irq_handle
26.27 +.globl tlb_handler
26.28 +.globl interrupt_handler
26.29 +.set noreorder
26.30 +.set noat
26.31 +
26.32 +tlb_handler:
26.33 + sw $ra, -112($sp)
26.34 + jal save_state
26.35 + nop
26.36 +
26.37 + /* Invoke the handler. */
26.38 +
26.39 + jal tlb_handle
26.40 + nop
26.41 +
26.42 + j load_and_return
26.43 + nop
26.44 +
26.45 +interrupt_handler:
26.46 + sw $ra, -112($sp)
26.47 + jal save_state
26.48 + nop
26.49 +
26.50 + /* Invoke the handler. */
26.51 +
26.52 + jal irq_handle
26.53 + nop
26.54 +
26.55 + j load_and_return
26.56 + nop
26.57 +
26.58 +save_state:
26.59 +
26.60 + /* Save the status, mask interrupts. */
26.61 +
26.62 + mfc0 $k0, $12 /* CP0_STATUS */
26.63 + li $k1, 0xffff03ff
26.64 + and $k1, $k0, $k1
26.65 + mtc0 $k1, $12
26.66 + sw $k0, -120($sp)
26.67 +
26.68 + sw $at, -4($sp)
26.69 + sw $v0, -8($sp)
26.70 + sw $v1, -12($sp)
26.71 + sw $a0, -16($sp)
26.72 + sw $a1, -20($sp)
26.73 + sw $a2, -24($sp)
26.74 + sw $a3, -28($sp)
26.75 + sw $t0, -32($sp)
26.76 + sw $t1, -36($sp)
26.77 + sw $t2, -40($sp)
26.78 + sw $t3, -44($sp)
26.79 + sw $t4, -48($sp)
26.80 + sw $t5, -52($sp)
26.81 + sw $t6, -56($sp)
26.82 + sw $t7, -60($sp)
26.83 + sw $s0, -64($sp)
26.84 + sw $s1, -68($sp)
26.85 + sw $s2, -72($sp)
26.86 + sw $s3, -76($sp)
26.87 + sw $s4, -80($sp)
26.88 + sw $s5, -84($sp)
26.89 + sw $s6, -88($sp)
26.90 + sw $s7, -92($sp)
26.91 + sw $t8, -96($sp)
26.92 + sw $t9, -100($sp)
26.93 + sw $gp, -104($sp)
26.94 + sw $fp, -108($sp)
26.95 + /* sw $ra, -112($sp) */
26.96 +
26.97 + mfc0 $k0, $14 /* CP0_EPC */
26.98 + nop
26.99 + sw $k0, -116($sp)
26.100 +
26.101 + addi $sp, $sp, -120
26.102 + j $ra
26.103 + nop
26.104 +
26.105 +load_and_return:
26.106 +
26.107 + addi $sp, $sp, 120
26.108 +
26.109 + lw $at, -4($sp)
26.110 + lw $v0, -8($sp)
26.111 + lw $v1, -12($sp)
26.112 + lw $a0, -16($sp)
26.113 + lw $a1, -20($sp)
26.114 + lw $a2, -24($sp)
26.115 + lw $a3, -28($sp)
26.116 + lw $t0, -32($sp)
26.117 + lw $t1, -36($sp)
26.118 + lw $t2, -40($sp)
26.119 + lw $t3, -44($sp)
26.120 + lw $t4, -48($sp)
26.121 + lw $t5, -52($sp)
26.122 + lw $t6, -56($sp)
26.123 + lw $t7, -60($sp)
26.124 + lw $s0, -64($sp)
26.125 + lw $s1, -68($sp)
26.126 + lw $s2, -72($sp)
26.127 + lw $s3, -76($sp)
26.128 + lw $s4, -80($sp)
26.129 + lw $s5, -84($sp)
26.130 + lw $s6, -88($sp)
26.131 + lw $s7, -92($sp)
26.132 + lw $t8, -96($sp)
26.133 + lw $t9, -100($sp)
26.134 + lw $gp, -104($sp)
26.135 + lw $fp, -108($sp)
26.136 + lw $ra, -112($sp)
26.137 +
26.138 + lw $k0, -116($sp)
26.139 + mtc0 $k0, $14 /* CP0_EPC */
26.140 + nop
26.141 +
26.142 + lw $k0, -120($sp)
26.143 + mtc0 $k0, $12 /* CP0_STATUS */
26.144 + nop
26.145 +
26.146 + eret
26.147 + nop
26.148 +
26.149 +.set reorder
26.150 +.set at
27.1 --- a/stage2/head2.S Sat Jun 13 00:06:18 2015 +0200
27.2 +++ b/stage2/head2.S Wed Feb 24 16:13:46 2016 +0100
27.3 @@ -1,20 +1,41 @@
27.4 /*
27.5 - * Entry point of the firmware.
27.6 - * The firmware code are executed in the ICache.
27.7 - * Do not edit!
27.8 - * Copyright (C) 2006 Ingenic Semiconductor Inc.
27.9 + * Initialisation code for the stage 2 payload.
27.10 + *
27.11 + * Copyright 2009 (C) Qi Hardware Inc.
27.12 + * Author: Wolfgang Spraul <wolfgang@sharism.cc>
27.13 + *
27.14 + * Copyright (C) 2015, 2016 Paul Boddie <paul@boddie.org.uk>
27.15 *
27.16 + * This program is free software: you can redistribute it and/or modify
27.17 + * it under the terms of the GNU General Public License as published by
27.18 + * the Free Software Foundation, either version 3 of the License, or
27.19 + * (at your option) any later version.
27.20 + *
27.21 + * This program is distributed in the hope that it will be useful,
27.22 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
27.23 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27.24 + * GNU General Public License for more details.
27.25 + *
27.26 + * You should have received a copy of the GNU General Public License
27.27 + * along with this program. If not, see <http://www.gnu.org/licenses/>.
27.28 */
27.29
27.30 - .text
27.31 - .extern c_main
27.32 -
27.33 - .globl _start
27.34 - .set noreorder
27.35 +#include "sdram.h"
27.36 +
27.37 +.text
27.38 +.extern c_main
27.39 +.extern _irq_entry
27.40 +.extern _end_entries
27.41 +.globl _start
27.42 +.set noreorder
27.43 +
27.44 _start:
27.45 b real_start
27.46 nop
27.47 - .word 0x0 // its address == start address + 8
27.48 +
27.49 + /* Apparently reserved region which, if used, breaks the USB Boot process. */
27.50 +
27.51 + .word 0x0
27.52 .word 0x0
27.53 .word 0x0
27.54 .word 0x0
27.55 @@ -23,11 +44,57 @@
27.56 .word 0x0
27.57 .word 0x0
27.58
27.59 -real_start:
27.60 - /* setup stack, jump to C code */
27.61 - add $29, $20, 0x3ffff0 // sp locate at start address offset 0x2ffff0
27.62 - add $25, $20, 0x40 // t9 = c_main()
27.63 - j $25
27.64 +real_start:
27.65 + /* Initialise the stack. */
27.66 +
27.67 + la $sp, 0x80080000
27.68 +
27.69 + /* Initialise the globals pointer. */
27.70 +
27.71 + lui $gp, %hi(_GLOBAL_OFFSET_TABLE_)
27.72 + ori $gp, $gp, %lo(_GLOBAL_OFFSET_TABLE_)
27.73 +
27.74 + move $k0, $ra
27.75 +
27.76 + /* Copy TLB handling instructions. */
27.77 +
27.78 + la $t0, _tlb_entry /* start */
27.79 + li $t1, 0x80000000
27.80 + la $t2, _irq_entry /* end */
27.81 + jal _copy
27.82 nop
27.83
27.84 - .set reorder
27.85 + /* Copy IRQ handling instructions. */
27.86 +
27.87 + la $t0, _irq_entry /* start */
27.88 + li $t1, 0x80000200
27.89 + la $t2, _end_entries /* end */
27.90 + jal _copy
27.91 + nop
27.92 +
27.93 + move $ra, $k0
27.94 +
27.95 + /* Enable caching. */
27.96 +
27.97 + li $t0, CONFIG_CM_CACHABLE_NONCOHERENT
27.98 + mtc0 $t0, $16 /* CP0_CONFIG */
27.99 + nop
27.100 +
27.101 + /* Start the program. */
27.102 +
27.103 + la $t9, c_main /* load the address of the routine */
27.104 + j c_main
27.105 + nop
27.106 +
27.107 +_copy:
27.108 + /* Copy via $t3 the region from $t0 to $t2 into $t1. */
27.109 +
27.110 + lw $t3, 0($t0)
27.111 + addiu $t0, $t0, 4
27.112 + sw $t3, 0($t1)
27.113 + bne $t0, $t2, _copy
27.114 + addiu $t1, $t1, 4 /* executed in delay slot before branch */
27.115 + j $ra
27.116 + nop
27.117 +
27.118 +.set reorder
28.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
28.2 +++ b/stage2/irq.c Wed Feb 24 16:13:46 2016 +0100
28.3 @@ -0,0 +1,128 @@
28.4 +/*
28.5 + * Interrupt handling.
28.6 + *
28.7 + * Copyright (C) 2015, 2016 Paul Boddie <paul@boddie.org.uk>
28.8 + *
28.9 + * This program is free software: you can redistribute it and/or modify
28.10 + * it under the terms of the GNU General Public License as published by
28.11 + * the Free Software Foundation, either version 3 of the License, or
28.12 + * (at your option) any later version.
28.13 + *
28.14 + * This program is distributed in the hope that it will be useful,
28.15 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
28.16 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
28.17 + * GNU General Public License for more details.
28.18 + *
28.19 + * You should have received a copy of the GNU General Public License
28.20 + * along with this program. If not, see <http://www.gnu.org/licenses/>.
28.21 + */
28.22 +
28.23 +#ifdef CONFIG_CPU_JZ4730_MINIPC
28.24 +#include "minipc.h"
28.25 +#else
28.26 +#include "nanonote.h"
28.27 +#endif
28.28 +
28.29 +#include "board-specific.h"
28.30 +#include "board.h"
28.31 +#include "lcd.h"
28.32 +#include "jzlcd.h"
28.33 +#include "cpu.h"
28.34 +#include "irq.h"
28.35 +
28.36 +extern vidinfo_t panel_info;
28.37 +
28.38 +void next_pixel(unsigned short *x, unsigned short *y)
28.39 +{
28.40 + (*x)++;
28.41 + if (*x >= panel_info.vl_col) {
28.42 + *x = 0;
28.43 + (*y)++;
28.44 + if (*y >= panel_info.vl_row)
28.45 + *y = 0;
28.46 + }
28.47 +}
28.48 +
28.49 +/* Tasks. */
28.50 +
28.51 +void plot_pattern(unsigned short pixel_type, unsigned short x, unsigned short y)
28.52 +{
28.53 + while (1) {
28.54 + if (pixel_type)
28.55 + test_pixel(x, y);
28.56 + else
28.57 + clear_pixel(x, y);
28.58 + next_pixel(&x, &y);
28.59 + udelay(100);
28.60 + }
28.61 +}
28.62 +
28.63 +/* Initialisation and handling. */
28.64 +
28.65 +void irq_init()
28.66 +{
28.67 + timer_init_irq();
28.68 + handle_error_level();
28.69 + init_interrupts();
28.70 + enable_interrupts();
28.71 +}
28.72 +
28.73 +void irq_handle()
28.74 +{
28.75 + unsigned short i;
28.76 +
28.77 + /* Check interrupt identity. */
28.78 +
28.79 + if (REG_INTC_IPR & (1 << TIMER_CHAN_IRQ)) {
28.80 +
28.81 + /* Update the pixel type. */
28.82 +
28.83 + /* pixel_type = __gpio_get_pin(GPIO_POWER); */
28.84 +
28.85 + /* Clear interrupt status. */
28.86 +
28.87 + __intc_ack_irq(TIMER_CHAN_IRQ);
28.88 + __tcu_clear_full_match_flag(TIMER_CHAN);
28.89 +
28.90 + /* Handle other interrupts, anyway. */
28.91 +
28.92 + } else {
28.93 + for (i = 0; i < 32; i++) {
28.94 + if (REG_INTC_IPR & (1 << i))
28.95 + __intc_ack_irq(i);
28.96 + }
28.97 + }
28.98 +}
28.99 +
28.100 +void start_task()
28.101 +{
28.102 + enter_user_mode();
28.103 + plot_pattern(1, 0, 0);
28.104 +}
28.105 +
28.106 +void tlb_handle()
28.107 +{
28.108 + u32 context, virtual, physical;
28.109 +
28.110 + /* Obtain the bad virtual address. */
28.111 +
28.112 + asm volatile(
28.113 + "mfc0 %0, $4\n" /* CP0_CONTEXT */
28.114 + : "=r" (context)
28.115 + );
28.116 +
28.117 + /* Obtain a virtual address region with 8KB resolution. */
28.118 +
28.119 + virtual = (context & 0x007ffff0) << 9;
28.120 +
28.121 + /* The appropriate physical address depends on the current task. */
28.122 +
28.123 + physical = virtual;
28.124 +
28.125 + /*
28.126 + Request a physical region mapping two 4KB pages.
28.127 + Pages employ C=3, dirty, valid, with the task number as the ASID.
28.128 + */
28.129 +
28.130 + map_page(virtual, physical, 4 * 1024, 0x1f, 0);
28.131 +}
29.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
29.2 +++ b/stage2/irq.h Wed Feb 24 16:13:46 2016 +0100
29.3 @@ -0,0 +1,9 @@
29.4 +#ifndef __IRQ_H__
29.5 +#define __IRQ_H__
29.6 +
29.7 +/* Initialisation functions. */
29.8 +
29.9 +void irq_init(void);
29.10 +void start_task(void);
29.11 +
29.12 +#endif /* __IRQ_H__ */
30.1 --- a/stage2/jzlcd.c Sat Jun 13 00:06:18 2015 +0200
30.2 +++ b/stage2/jzlcd.c Wed Feb 24 16:13:46 2016 +0100
30.3 @@ -2,7 +2,7 @@
30.4 * JzRISC LCD controller
30.5 *
30.6 * Copyright (C) Xiangfu Liu <xiangfu@sharism.cc>
30.7 - * Copyright (C) 2015 Paul Boddie <paul@boddie.org.uk>
30.8 + * Copyright (C) 2015, 2016 Paul Boddie <paul@boddie.org.uk>
30.9 *
30.10 * This program is free software; you can redistribute it and/or
30.11 * modify it under the terms of the GNU General Public License as
30.12 @@ -22,11 +22,9 @@
30.13
30.14 #include "sdram.h"
30.15 #include "jzlcd.h"
30.16 +#include "cpu.h"
30.17 #include "board.h"
30.18
30.19 -#define ALIGN(x,a) __ALIGN_MASK((x),(typeof(x))(a)-1)
30.20 -#define __ALIGN_MASK(x,mask) (((x)+(mask))&~(mask))
30.21 -
30.22 #define align2(n) (n)=((((n)+1)>>1)<<1)
30.23 #define align4(n) (n)=((((n)+3)>>2)<<2)
30.24 #define align8(n) (n)=((((n)+7)>>3)<<3)
30.25 @@ -34,124 +32,335 @@
30.26 extern struct jzfb_info jzfb;
30.27 extern vidinfo_t panel_info;
30.28
30.29 -unsigned long lcd_get_size(void)
30.30 +static unsigned short lcd_get_panels()
30.31 {
30.32 - int line_length = (panel_info.vl_col * NBITS(panel_info.vl_bpix)) / 8;
30.33 - return line_length * panel_info.vl_row;
30.34 + return ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL) ||
30.35 + ((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL) ? 2 : 1;
30.36 +}
30.37 +
30.38 +
30.39 +
30.40 +/* Functions returning region sizes. */
30.41 +
30.42 +static unsigned long lcd_get_size(vidinfo_t *vid)
30.43 +{
30.44 + /* Lines must be aligned to a word boundary. */
30.45 + unsigned long line_length = ALIGN((vid->vl_col * NBITS(vid->vl_bpix)) / 8, sizeof(u32));
30.46 + return line_length * vid->vl_row;
30.47 }
30.48
30.49 -unsigned long lcd_setmem(unsigned long addr)
30.50 +static unsigned long lcd_get_aligned_size(vidinfo_t *vid)
30.51 {
30.52 - unsigned long size;
30.53 + /* LCD_CTRL_BST_16 requires 16-word alignment. */
30.54 + return ALIGN(lcd_get_size(vid), 16 * sizeof(u32));
30.55 +}
30.56
30.57 - size = lcd_get_size();
30.58 +static unsigned long lcd_get_min_size(vidinfo_t *vid)
30.59 +{
30.60 + /* Lines must be aligned to a word boundary. */
30.61 + unsigned long line_length = ALIGN((vid->vl_col * 32) / 8, sizeof(u32));
30.62 + return line_length * vid->vl_row;
30.63 +}
30.64
30.65 - /* Round up to nearest full page, or MMU section if defined */
30.66 - size = ALIGN(size, PAGE_SIZE);
30.67 - addr = ALIGN(addr - PAGE_SIZE + 1, PAGE_SIZE);
30.68 +static unsigned long lcd_get_aligned_min_size(vidinfo_t *vid)
30.69 +{
30.70 + /* LCD_CTRL_BST_16 requires 16-word alignment. */
30.71 + return ALIGN(lcd_get_min_size(vid), 16 * sizeof(u32));
30.72 +}
30.73
30.74 - /* Allocate pages for the frame buffer. */
30.75 - addr -= size;
30.76 -
30.77 - return addr;
30.78 +static unsigned long lcd_get_palette_size(vidinfo_t *vid)
30.79 +{
30.80 + if (NBITS(vid->vl_bpix) < 12)
30.81 + return NCOLORS(vid->vl_bpix) * sizeof(u16);
30.82 + else
30.83 + return 0;
30.84 }
30.85
30.86 -static int jz_lcd_init_mem(void *lcdbase, vidinfo_t *vid);
30.87 -static void jz_lcd_desc_init(vidinfo_t *vid);
30.88 -static int jz_lcd_hw_init(vidinfo_t *vid);
30.89 +static unsigned long lcd_get_aligned_palette_size(vidinfo_t *vid)
30.90 +{
30.91 + /* LCD_CTRL_BST_16 requires 16-word alignment. */
30.92 + return ALIGN(lcd_get_palette_size(vid), 16 * sizeof(u32));
30.93 +}
30.94
30.95 -void lcd_ctrl_init (void **lcdbase)
30.96 +static unsigned long lcd_get_descriptors_size()
30.97 {
30.98 - /* Start from the top of memory and obtain a framebuffer region. */
30.99 - *lcdbase = (void *) lcd_setmem(get_memory_size());
30.100 + return 3 * sizeof(struct jz_fb_dma_descriptor);
30.101 +}
30.102
30.103 - jz_lcd_init_mem(*lcdbase, &panel_info);
30.104 - jz_lcd_desc_init(&panel_info);
30.105 - jz_lcd_hw_init(&panel_info);
30.106 +static unsigned long lcd_get_total_size(vidinfo_t *vid)
30.107 +{
30.108 + unsigned long size = lcd_get_aligned_size(vid) * lcd_get_panels();
30.109 + unsigned long min_size = lcd_get_aligned_min_size(vid);
30.110 +
30.111 + /* Round up to nearest full page, or MMU section if defined. */
30.112 + return ALIGN((size >= min_size ? size : min_size) + lcd_get_aligned_palette_size(vid) + lcd_get_descriptors_size(), PAGE_SIZE);
30.113 }
30.114
30.115 -/*
30.116 - * Before enabled lcd controller, lcd registers should be configured correctly.
30.117 - */
30.118 -void lcd_enable (void)
30.119 +
30.120 +
30.121 +/* Functions returning addresses of each data region. */
30.122 +
30.123 +static unsigned long lcd_get_palette(unsigned long addr)
30.124 {
30.125 - REG_LCD_CTRL &= ~(1<<4); /* LCDCTRL.DIS */
30.126 - REG_LCD_CTRL |= 1<<3; /* LCDCTRL.ENA*/
30.127 -}
30.128 -
30.129 -void lcd_disable (void)
30.130 -{
30.131 - REG_LCD_CTRL |= (1<<4); /* LCDCTRL.DIS, regular disable */
30.132 - /* REG_LCD_CTRL |= (1<<3); */ /* LCDCTRL.DIS, quickly disable */
30.133 + /* Allocate memory at the end of the region for the palette. */
30.134 + return addr - lcd_get_aligned_palette_size(&panel_info);
30.135 }
30.136
30.137 -static int jz_lcd_init_mem(void *lcdbase, vidinfo_t *vid)
30.138 +static unsigned long lcd_get_descriptors(unsigned long addr)
30.139 {
30.140 - unsigned long palette_mem_size;
30.141 - struct jz_fb_info *fbi = &vid->jz_fb;
30.142 - int fb_size = vid->vl_row * (vid->vl_col * NBITS (vid->vl_bpix)) / 8;
30.143 + /* Allocate memory before the palette for the descriptor array. */
30.144 + return lcd_get_palette(addr) - lcd_get_descriptors_size();
30.145 +}
30.146
30.147 - fbi->screen = (unsigned long)lcdbase;
30.148 - fbi->palette_size = 256;
30.149 - palette_mem_size = fbi->palette_size * sizeof(u16);
30.150 +static unsigned long lcd_get_framebuffer(unsigned long addr, unsigned short panel)
30.151 +{
30.152 + /* Allocate pages for the frame buffer and palette. */
30.153 + return addr - lcd_get_total_size(&panel_info) + (panel * lcd_get_aligned_size(&panel_info));
30.154 +}
30.155
30.156 - /* locate palette and descs at end of page following fb */
30.157 - fbi->palette = (unsigned long)lcdbase + fb_size + PAGE_SIZE - palette_mem_size;
30.158 +
30.159
30.160 - return 0;
30.161 -}
30.162 +/* Initialisation functions. */
30.163
30.164 static void jz_lcd_desc_init(vidinfo_t *vid)
30.165 {
30.166 + struct jz_fb_dma_descriptor *descriptors;
30.167 struct jz_fb_info * fbi;
30.168 +
30.169 fbi = &vid->jz_fb;
30.170 - fbi->dmadesc_fblow = (struct jz_fb_dma_descriptor *)((unsigned int)fbi->palette - 3*16);
30.171 - fbi->dmadesc_fbhigh = (struct jz_fb_dma_descriptor *)((unsigned int)fbi->palette - 2*16);
30.172 - fbi->dmadesc_palette = (struct jz_fb_dma_descriptor *)((unsigned int)fbi->palette - 1*16);
30.173
30.174 - #define BYTES_PER_PANEL (vid->vl_col * vid->vl_row * NBITS(vid->vl_bpix) / 8)
30.175 + /* Allocate space for descriptors before the palette entries. */
30.176
30.177 - /* populate descriptors */
30.178 - fbi->dmadesc_fblow->fdadr = virt_to_phys(fbi->dmadesc_fblow);
30.179 - fbi->dmadesc_fblow->fsadr = virt_to_phys((void *)(fbi->screen + BYTES_PER_PANEL));
30.180 - fbi->dmadesc_fblow->fidr = 0;
30.181 - fbi->dmadesc_fblow->ldcmd = BYTES_PER_PANEL / 4 ;
30.182 + descriptors = (struct jz_fb_dma_descriptor *) lcd_get_descriptors(get_memory_size());
30.183 + fbi->dmadesc_fblow = (struct jz_fb_dma_descriptor *) &descriptors[0];
30.184 + fbi->dmadesc_fbhigh = (struct jz_fb_dma_descriptor *) &descriptors[1];
30.185 + fbi->dmadesc_palette = (struct jz_fb_dma_descriptor *) &descriptors[2];
30.186
30.187 - fbi->fdadr1 = virt_to_phys(fbi->dmadesc_fblow); /* only used in dual-panel mode */
30.188 + /* Populate descriptors. */
30.189
30.190 - fbi->dmadesc_fbhigh->fsadr = virt_to_phys((void *)fbi->screen);
30.191 - fbi->dmadesc_fbhigh->fidr = 0;
30.192 - fbi->dmadesc_fbhigh->ldcmd = BYTES_PER_PANEL / 4; /* length in word */
30.193 + if (lcd_get_panels() == 2)
30.194 + {
30.195 + fbi->dmadesc_fblow->fdadr = fbi->dmadesc_fblow;
30.196 + fbi->dmadesc_fblow->fsadr = lcd_get_framebuffer(get_memory_size(), 1);
30.197 + fbi->dmadesc_fblow->fidr = 0;
30.198 + fbi->dmadesc_fblow->ldcmd = lcd_get_size(vid) / 4 ;
30.199
30.200 - fbi->dmadesc_palette->fsadr = virt_to_phys((void *)fbi->palette);
30.201 - fbi->dmadesc_palette->fidr = 0;
30.202 - fbi->dmadesc_palette->ldcmd = (fbi->palette_size * 2)/4 | (1<<28);
30.203 + fbi->fdadr1 = fbi->dmadesc_fblow; /* only used in dual-panel mode */
30.204 + }
30.205
30.206 - if(NBITS(vid->vl_bpix) < 12)
30.207 + fbi->dmadesc_fbhigh->fsadr = fbi->screen;
30.208 + fbi->dmadesc_fbhigh->fidr = 0;
30.209 + fbi->dmadesc_fbhigh->ldcmd = lcd_get_size(vid) / 4; /* length in words */
30.210 +
30.211 + if (NBITS(vid->vl_bpix) < 12)
30.212 {
30.213 + fbi->dmadesc_palette->fsadr = fbi->palette;
30.214 + fbi->dmadesc_palette->fidr = 0;
30.215 + fbi->dmadesc_palette->ldcmd = (lcd_get_palette_size(vid) / 4) | (1<<28);
30.216 +
30.217 /* assume any mode with <12 bpp is palette driven */
30.218 - fbi->dmadesc_palette->fdadr = virt_to_phys(fbi->dmadesc_fbhigh);
30.219 - fbi->dmadesc_fbhigh->fdadr = virt_to_phys(fbi->dmadesc_palette);
30.220 + fbi->dmadesc_palette->fdadr = fbi->dmadesc_fbhigh;
30.221 + fbi->dmadesc_fbhigh->fdadr = fbi->dmadesc_palette;
30.222 /* flips back and forth between pal and fbhigh */
30.223 - fbi->fdadr0 = virt_to_phys(fbi->dmadesc_palette);
30.224 + fbi->fdadr0 = fbi->dmadesc_palette;
30.225 } else {
30.226 /* palette shouldn't be loaded in true-color mode */
30.227 - fbi->dmadesc_fbhigh->fdadr = virt_to_phys((void *)fbi->dmadesc_fbhigh);
30.228 - fbi->fdadr0 = virt_to_phys(fbi->dmadesc_fbhigh); /* no pal just fbhigh */
30.229 + fbi->dmadesc_fbhigh->fdadr = fbi->dmadesc_fbhigh;
30.230 + fbi->fdadr0 = fbi->dmadesc_fbhigh; /* no pal just fbhigh */
30.231 }
30.232
30.233 flush_cache_all();
30.234 }
30.235
30.236 -static int jz_lcd_hw_init(vidinfo_t *vid)
30.237 +static unsigned int jz_lcd_stn_init(unsigned int stnH)
30.238 +{
30.239 + unsigned int val = 0;
30.240 +
30.241 + switch (jzfb.bpp) {
30.242 + case 1:
30.243 + /* val |= LCD_CTRL_PEDN; */
30.244 + case 2:
30.245 + val |= LCD_CTRL_FRC_2;
30.246 + break;
30.247 + case 4:
30.248 + val |= LCD_CTRL_FRC_4;
30.249 + break;
30.250 + case 8:
30.251 + default:
30.252 + val |= LCD_CTRL_FRC_16;
30.253 + break;
30.254 + }
30.255 +
30.256 + switch (jzfb.cfg & STN_DAT_PINMASK) {
30.257 + case STN_DAT_PIN1:
30.258 + /* Do not adjust the hori-param value. */
30.259 + break;
30.260 + case STN_DAT_PIN2:
30.261 + align2(jzfb.hsw);
30.262 + align2(jzfb.elw);
30.263 + align2(jzfb.blw);
30.264 + break;
30.265 + case STN_DAT_PIN4:
30.266 + align4(jzfb.hsw);
30.267 + align4(jzfb.elw);
30.268 + align4(jzfb.blw);
30.269 + break;
30.270 + case STN_DAT_PIN8:
30.271 + align8(jzfb.hsw);
30.272 + align8(jzfb.elw);
30.273 + align8(jzfb.blw);
30.274 + break;
30.275 + }
30.276 +
30.277 + REG_LCD_VSYNC = (0 << 16) | jzfb.vsw;
30.278 + REG_LCD_HSYNC = ((jzfb.blw+jzfb.w) << 16) | (jzfb.blw+jzfb.w+jzfb.hsw);
30.279 +
30.280 + /* Screen setting */
30.281 + REG_LCD_VAT = ((jzfb.blw + jzfb.w + jzfb.hsw + jzfb.elw) << 16) | (stnH + jzfb.vsw + jzfb.bfw + jzfb.efw);
30.282 + REG_LCD_DAH = (jzfb.blw << 16) | (jzfb.blw + jzfb.w);
30.283 + REG_LCD_DAV = (0 << 16) | (stnH);
30.284 +
30.285 + /* AC BIAs signal */
30.286 + REG_LCD_PS = (0 << 16) | (stnH+jzfb.vsw+jzfb.efw+jzfb.bfw);
30.287 +
30.288 + return val;
30.289 +}
30.290 +
30.291 +static void jz_lcd_tft_init()
30.292 +{
30.293 + REG_LCD_VSYNC = (0 << 16) | jzfb.vsw;
30.294 + REG_LCD_HSYNC = (0 << 16) | jzfb.hsw;
30.295 + REG_LCD_DAV =((jzfb.vsw+jzfb.bfw) << 16) | (jzfb.vsw +jzfb.bfw+jzfb.h);
30.296 + REG_LCD_DAH = ((jzfb.hsw + jzfb.blw) << 16) | (jzfb.hsw + jzfb.blw + jzfb.w );
30.297 + REG_LCD_VAT = (((jzfb.blw + jzfb.w + jzfb.elw + jzfb.hsw)) << 16) \
30.298 + | (jzfb.vsw + jzfb.bfw + jzfb.h + jzfb.efw);
30.299 +}
30.300 +
30.301 +static void jz_lcd_samsung_init(unsigned int pclk)
30.302 +{
30.303 + unsigned int total, tp_s, tp_e, ckv_s, ckv_e;
30.304 + unsigned int rev_s, rev_e, inv_s, inv_e;
30.305 +
30.306 + jz_lcd_tft_init();
30.307 +
30.308 + total = jzfb.blw + jzfb.w + jzfb.elw + jzfb.hsw;
30.309 + tp_s = jzfb.blw + jzfb.w + 1;
30.310 + tp_e = tp_s + 1;
30.311 + /* ckv_s = tp_s - jz_clocks.pixclk/(1000000000/4100); */
30.312 + ckv_s = tp_s - pclk/(1000000000/4100);
30.313 + ckv_e = tp_s + total;
30.314 + rev_s = tp_s - 11; /* -11.5 clk */
30.315 + rev_e = rev_s + total;
30.316 + inv_s = tp_s;
30.317 + inv_e = inv_s + total;
30.318 + REG_LCD_CLS = (tp_s << 16) | tp_e;
30.319 + REG_LCD_PS = (ckv_s << 16) | ckv_e;
30.320 + REG_LCD_SPL = (rev_s << 16) | rev_e;
30.321 + REG_LCD_REV = (inv_s << 16) | inv_e;
30.322 + jzfb.cfg |= STFT_REVHI | STFT_SPLHI;
30.323 +}
30.324 +
30.325 +static void jz_lcd_sharp_init()
30.326 +{
30.327 + unsigned int total, cls_s, cls_e, ps_s, ps_e;
30.328 + unsigned int spl_s, spl_e, rev_s, rev_e;
30.329 +
30.330 + jz_lcd_tft_init();
30.331 +
30.332 + total = jzfb.blw + jzfb.w + jzfb.elw + jzfb.hsw;
30.333 + spl_s = 1;
30.334 + spl_e = spl_s + 1;
30.335 + cls_s = 0;
30.336 + cls_e = total - 60; /* > 4us (pclk = 80ns) */
30.337 + ps_s = cls_s;
30.338 + ps_e = cls_e;
30.339 + rev_s = total - 40; /* > 3us (pclk = 80ns) */
30.340 + rev_e = rev_s + total;
30.341 + jzfb.cfg |= STFT_PSHI;
30.342 + REG_LCD_SPL = (spl_s << 16) | spl_e;
30.343 + REG_LCD_CLS = (cls_s << 16) | cls_e;
30.344 + REG_LCD_PS = (ps_s << 16) | ps_e;
30.345 + REG_LCD_REV = (rev_s << 16) | rev_e;
30.346 +}
30.347 +
30.348 +static unsigned int jz_lcd_get_pixel_clock()
30.349 +{
30.350 + unsigned int pclk;
30.351 +
30.352 + /* Derive pixel clock from frame clock. */
30.353 +
30.354 + if ( (jzfb.cfg & MODE_MASK) != MODE_8BIT_SERIAL_TFT) {
30.355 + pclk = jzfb.fclk * (jzfb.w + jzfb.hsw + jzfb.elw + jzfb.blw) *
30.356 + (jzfb.h + jzfb.vsw + jzfb.efw + jzfb.bfw);
30.357 + } else {
30.358 + /* serial mode: Hsync period = 3*Width_Pixel */
30.359 + pclk = jzfb.fclk * (jzfb.w*3 + jzfb.hsw + jzfb.elw + jzfb.blw) *
30.360 + (jzfb.h + jzfb.vsw + jzfb.efw + jzfb.bfw);
30.361 + }
30.362 +
30.363 + if (((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_SINGLE) ||
30.364 + ((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL))
30.365 + pclk = (pclk * 3);
30.366 +
30.367 + if (((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_SINGLE) ||
30.368 + ((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL) ||
30.369 + ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_SINGLE) ||
30.370 + ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL))
30.371 + pclk = pclk >> ((jzfb.cfg & STN_DAT_PINMASK) >> 4);
30.372 +
30.373 + if (((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL) ||
30.374 + ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL))
30.375 + pclk >>= 1;
30.376 +
30.377 + return pclk;
30.378 +}
30.379 +
30.380 +static void jz_lcd_set_timing(unsigned int pclk)
30.381 +{
30.382 + unsigned int val;
30.383 +
30.384 +#ifdef CONFIG_CPU_JZ4730
30.385 + val = __cpm_get_pllout() / pclk;
30.386 + REG_CPM_CFCR2 = val - 1;
30.387 + val = pclk * 4 ;
30.388 + if ( val > 150000000 ) {
30.389 + val = 150000000;
30.390 + }
30.391 + val = __cpm_get_pllout() / val;
30.392 + val--;
30.393 + if ( val > 0xF )
30.394 + val = 0xF;
30.395 +#else
30.396 + int pll_div;
30.397 +
30.398 + pll_div = ( REG_CPM_CPCCR & CPM_CPCCR_PCS ); /* clock source,0:pllout/2 1: pllout */
30.399 + pll_div = pll_div ? 1 : 2 ;
30.400 + val = ( __cpm_get_pllout()/pll_div ) / pclk;
30.401 + val--;
30.402 + if ( val > 0x1ff ) {
30.403 + val = 0x1ff;
30.404 + }
30.405 + __cpm_set_pixdiv(val);
30.406 +
30.407 + val = pclk * 3 ; /* LCDClock > 2.5*Pixclock */
30.408 + if ( val > 150000000 ) {
30.409 + val = 150000000;
30.410 + }
30.411 + val = ( __cpm_get_pllout()/pll_div ) / val;
30.412 + val--;
30.413 + if ( val > 0x1f ) {
30.414 + val = 0x1f;
30.415 + }
30.416 +#endif
30.417 + __cpm_set_ldiv( val );
30.418 + REG_CPM_CPCCR |= CPM_CPCCR_CE ; /* update divide */
30.419 +}
30.420 +
30.421 +static int jz_lcd_hw_init(vidinfo_t *vid)
30.422 {
30.423 struct jz_fb_info *fbi = &vid->jz_fb;
30.424 unsigned int val = 0;
30.425 - unsigned int pclk;
30.426 - unsigned int stnH;
30.427 -#ifndef CONFIG_CPU_JZ4730
30.428 - int pll_div;
30.429 -#endif
30.430 + unsigned int pclk = jz_lcd_get_pixel_clock();
30.431
30.432 /* Setting Control register */
30.433 switch (jzfb.bpp) {
30.434 @@ -186,228 +395,148 @@
30.435 switch (jzfb.cfg & MODE_MASK) {
30.436 case MODE_STN_MONO_DUAL:
30.437 case MODE_STN_COLOR_DUAL:
30.438 + val |= jz_lcd_stn_init(jzfb.h >> 1);
30.439 + break;
30.440 +
30.441 case MODE_STN_MONO_SINGLE:
30.442 case MODE_STN_COLOR_SINGLE:
30.443 - switch (jzfb.bpp) {
30.444 - case 1:
30.445 - /* val |= LCD_CTRL_PEDN; */
30.446 - case 2:
30.447 - val |= LCD_CTRL_FRC_2;
30.448 - break;
30.449 - case 4:
30.450 - val |= LCD_CTRL_FRC_4;
30.451 - break;
30.452 - case 8:
30.453 - default:
30.454 - val |= LCD_CTRL_FRC_16;
30.455 - break;
30.456 - }
30.457 + val |= jz_lcd_stn_init(jzfb.h);
30.458 break;
30.459 - }
30.460 -
30.461 - val |= LCD_CTRL_BST_16; /* Burst Length is 16WORD=64Byte */
30.462 - val |= LCD_CTRL_OFUP; /* OutFIFO underrun protect */
30.463
30.464 - switch (jzfb.cfg & MODE_MASK) {
30.465 - case MODE_STN_MONO_DUAL:
30.466 - case MODE_STN_COLOR_DUAL:
30.467 - case MODE_STN_MONO_SINGLE:
30.468 - case MODE_STN_COLOR_SINGLE:
30.469 - switch (jzfb.cfg & STN_DAT_PINMASK) {
30.470 - case STN_DAT_PIN1:
30.471 - /* Do not adjust the hori-param value. */
30.472 - break;
30.473 - case STN_DAT_PIN2:
30.474 - align2(jzfb.hsw);
30.475 - align2(jzfb.elw);
30.476 - align2(jzfb.blw);
30.477 - break;
30.478 - case STN_DAT_PIN4:
30.479 - align4(jzfb.hsw);
30.480 - align4(jzfb.elw);
30.481 - align4(jzfb.blw);
30.482 - break;
30.483 - case STN_DAT_PIN8:
30.484 - align8(jzfb.hsw);
30.485 - align8(jzfb.elw);
30.486 - align8(jzfb.blw);
30.487 - break;
30.488 - }
30.489 + case MODE_TFT_GEN:
30.490 + case MODE_TFT_CASIO:
30.491 + case MODE_8BIT_SERIAL_TFT:
30.492 + case MODE_TFT_18BIT:
30.493 + jz_lcd_tft_init();
30.494 + break;
30.495 +
30.496 + case MODE_TFT_SAMSUNG:
30.497 + {
30.498 + jz_lcd_samsung_init(pclk);
30.499 break;
30.500 }
30.501
30.502 - REG_LCD_CTRL = val;
30.503 -
30.504 - switch (jzfb.cfg & MODE_MASK) {
30.505 - case MODE_STN_MONO_DUAL:
30.506 - case MODE_STN_COLOR_DUAL:
30.507 - case MODE_STN_MONO_SINGLE:
30.508 - case MODE_STN_COLOR_SINGLE:
30.509 - if (((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL) ||
30.510 - ((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL))
30.511 - stnH = jzfb.h >> 1;
30.512 - else
30.513 - stnH = jzfb.h;
30.514 -
30.515 - REG_LCD_VSYNC = (0 << 16) | jzfb.vsw;
30.516 - REG_LCD_HSYNC = ((jzfb.blw+jzfb.w) << 16) | (jzfb.blw+jzfb.w+jzfb.hsw);
30.517 -
30.518 - /* Screen setting */
30.519 - REG_LCD_VAT = ((jzfb.blw + jzfb.w + jzfb.hsw + jzfb.elw) << 16) | (stnH + jzfb.vsw + jzfb.bfw + jzfb.efw);
30.520 - REG_LCD_DAH = (jzfb.blw << 16) | (jzfb.blw + jzfb.w);
30.521 - REG_LCD_DAV = (0 << 16) | (stnH);
30.522 -
30.523 - /* AC BIAs signal */
30.524 - REG_LCD_PS = (0 << 16) | (stnH+jzfb.vsw+jzfb.efw+jzfb.bfw);
30.525 -
30.526 - break;
30.527 -
30.528 - case MODE_TFT_GEN:
30.529 case MODE_TFT_SHARP:
30.530 - case MODE_TFT_CASIO:
30.531 - case MODE_TFT_SAMSUNG:
30.532 - case MODE_8BIT_SERIAL_TFT:
30.533 - case MODE_TFT_18BIT:
30.534 - REG_LCD_VSYNC = (0 << 16) | jzfb.vsw;
30.535 - REG_LCD_HSYNC = (0 << 16) | jzfb.hsw;
30.536 - REG_LCD_DAV =((jzfb.vsw+jzfb.bfw) << 16) | (jzfb.vsw +jzfb.bfw+jzfb.h);
30.537 - REG_LCD_DAH = ((jzfb.hsw + jzfb.blw) << 16) | (jzfb.hsw + jzfb.blw + jzfb.w );
30.538 - REG_LCD_VAT = (((jzfb.blw + jzfb.w + jzfb.elw + jzfb.hsw)) << 16) \
30.539 - | (jzfb.vsw + jzfb.bfw + jzfb.h + jzfb.efw);
30.540 + {
30.541 + jz_lcd_sharp_init();
30.542 break;
30.543 }
30.544
30.545 - switch (jzfb.cfg & MODE_MASK) {
30.546 - case MODE_TFT_SAMSUNG:
30.547 - {
30.548 - unsigned int total, tp_s, tp_e, ckv_s, ckv_e;
30.549 - unsigned int rev_s, rev_e, inv_s, inv_e;
30.550 -
30.551 - pclk = val * (jzfb.w + jzfb.hsw + jzfb.elw + jzfb.blw) *
30.552 - (jzfb.h + jzfb.vsw + jzfb.efw + jzfb.bfw); /* Pixclk */
30.553 -
30.554 - total = jzfb.blw + jzfb.w + jzfb.elw + jzfb.hsw;
30.555 - tp_s = jzfb.blw + jzfb.w + 1;
30.556 - tp_e = tp_s + 1;
30.557 - /* ckv_s = tp_s - jz_clocks.pixclk/(1000000000/4100); */
30.558 - ckv_s = tp_s - pclk/(1000000000/4100);
30.559 - ckv_e = tp_s + total;
30.560 - rev_s = tp_s - 11; /* -11.5 clk */
30.561 - rev_e = rev_s + total;
30.562 - inv_s = tp_s;
30.563 - inv_e = inv_s + total;
30.564 - REG_LCD_CLS = (tp_s << 16) | tp_e;
30.565 - REG_LCD_PS = (ckv_s << 16) | ckv_e;
30.566 - REG_LCD_SPL = (rev_s << 16) | rev_e;
30.567 - REG_LCD_REV = (inv_s << 16) | inv_e;
30.568 - jzfb.cfg |= STFT_REVHI | STFT_SPLHI;
30.569 - break;
30.570 - }
30.571 - case MODE_TFT_SHARP:
30.572 - {
30.573 - unsigned int total, cls_s, cls_e, ps_s, ps_e;
30.574 - unsigned int spl_s, spl_e, rev_s, rev_e;
30.575 - total = jzfb.blw + jzfb.w + jzfb.elw + jzfb.hsw;
30.576 - spl_s = 1;
30.577 - spl_e = spl_s + 1;
30.578 - cls_s = 0;
30.579 - cls_e = total - 60; /* > 4us (pclk = 80ns) */
30.580 - ps_s = cls_s;
30.581 - ps_e = cls_e;
30.582 - rev_s = total - 40; /* > 3us (pclk = 80ns) */
30.583 - rev_e = rev_s + total;
30.584 - jzfb.cfg |= STFT_PSHI;
30.585 - REG_LCD_SPL = (spl_s << 16) | spl_e;
30.586 - REG_LCD_CLS = (cls_s << 16) | cls_e;
30.587 - REG_LCD_PS = (ps_s << 16) | ps_e;
30.588 - REG_LCD_REV = (rev_s << 16) | rev_e;
30.589 - break;
30.590 - }
30.591 - case MODE_TFT_CASIO:
30.592 + default:
30.593 break;
30.594 }
30.595
30.596 /* Configure the LCD panel */
30.597 +
30.598 + val |= LCD_CTRL_BST_16; /* Burst Length is 16WORD=64Byte */
30.599 + val |= LCD_CTRL_OFUP; /* OutFIFO underrun protect */
30.600 + REG_LCD_CTRL = val;
30.601 REG_LCD_CFG = jzfb.cfg;
30.602
30.603 - /* Timing setting */
30.604 - __cpm_stop_lcd();
30.605 + /* Timing reset. */
30.606
30.607 - val = jzfb.fclk; /* frame clk */
30.608 - if ( (jzfb.cfg & MODE_MASK) != MODE_8BIT_SERIAL_TFT) {
30.609 - pclk = val * (jzfb.w + jzfb.hsw + jzfb.elw + jzfb.blw) *
30.610 - (jzfb.h + jzfb.vsw + jzfb.efw + jzfb.bfw); /* Pixclk */
30.611 - } else {
30.612 - /* serial mode: Hsync period = 3*Width_Pixel */
30.613 - pclk = val * (jzfb.w*3 + jzfb.hsw + jzfb.elw + jzfb.blw) *
30.614 - (jzfb.h + jzfb.vsw + jzfb.efw + jzfb.bfw); /* Pixclk */
30.615 - }
30.616 + __cpm_stop_lcd();
30.617 + jz_lcd_set_timing(pclk);
30.618 + __cpm_start_lcd();
30.619 + udelay(1000);
30.620
30.621 - if (((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_SINGLE) ||
30.622 - ((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL))
30.623 - pclk = (pclk * 3);
30.624 + /* Configure DMA. */
30.625
30.626 - if (((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_SINGLE) ||
30.627 - ((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL) ||
30.628 - ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_SINGLE) ||
30.629 - ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL))
30.630 - pclk = pclk >> ((jzfb.cfg & STN_DAT_PINMASK) >> 4);
30.631 + REG_LCD_DA0 = (unsigned long) fbi->fdadr0; /* frame descriptor */
30.632
30.633 if (((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL) ||
30.634 ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL))
30.635 - pclk >>= 1;
30.636 -
30.637 -#ifdef CONFIG_CPU_JZ4730
30.638 - val = __cpm_get_pllout() / pclk;
30.639 - REG_CPM_CFCR2 = val - 1;
30.640 - val = pclk * 4 ;
30.641 - if ( val > 150000000 ) {
30.642 - val = 150000000;
30.643 - }
30.644 - val = __cpm_get_pllout() / val;
30.645 - val--;
30.646 - if ( val > 0xF )
30.647 - val = 0xF;
30.648 - __cpm_set_lcdclk_div(val);
30.649 - REG_CPM_CFCR |= CPM_CFCR_UPE;
30.650 -#else
30.651 - pll_div = ( REG_CPM_CPCCR & CPM_CPCCR_PCS ); /* clock source,0:pllout/2 1: pllout */
30.652 - pll_div = pll_div ? 1 : 2 ;
30.653 - val = ( __cpm_get_pllout()/pll_div ) / pclk;
30.654 - val--;
30.655 - if ( val > 0x1ff ) {
30.656 - val = 0x1ff;
30.657 - }
30.658 - __cpm_set_pixdiv(val);
30.659 -
30.660 - val = pclk * 3 ; /* LCDClock > 2.5*Pixclock */
30.661 - if ( val > 150000000 ) {
30.662 - val = 150000000;
30.663 - }
30.664 - val = ( __cpm_get_pllout()/pll_div ) / val;
30.665 - val--;
30.666 - if ( val > 0x1f ) {
30.667 - val = 0x1f;
30.668 - }
30.669 - __cpm_set_ldiv( val );
30.670 - REG_CPM_CPCCR |= CPM_CPCCR_CE ; /* update divide */
30.671 -#endif
30.672 - __cpm_start_lcd();
30.673 - udelay(1000);
30.674 -
30.675 - REG_LCD_DA0 = fbi->fdadr0; /* frame descripter*/
30.676 -
30.677 - if (((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL) ||
30.678 - ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL))
30.679 - REG_LCD_DA1 = fbi->fdadr1; /* frame descripter*/
30.680 + REG_LCD_DA1 = (unsigned long) fbi->fdadr1; /* frame descriptor */
30.681
30.682 return 0;
30.683 }
30.684
30.685 -void lcd_setcolreg (unsigned short regno, unsigned short red, unsigned short green, unsigned short blue)
30.686 +static inline u8 LCD_CODE(u8 bpp)
30.687 +{
30.688 + u8 code = 0;
30.689 + while (bpp && !(bpp & 1))
30.690 + {
30.691 + bpp >>= 1;
30.692 + code += 1;
30.693 + }
30.694 + return code;
30.695 +}
30.696 +
30.697 +/* Public operations. */
30.698 +
30.699 +void lcd_set_bpp(u8 bpp)
30.700 {
30.701 + jzfb.bpp = bpp;
30.702 + panel_info.vl_bpix = LCD_CODE(bpp);
30.703 +}
30.704 +
30.705 +void lcd_enable(void)
30.706 +{
30.707 + /* Clear the disable bit and set the enable bit. */
30.708 +
30.709 + REG_LCD_CTRL &= ~(1<<4); /* LCDCTRL.DIS */
30.710 + REG_LCD_CTRL |= 1<<3; /* LCDCTRL.ENA*/
30.711 +}
30.712 +
30.713 +void lcd_disable(void)
30.714 +{
30.715 + REG_LCD_CTRL |= (1<<4); /* LCDCTRL.DIS, regular disable */
30.716 +}
30.717 +
30.718 +void lcd_quick_disable(void)
30.719 +{
30.720 + REG_LCD_CTRL &= ~(1<<4); /* LCDCTRL.ENA, quick disable */
30.721 +}
30.722 +
30.723 +static inline u16 rgb8_to_rgb16(u8 rgb)
30.724 +{
30.725 + return ((((rgb & 0xe0) >> 5) * 4) << 11) | ((((rgb & 0x1c) >> 2) * 9) << 6) | ((rgb & 0x03) * 10);
30.726 }
30.727
30.728 -void lcd_initcolregs (void)
30.729 +static inline u16 rgb4_to_rgb16(u8 rgb)
30.730 +{
30.731 + return ((((rgb & 8) >> 3) * 0x1f) << 11) | ((((rgb & 6) >> 1) * 0x15) << 5) | ((rgb & 1) * 0x1f);
30.732 +}
30.733 +
30.734 +static void lcd_init_palette(vidinfo_t *vid)
30.735 {
30.736 + u16 *palette = (u16 *) lcd_get_palette(get_memory_size());
30.737 + u16 *end = (u16 *) palette + NCOLORS(vid->vl_bpix);
30.738 + u8 value = 0;
30.739 +
30.740 + while (palette < end)
30.741 + {
30.742 + switch (vid->vl_bpix)
30.743 + {
30.744 + case LCD_COLOR4:
30.745 + *palette = rgb4_to_rgb16(value);
30.746 + break;
30.747 +
30.748 + case LCD_COLOR8:
30.749 + default:
30.750 + *palette = rgb8_to_rgb16(value);
30.751 + break;
30.752 + }
30.753 +
30.754 + value++;
30.755 + palette++;
30.756 + }
30.757 }
30.758 +
30.759 +unsigned long lcd_ctrl_init()
30.760 +{
30.761 + struct jz_fb_info *fbi = &panel_info.jz_fb;
30.762 +
30.763 + /* Start from the top of memory and obtain palette and framebuffer regions. */
30.764 +
30.765 + fbi->screen = lcd_get_framebuffer(get_memory_size(), 0);
30.766 + fbi->palette = lcd_get_palette(get_memory_size());
30.767 +
30.768 + if (NBITS(panel_info.vl_bpix) < 12)
30.769 + lcd_init_palette(&panel_info);
30.770 +
30.771 + jz_lcd_desc_init(&panel_info);
30.772 + jz_lcd_hw_init(&panel_info);
30.773 +
30.774 + return fbi->screen;
30.775 +}
31.1 --- a/stage2/jzlcd.h Sat Jun 13 00:06:18 2015 +0200
31.2 +++ b/stage2/jzlcd.h Wed Feb 24 16:13:46 2016 +0100
31.3 @@ -4,7 +4,7 @@
31.4 * Copyright (C) 2001 Wolfgang Denk, DENX Software Engineering, wd@denx.de.
31.5 * Copyright (C) 2005-2007, Ingenic Semiconductor Inc.
31.6 * Copyright (C) Xiangfu Liu <xiangfu@sharism.cc>
31.7 - * Copyright (C) 2015 Paul Boddie <paul@boddie.org.uk>
31.8 + * Copyright (C) 2015, 2016 Paul Boddie <paul@boddie.org.uk>
31.9 *
31.10 * This program is free software; you can redistribute it and/or
31.11 * modify it under the terms of the GNU General Public License as
31.12 @@ -25,8 +25,10 @@
31.13 #ifndef __JZLCD_H__
31.14 #define __JZLCD_H__
31.15
31.16 -unsigned long lcd_get_size(void);
31.17 -void lcd_ctrl_init(void **lcdbase);
31.18 +#include "xburst_types.h"
31.19 +
31.20 +void lcd_set_bpp(u8 bpp);
31.21 +unsigned long lcd_ctrl_init();
31.22 void lcd_enable(void);
31.23 void lcd_disable(void);
31.24
31.25 @@ -51,10 +53,10 @@
31.26 * LCD controller stucture for JZSOC: JZ4740
31.27 */
31.28 struct jz_fb_dma_descriptor {
31.29 - unsigned long fdadr; /* Frame descriptor address register */
31.30 - unsigned long fsadr; /* Frame source address register */
31.31 - unsigned long fidr; /* Frame ID register */
31.32 - unsigned long ldcmd; /* Command register */
31.33 + struct jz_fb_dma_descriptor *fdadr; /* Frame descriptor address register */
31.34 + unsigned long fsadr; /* Frame source address register */
31.35 + unsigned long fidr; /* Frame ID register */
31.36 + unsigned long ldcmd; /* Command register */
31.37 };
31.38
31.39 /*
31.40 @@ -62,16 +64,16 @@
31.41 */
31.42 struct jz_fb_info {
31.43
31.44 - unsigned long fdadr0; /* physical address of frame/palette descriptor */
31.45 - unsigned long fdadr1; /* physical address of frame descriptor */
31.46 + struct jz_fb_dma_descriptor *fdadr0; /* physical address of frame/palette descriptor */
31.47 + struct jz_fb_dma_descriptor *fdadr1; /* physical address of frame descriptor */
31.48
31.49 /* DMA descriptors */
31.50 struct jz_fb_dma_descriptor *dmadesc_fblow;
31.51 struct jz_fb_dma_descriptor *dmadesc_fbhigh;
31.52 struct jz_fb_dma_descriptor *dmadesc_palette;
31.53 +
31.54 unsigned long screen; /* address of frame buffer */
31.55 unsigned long palette; /* address of palette memory */
31.56 - unsigned int palette_size;
31.57 };
31.58
31.59 /*
31.60 @@ -85,6 +87,11 @@
31.61 struct jz_fb_info jz_fb;
31.62 } vidinfo_t;
31.63
31.64 +/* Alignment/rounding macros. */
31.65 +
31.66 +#define ALIGN(x,a) __ALIGN_MASK((x),(typeof(x))(a)-1)
31.67 +#define __ALIGN_MASK(x,mask) (((x)+(mask))&~(mask))
31.68 +
31.69 /* General values for colour depths and framebuffer characteristics. */
31.70
31.71 #define LCD_MONOCHROME 0
32.1 --- a/stage2/lcd.c Sat Jun 13 00:06:18 2015 +0200
32.2 +++ b/stage2/lcd.c Wed Feb 24 16:13:46 2016 +0100
32.3 @@ -2,20 +2,20 @@
32.4 * Ben NanoNote LCD initialisation, based on uboot-xburst and xburst-tools.
32.5 *
32.6 * Copyright (C) 2001-2002 Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
32.7 - * Copyright (C) 2015 Paul Boddie <paul@boddie.org.uk>
32.8 + * Copyright (C) 2015, 2016 Paul Boddie <paul@boddie.org.uk>
32.9 *
32.10 - * This program is free software; you can redistribute it and/or modify it under
32.11 - * the terms of the GNU General Public License as published by the Free Software
32.12 - * Foundation; either version 3 of the License, or (at your option) any later
32.13 - * version.
32.14 + * This program is free software: you can redistribute it and/or modify
32.15 + * it under the terms of the GNU General Public License as published by
32.16 + * the Free Software Foundation, either version 3 of the License, or
32.17 + * (at your option) any later version.
32.18 *
32.19 - * This program is distributed in the hope that it will be useful, but WITHOUT
32.20 - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
32.21 - * FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
32.22 - * details.
32.23 + * This program is distributed in the hope that it will be useful,
32.24 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
32.25 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
32.26 + * GNU General Public License for more details.
32.27 *
32.28 - * You should have received a copy of the GNU General Public License along with
32.29 - * this program. If not, see <http://www.gnu.org/licenses/>.
32.30 + * You should have received a copy of the GNU General Public License
32.31 + * along with this program. If not, see <http://www.gnu.org/licenses/>.
32.32 */
32.33
32.34 #ifdef CONFIG_CPU_JZ4730_MINIPC
32.35 @@ -32,41 +32,196 @@
32.36 #include "board.h"
32.37
32.38 extern vidinfo_t panel_info;
32.39 +static unsigned long lcd_base;
32.40
32.41 -static void test_pattern(void *lcd_base)
32.42 +static unsigned int get_line_length()
32.43 +{
32.44 + return ALIGN((panel_info.vl_col * NBITS(panel_info.vl_bpix)) / 8, sizeof(u32));
32.45 +}
32.46 +
32.47 +static u32 *get_pixel32(unsigned short h, unsigned short v)
32.48 +{
32.49 + return (u32 *) (lcd_base + v * get_line_length()) + h;
32.50 +}
32.51 +
32.52 +static u16 *get_pixel16(unsigned short h, unsigned short v)
32.53 +{
32.54 + return (u16 *) (lcd_base + v * get_line_length()) + h;
32.55 +}
32.56 +
32.57 +static u8 *get_pixel8(unsigned short h, unsigned short v)
32.58 +{
32.59 + return (u8 *) (lcd_base + v * get_line_length()) + h;
32.60 +}
32.61 +
32.62 +static u8 *get_pixel4(unsigned short h, unsigned short v)
32.63 +{
32.64 + return (u8 *) (lcd_base + v * get_line_length()) + h / 2;
32.65 +}
32.66 +
32.67 +static inline unsigned short div(unsigned short num, unsigned short denom, unsigned short scale)
32.68 +{
32.69 + return (scale * num) / denom;
32.70 +}
32.71 +
32.72 +static unsigned long pixel(u8 r, u8 g, u8 b, u8 rmax, u8 gmax, u8 bmax, u8 rshift, u8 gshift, u8 bshift)
32.73 +{
32.74 + return (div(r, 255, rmax) << rshift) | (div(g, 255, gmax) << gshift) | (div(b, 255, bmax) << bshift);
32.75 +}
32.76 +
32.77 +static void get_colour(unsigned short h, unsigned short v, u8 rgb[])
32.78 +{
32.79 + unsigned short v_max = panel_info.vl_row;
32.80 + unsigned short h_max = panel_info.vl_col;
32.81 +
32.82 + rgb[0] = div(h, h_max, 255);
32.83 + rgb[1] = div(v, v_max, 255);
32.84 + rgb[2] = (rgb[0] + rgb[1]) / 2;
32.85 +}
32.86 +
32.87 +static void test_pixel32(unsigned short h, unsigned short v)
32.88 +{
32.89 + u32 *pix = get_pixel32(h, v);
32.90 + u8 rgb[3];
32.91 +
32.92 + get_colour(h, v, rgb);
32.93 + *pix = (u32) pixel(rgb[0], rgb[1], rgb[2], 255, 255, 255, 16, 8, 0);
32.94 +}
32.95 +
32.96 +static void test_pixel16_565(unsigned short h, unsigned short v)
32.97 +{
32.98 + u16 *pix = get_pixel16(h, v);
32.99 + u8 rgb[3];
32.100 +
32.101 + get_colour(h, v, rgb);
32.102 + *pix = (u16) pixel(rgb[0], rgb[1], rgb[2], 31, 63, 31, 11, 5, 0);
32.103 +}
32.104 +
32.105 +static void test_pixel8(unsigned short h, unsigned short v)
32.106 +{
32.107 + u8 *pix = get_pixel8(h, v);
32.108 + u8 rgb[3];
32.109 +
32.110 + get_colour(h, v, rgb);
32.111 + *pix = (u8) pixel(rgb[0], rgb[1], rgb[2], 7, 7, 3, 5, 2, 0);
32.112 +}
32.113 +
32.114 +static void test_pixel4(unsigned short h, unsigned short v)
32.115 +{
32.116 + u8 *pix = get_pixel4(h, v);
32.117 + u8 mask = h & 1 ? 0xf0 : 0x0f;
32.118 + u8 rgb[3];
32.119 +
32.120 + get_colour(h, v, rgb);
32.121 + *pix = (*pix & mask) | ((u8) pixel(rgb[0], rgb[1], rgb[2], 1, 2, 1, 3, 1, 0) << (h & 1 ? 0 : 4));
32.122 +}
32.123 +
32.124 +void test_pixel(unsigned short h, unsigned short v)
32.125 +{
32.126 + switch (panel_info.vl_bpix)
32.127 + {
32.128 + case LCD_COLOR32:
32.129 + test_pixel32(h, v);
32.130 + break;
32.131 +
32.132 + case LCD_COLOR8:
32.133 + test_pixel8(h, v);
32.134 + break;
32.135 +
32.136 + case LCD_COLOR4:
32.137 + test_pixel4(h, v);
32.138 + break;
32.139 +
32.140 + case LCD_COLOR16:
32.141 + default:
32.142 + test_pixel16_565(h, v);
32.143 + break;
32.144 + }
32.145 +}
32.146 +
32.147 +void clear_pixel32(unsigned short h, unsigned short v)
32.148 +{
32.149 + u32 *pix = get_pixel32(h, v);
32.150 + *pix = 0;
32.151 +}
32.152 +
32.153 +void clear_pixel16(unsigned short h, unsigned short v)
32.154 +{
32.155 + u16 *pix = get_pixel16(h, v);
32.156 + *pix = 0;
32.157 +}
32.158 +
32.159 +void clear_pixel8(unsigned short h, unsigned short v)
32.160 +{
32.161 + u8 *pix = get_pixel8(h, v);
32.162 + *pix = 0;
32.163 +}
32.164 +
32.165 +void clear_pixel4(unsigned short h, unsigned short v)
32.166 +{
32.167 + u8 *pix = get_pixel4(h, v);
32.168 + u8 mask = h & 1 ? 0xf0 : 0x0f;
32.169 + *pix = *pix & mask;
32.170 +}
32.171 +
32.172 +void clear_pixel(unsigned short h, unsigned short v)
32.173 +{
32.174 + switch (panel_info.vl_bpix)
32.175 + {
32.176 + case LCD_COLOR32:
32.177 + clear_pixel32(h, v);
32.178 + break;
32.179 +
32.180 + case LCD_COLOR8:
32.181 + clear_pixel8(h, v);
32.182 + break;
32.183 +
32.184 + case LCD_COLOR4:
32.185 + clear_pixel4(h, v);
32.186 + break;
32.187 +
32.188 + case LCD_COLOR16:
32.189 + default:
32.190 + clear_pixel16(h, v);
32.191 + break;
32.192 + }
32.193 +}
32.194 +
32.195 +void test_pattern()
32.196 {
32.197 unsigned short v_max = panel_info.vl_row;
32.198 unsigned short h_max = panel_info.vl_col;
32.199 unsigned short v, h;
32.200 - u32 *pix = (u32 *)lcd_base;
32.201
32.202 - /* WARNING: Code silently assumes 32 bit/pixel */
32.203 for (v = 0; v < v_max; v += 1) {
32.204 for (h = 0; h < h_max; h += 1) {
32.205 - *pix++ = (
32.206 - (((255 * (h_max - h)) / (h_max - 1)) << 16) +
32.207 - ((((255 * h) / (h_max - 1) + (255 * (v_max - v)) / (v_max - 1)) / 2) << 8) +
32.208 - ((255 * v) / (v_max - 1))
32.209 - );
32.210 + test_pixel(h, v);
32.211 }
32.212 }
32.213 }
32.214
32.215 -void lcd_clear(void *lcd_base)
32.216 +void lcd_clear(unsigned long lcd_base)
32.217 {
32.218 - test_pattern(lcd_base);
32.219 + unsigned short v_max = panel_info.vl_row;
32.220 + unsigned short h_max = panel_info.vl_col;
32.221 + unsigned short v, h;
32.222 + unsigned long *pix = (unsigned long *)lcd_base;
32.223 +
32.224 + for (v = 0; v < v_max; v += 1) {
32.225 + for (h = 0; h < h_max; h += 1) {
32.226 + *pix++ = 0;
32.227 + }
32.228 + }
32.229 }
32.230
32.231 /* LCD initialisation. */
32.232
32.233 -static void *lcd_base;
32.234 -
32.235 void lcd_init(void)
32.236 {
32.237 __lcd_display_pin_init();
32.238 __lcd_display_on();
32.239
32.240 - lcd_ctrl_init(&lcd_base);
32.241 + lcd_base = lcd_ctrl_init();
32.242 lcd_clear(lcd_base);
32.243 lcd_enable();
32.244 }
33.1 --- a/stage2/lcd.h Sat Jun 13 00:06:18 2015 +0200
33.2 +++ b/stage2/lcd.h Wed Feb 24 16:13:46 2016 +0100
33.3 @@ -5,4 +5,11 @@
33.4
33.5 void lcd_init(void);
33.6
33.7 +/* Output functions. */
33.8 +
33.9 +void test_pixel(unsigned short h, unsigned short v);
33.10 +void clear_pixel(unsigned short h, unsigned short v);
33.11 +
33.12 +void test_pattern();
33.13 +
33.14 #endif /* __LCD_H__ */
34.1 --- a/stage2/minipc_claa070vc01.c Sat Jun 13 00:06:18 2015 +0200
34.2 +++ b/stage2/minipc_claa070vc01.c Wed Feb 24 16:13:46 2016 +0100
34.3 @@ -2,7 +2,7 @@
34.4 * MiniPC screen details
34.5 *
34.6 * Copyright (C) 2005-2007, Ingenic Semiconductor Inc.
34.7 - * Copyright (C) 2015 Paul Boddie <paul@boddie.org.uk>
34.8 + * Copyright (C) 2015, 2016 Paul Boddie <paul@boddie.org.uk>
34.9 *
34.10 * This program is free software; you can redistribute it and/or
34.11 * modify it under the terms of the GNU General Public License as
34.12 @@ -26,9 +26,9 @@
34.13
34.14 struct jzfb_info jzfb = {
34.15 MODE_TFT_GEN | PCLK_N | HSYNC_N | VSYNC_N,
34.16 - 800, 480, 16, 60, 80, 20, 0, 0, 0, 0
34.17 + 800, 480, 32, 60, 80, 20, 0, 0, 0, 0
34.18 };
34.19
34.20 vidinfo_t panel_info = {
34.21 - 800, 480, LCD_BPP,
34.22 + 800, 480, LCD_COLOR32,
34.23 };
35.1 --- a/stage2/minipc_claa070vc01.h Sat Jun 13 00:06:18 2015 +0200
35.2 +++ b/stage2/minipc_claa070vc01.h Wed Feb 24 16:13:46 2016 +0100
35.3 @@ -2,7 +2,7 @@
35.4 * MiniPC panel-specific definitions
35.5 *
35.6 * Copyright (C) Xiangfu Liu <xiangfu@sharism.cc>
35.7 - * Copyright (C) 2015 Paul Boddie <paul@boddie.org.uk>
35.8 + * Copyright (C) 2015, 2016 Paul Boddie <paul@boddie.org.uk>
35.9 *
35.10 * This program is free software; you can redistribute it and/or
35.11 * modify it under the terms of the GNU General Public License as
35.12 @@ -23,36 +23,39 @@
35.13 #ifndef __MINIPC_CLAA070VC01_H__
35.14 #define __MINIPC_CLAA070VC01_H__
35.15
35.16 -#define __lcd_set_backlight_level(n) \
35.17 -do { \
35.18 - __gpio_as_pwm(); \
35.19 - REG_PWM_DUT(0) = n; \
35.20 - REG_PWM_PER(0) = 7; \
35.21 - REG_PWM_CTR(0) = 0xc1; \
35.22 -} while (0)
35.23 +#include "board.h"
35.24 +#include "minipc.h"
35.25
35.26 -#define __lcd_close_backlight() \
35.27 -do { \
35.28 -__gpio_as_output(GPIO_PWM0);\
35.29 -__gpio_clear_pin(GPIO_PWM0);\
35.30 -} while (0)
35.31 +static inline void __lcd_set_backlight_level(u16 n)
35.32 +{
35.33 + __gpio_as_pwm();
35.34 + REG_PWM_DUT(0) = n;
35.35 + REG_PWM_PER(0) = 7;
35.36 + REG_PWM_CTR(0) = 0xc1;
35.37 +}
35.38 +
35.39 +static inline void __lcd_close_backlight()
35.40 +{
35.41 + __gpio_as_output(GPIO_PWM0);
35.42 + __gpio_clear_pin(GPIO_PWM0);
35.43 +}
35.44
35.45 -#define __lcd_display_pin_init() \
35.46 -do { \
35.47 - __gpio_as_output(GPIO_DISP_OFF_N); \
35.48 - __lcd_set_backlight_level(8); \
35.49 -} while (0)
35.50 +static inline void __lcd_display_pin_init()
35.51 +{
35.52 + __gpio_as_output(GPIO_DISP_OFF_N);
35.53 + __lcd_set_backlight_level(8);
35.54 +}
35.55
35.56 -#define __lcd_display_on() \
35.57 -do { \
35.58 - __gpio_set_pin(GPIO_DISP_OFF_N); \
35.59 - __lcd_set_backlight_level(8); \
35.60 -} while (0)
35.61 +static inline void __lcd_display_on()
35.62 +{
35.63 + __gpio_set_pin(GPIO_DISP_OFF_N);
35.64 + __lcd_set_backlight_level(8);
35.65 +}
35.66
35.67 -#define __lcd_display_off() \
35.68 -do { \
35.69 - __lcd_close_backlight(); \
35.70 - __gpio_clear_pin(GPIO_DISP_OFF_N); \
35.71 -} while (0)
35.72 +static inline void __lcd_display_off()
35.73 +{
35.74 + __lcd_close_backlight();
35.75 + __gpio_clear_pin(GPIO_DISP_OFF_N);
35.76 +}
35.77
35.78 #endif /* __MINIPC_CLAA070VC01_H__ */
36.1 --- a/stage2/nanonote_gpm940b0.c Sat Jun 13 00:06:18 2015 +0200
36.2 +++ b/stage2/nanonote_gpm940b0.c Wed Feb 24 16:13:46 2016 +0100
36.3 @@ -2,7 +2,7 @@
36.4 * Ben NanoNote screen details
36.5 *
36.6 * Copyright (C) Xiangfu Liu <xiangfu@sharism.cc>
36.7 - * Copyright (C) 2015 Paul Boddie <paul@boddie.org.uk>
36.8 + * Copyright (C) 2015, 2016 Paul Boddie <paul@boddie.org.uk>
36.9 *
36.10 * This program is free software; you can redistribute it and/or
36.11 * modify it under the terms of the GNU General Public License as
36.12 @@ -30,5 +30,5 @@
36.13 };
36.14
36.15 vidinfo_t panel_info = {
36.16 - 320, 240, LCD_BPP,
36.17 + 320, 240, LCD_COLOR32,
36.18 };
37.1 --- a/stage2/nanonote_gpm940b0.h Sat Jun 13 00:06:18 2015 +0200
37.2 +++ b/stage2/nanonote_gpm940b0.h Wed Feb 24 16:13:46 2016 +0100
37.3 @@ -2,7 +2,7 @@
37.4 * Ben NanoNote panel-specific definitions
37.5 *
37.6 * Copyright (C) Xiangfu Liu <xiangfu@sharism.cc>
37.7 - * Copyright (C) 2015 Paul Boddie <paul@boddie.org.uk>
37.8 + * Copyright (C) 2015, 2016 Paul Boddie <paul@boddie.org.uk>
37.9 *
37.10 * This program is free software; you can redistribute it and/or
37.11 * modify it under the terms of the GNU General Public License as
37.12 @@ -23,50 +23,56 @@
37.13 #ifndef __NANONOTE_GPM940B0_H__
37.14 #define __NANONOTE_GPM940B0_H__
37.15
37.16 -#define __spi_write_reg1(reg, val) \
37.17 -do { \
37.18 - unsigned char no; \
37.19 - unsigned short value; \
37.20 - unsigned char a=reg; \
37.21 - unsigned char b=val; \
37.22 - __gpio_set_pin(SPEN); \
37.23 - __gpio_set_pin(SPCK); \
37.24 - __gpio_clear_pin(SPDA); \
37.25 - __gpio_clear_pin(SPEN); \
37.26 - value=((a<<8)|(b&0xFF)); \
37.27 - for(no=0;no<16;no++) \
37.28 - { \
37.29 - __gpio_clear_pin(SPCK); \
37.30 - if((value&0x8000)==0x8000) \
37.31 - __gpio_set_pin(SPDA); \
37.32 - else \
37.33 - __gpio_clear_pin(SPDA); \
37.34 - __gpio_set_pin(SPCK); \
37.35 - value=(value<<1); \
37.36 - } \
37.37 - __gpio_set_pin(SPEN); \
37.38 -} while (0)
37.39 +#include "board.h"
37.40 +#include "nanonote.h"
37.41 +
37.42 +static inline void __spi_write_reg1(u8 reg, u8 val)
37.43 +{
37.44 + u8 no, a=reg, b=val;
37.45 + u16 value;
37.46 +
37.47 + __gpio_set_pin(SPEN);
37.48 + __gpio_set_pin(SPCK);
37.49 + __gpio_clear_pin(SPDA);
37.50 + __gpio_clear_pin(SPEN);
37.51 +
37.52 + value = ((a << 8) | (b & 0xFF));
37.53 +
37.54 + for (no=0; no<16; no++)
37.55 + {
37.56 + __gpio_clear_pin(SPCK);
37.57 +
37.58 + if ((value & 0x8000) == 0x8000)
37.59 + __gpio_set_pin(SPDA);
37.60 + else
37.61 + __gpio_clear_pin(SPDA);
37.62
37.63 -#define __lcd_display_pin_init() \
37.64 -do { \
37.65 - __cpm_start_tcu(); \
37.66 - __gpio_as_output(SPEN); \
37.67 - __gpio_as_output(SPCK); \
37.68 - __gpio_as_output(SPDA); \
37.69 -} while (0)
37.70 + __gpio_set_pin(SPCK);
37.71 + value = (value << 1);
37.72 + }
37.73 + __gpio_set_pin(SPEN);
37.74 +}
37.75 +
37.76 +static inline void __lcd_display_pin_init()
37.77 +{
37.78 + __cpm_start_tcu();
37.79 + __gpio_as_output(SPEN);
37.80 + __gpio_as_output(SPCK);
37.81 + __gpio_as_output(SPDA);
37.82 +}
37.83
37.84 -#define __lcd_display_on() \
37.85 -do { \
37.86 - __spi_write_reg1(0x05, 0x1e); \
37.87 - __spi_write_reg1(0x05, 0x5e); \
37.88 - __spi_write_reg1(0x07, 0x8d); \
37.89 - __spi_write_reg1(0x13, 0x01); \
37.90 - __spi_write_reg1(0x05, 0x5f); \
37.91 -} while (0)
37.92 +static inline void __lcd_display_on()
37.93 +{
37.94 + __spi_write_reg1(0x05, 0x1e);
37.95 + __spi_write_reg1(0x05, 0x5e);
37.96 + __spi_write_reg1(0x07, 0x8d);
37.97 + __spi_write_reg1(0x13, 0x01);
37.98 + __spi_write_reg1(0x05, 0x5f);
37.99 +}
37.100
37.101 -#define __lcd_display_off() \
37.102 -do { \
37.103 - __spi_write_reg1(0x05, 0x5e); \
37.104 -} while (0)
37.105 +static inline void __lcd_display_off()
37.106 +{
37.107 + __spi_write_reg1(0x05, 0x5e);
37.108 +}
37.109
37.110 #endif /* __NANONOTE_GPM940B0_H__ */
38.1 --- a/stage2/stage2.c Sat Jun 13 00:06:18 2015 +0200
38.2 +++ b/stage2/stage2.c Wed Feb 24 16:13:46 2016 +0100
38.3 @@ -2,71 +2,51 @@
38.4 * Ben NanoNote stage 2 payload test.
38.5 *
38.6 * Copyright (C) Wolfgang Spraul <wolfgang@sharism.cc>
38.7 - * Copyright (C) 2015 Paul Boddie <paul@boddie.org.uk>
38.8 + * Copyright (C) 2015, 2016 Paul Boddie <paul@boddie.org.uk>
38.9 *
38.10 - * This program is free software; you can redistribute it and/or modify it under
38.11 - * the terms of the GNU General Public License as published by the Free Software
38.12 - * Foundation; either version 3 of the License, or (at your option) any later
38.13 - * version.
38.14 + * This program is free software: you can redistribute it and/or modify
38.15 + * it under the terms of the GNU General Public License as published by
38.16 + * the Free Software Foundation, either version 3 of the License, or
38.17 + * (at your option) any later version.
38.18 *
38.19 - * This program is distributed in the hope that it will be useful, but WITHOUT
38.20 - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
38.21 - * FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
38.22 - * details.
38.23 + * This program is distributed in the hope that it will be useful,
38.24 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
38.25 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
38.26 + * GNU General Public License for more details.
38.27 *
38.28 - * You should have received a copy of the GNU General Public License along with
38.29 - * this program. If not, see <http://www.gnu.org/licenses/>.
38.30 + * You should have received a copy of the GNU General Public License
38.31 + * along with this program. If not, see <http://www.gnu.org/licenses/>.
38.32 */
38.33
38.34 -#ifdef CONFIG_CPU_JZ4730_MINIPC
38.35 -#include "board-minipc.h"
38.36 -#else
38.37 -#include "board-nanonote.h"
38.38 -#endif
38.39 +#include "board-specific.h"
38.40
38.41 +#include "irq.h"
38.42 #include "lcd.h"
38.43 +#include "cpu.h"
38.44
38.45 void c_main(void)
38.46 {
38.47 - /* Relocate object locations. */
38.48 -
38.49 - volatile unsigned int start_addr, got_start, got_end, addr, offset;
38.50 volatile int started;
38.51
38.52 - /* get absolute start address */
38.53 - __asm__ __volatile__(
38.54 - "move %0, $20\n\t"
38.55 - : "=r"(start_addr)
38.56 - :
38.57 - );
38.58 -
38.59 - /* get related GOT address */
38.60 - __asm__ __volatile__(
38.61 - "la $4, _GLOBAL_OFFSET_TABLE_\n\t"
38.62 - "move %0, $4\n\t"
38.63 - "la $5, _got_end\n\t"
38.64 - "move %1, $5\n\t"
38.65 - : "=r"(got_start),"=r"(got_end)
38.66 - :
38.67 - );
38.68 -
38.69 - /* calculate offset and correct GOT*/
38.70 - offset = start_addr - 0x80000000;
38.71 - got_start += offset;
38.72 - got_end += offset;
38.73 -
38.74 - for ( addr = got_start + 8; addr < got_end; addr += 4 )
38.75 - *((volatile unsigned int *)(addr)) += offset; // add offset to correct all GOT
38.76 + init_tlb();
38.77 + flush_cache_all();
38.78
38.79 /* The actual work. */
38.80
38.81 started = is_started();
38.82 - if (!started) {
38.83 +
38.84 + if (!started)
38.85 + {
38.86 gpio_init2();
38.87 cpm_init();
38.88 rtc_init();
38.89 timer_init();
38.90 }
38.91 +
38.92 lcd_init();
38.93 - while (1);
38.94 + irq_init();
38.95 +
38.96 + start_task();
38.97 +
38.98 + while (1) asm volatile("wait");
38.99 }
39.1 --- a/stage2/stage2.ld Sat Jun 13 00:06:18 2015 +0200
39.2 +++ b/stage2/stage2.ld Wed Feb 24 16:13:46 2016 +0100
39.3 @@ -1,32 +1,31 @@
39.4 OUTPUT_ARCH(mips)
39.5 ENTRY(_start)
39.6 -MEMORY
39.7 -{
39.8 - ram : ORIGIN = 0x80000000 , LENGTH = 3M
39.9 -}
39.10
39.11 SECTIONS
39.12 {
39.13 - . = ALIGN(4);
39.14 - .text : { *(.text*) } > ram
39.15 + /* Program memory section. */
39.16 +
39.17 + . = 0x81c00000;
39.18 + .text2 : { *(.text*) }
39.19
39.20 . = ALIGN(4);
39.21 - .rodata : { *(.rodata*) } > ram
39.22 + .rodata : { *(.rodata*) }
39.23
39.24 . = ALIGN(4);
39.25 - .sdata : { *(.sdata*) } > ram
39.26 + .sdata : { *(.sdata*) }
39.27
39.28 . = ALIGN(4);
39.29 - .data : { *(.data*) *(.scommon*) *(.reginfo*) } > ram
39.30 + .data : { *(.data*) *(.scommon*) *(.reginfo*) }
39.31
39.32 _gp = ALIGN(16);
39.33
39.34 - .got : { *(.got*) } > ram
39.35 + _got_start = ABSOLUTE(.);
39.36 + .got : { *(.got*) }
39.37 _got_end = ABSOLUTE(.);
39.38
39.39 . = ALIGN(4);
39.40 - .sbss : { *(.sbss*) } > ram
39.41 - .bss : { *(.bss*) } > ram
39.42 + .sbss : { *(.sbss*) }
39.43 + .bss : { *(.bss*) }
39.44 . = ALIGN (4);
39.45 }
39.46