1.1 --- a/stage2/jzlcd.c Sun Jul 09 18:31:15 2017 +0200
1.2 +++ b/stage2/jzlcd.c Sun Jul 09 19:04:49 2017 +0200
1.3 @@ -23,8 +23,7 @@
1.4 #include "sdram.h"
1.5 #include "jzlcd.h"
1.6 #include "board.h"
1.7 -
1.8 -extern vidinfo_t panel_info;
1.9 +#include "xburst_types.h" /* for REG32 */
1.10
1.11 /* Useful alignment operations. */
1.12
1.13 @@ -564,34 +563,27 @@
1.14
1.15 /* Set the colour depth. */
1.16
1.17 -void lcd_set_bpp(uint8_t bpp)
1.18 +void jz4740_lcd_set_bpp(uint8_t bpp, vidinfo_t *vid)
1.19 {
1.20 - vidinfo_t *vid = &panel_info;
1.21 vid->jz_fb->bpp = bpp;
1.22 }
1.23
1.24 -void lcd_enable()
1.25 +void jz4740_lcd_enable(vidinfo_t *vid)
1.26 {
1.27 - vidinfo_t *vid = &panel_info;
1.28 -
1.29 /* Clear the disable bit (DIS) and set the enable bit (ENA). */
1.30
1.31 lcd_ctrl_set(vid, LCD_CTRL, (lcd_ctrl_get(vid, LCD_CTRL) & ~LCD_CTRL_DIS) | LCD_CTRL_ENA);
1.32 }
1.33
1.34 -void lcd_disable()
1.35 +void jz4740_lcd_disable(vidinfo_t *vid)
1.36 {
1.37 - vidinfo_t *vid = &panel_info;
1.38 -
1.39 /* Set the disable bit (DIS). */
1.40
1.41 lcd_ctrl_set(vid, LCD_CTRL, lcd_ctrl_get(vid, LCD_CTRL) | LCD_CTRL_DIS);
1.42 }
1.43
1.44 -void lcd_quick_disable()
1.45 +void jz4740_lcd_quick_disable(vidinfo_t *vid)
1.46 {
1.47 - vidinfo_t *vid = &panel_info;
1.48 -
1.49 /* Clear the enable bit (ENA) for quick disable. */
1.50
1.51 lcd_ctrl_set(vid, LCD_CTRL, lcd_ctrl_get(vid, LCD_CTRL) & ~LCD_CTRL_ENA);
2.1 --- a/stage2/jzlcd.h Sun Jul 09 18:31:15 2017 +0200
2.2 +++ b/stage2/jzlcd.h Sun Jul 09 19:04:49 2017 +0200
2.3 @@ -1,8 +1,10 @@
2.4 /*
2.5 - * U-Boot and JzRISC LCD controller definitions
2.6 + * U-Boot and jz4740 LCD controller definitions.
2.7 *
2.8 * Copyright (C) 2001 Wolfgang Denk, DENX Software Engineering, wd@denx.de.
2.9 * Copyright (C) 2005-2007, Ingenic Semiconductor Inc.
2.10 + * Copyright (C) 2009 Qi Hardware Inc.
2.11 + * Author: Xiangfu Liu <xiangfu@sharism.cc>
2.12 * Copyright (C) Xiangfu Liu <xiangfu@sharism.cc>
2.13 * Copyright (C) 2015, 2016, 2017 Paul Boddie <paul@boddie.org.uk>
2.14 *
2.15 @@ -67,6 +69,8 @@
2.16 struct jz_fb_dma_descriptor *dmadesc_fb1;
2.17 struct jz_fb_dma_descriptor *dmadesc_palette;
2.18
2.19 + /* Region addresses. */
2.20 +
2.21 uint32_t screen; /* address of first frame buffer (base of memory used) */
2.22 uint32_t palette; /* address of palette memory */
2.23 uint32_t total; /* total memory used */
2.24 @@ -80,6 +84,8 @@
2.25 void *lcd; /* address of LCD controller registers */
2.26 } vidinfo_t;
2.27
2.28 +
2.29 +
2.30 /* Public functions. */
2.31
2.32 uint32_t jz4740_lcd_get_total_size(vidinfo_t *vid);
2.33 @@ -87,17 +93,19 @@
2.34 void jz4740_lcd_ctrl_init(void *lcd_base, void *fb_vaddr, vidinfo_t *vid);
2.35 void jz4740_lcd_hw_init(vidinfo_t *vid);
2.36 void jz4740_lcd_dma_init(vidinfo_t *vid);
2.37 -void lcd_set_bpp(uint8_t bpp);
2.38 -uint32_t lcd_ctrl_init();
2.39 -void lcd_enable();
2.40 -void lcd_disable();
2.41 +void jz4740_lcd_set_bpp(uint8_t bpp, vidinfo_t *vid);
2.42 +void jz4740_lcd_enable(vidinfo_t *vid);
2.43 +void jz4740_lcd_disable(vidinfo_t *vid);
2.44 +void jz4740_lcd_quick_disable(vidinfo_t *vid);
2.45 +
2.46 +
2.47
2.48 /* Alignment/rounding macros. */
2.49
2.50 #define ALIGN(x,a) __ALIGN_MASK((x),(typeof(x))(a)-1)
2.51 #define __ALIGN_MASK(x,mask) (((x)+(mask))&~(mask))
2.52
2.53 -/* Transfer and display types. */
2.54 +/* Display device mode select (LCD_CFG.MODE). */
2.55
2.56 #define MODE_MASK 0x0f
2.57 #define MODE_TFT_GEN 0x00
2.58 @@ -112,40 +120,54 @@
2.59 #define MODE_STN_MONO_DUAL 0x0b
2.60 #define MODE_8BIT_SERIAL_TFT 0x0c
2.61
2.62 +/* 16-bit or 18-bit TFT panel selection (LCD_CFG.18/16). */
2.63 +
2.64 #define MODE_TFT_18BIT (1<<7)
2.65
2.66 -#define STN_DAT_PIN1 (0x00 << 4)
2.67 -#define STN_DAT_PIN2 (0x01 << 4)
2.68 -#define STN_DAT_PIN4 (0x02 << 4)
2.69 -#define STN_DAT_PIN8 (0x03 << 4)
2.70 -#define STN_DAT_PINMASK STN_DAT_PIN8
2.71 +/* STN pin utilisation (LCD_CFG.PDW). */
2.72 +
2.73 +#define STN_DAT_PIN1 (0x00 << 4)
2.74 +#define STN_DAT_PIN2 (0x01 << 4)
2.75 +#define STN_DAT_PIN4 (0x02 << 4)
2.76 +#define STN_DAT_PIN8 (0x03 << 4)
2.77 +#define STN_DAT_PINMASK STN_DAT_PIN8
2.78 +
2.79 +/* Pin reset states (LCD_CFG). */
2.80
2.81 -#define STFT_PSHI (1 << 15)
2.82 -#define STFT_CLSHI (1 << 14)
2.83 -#define STFT_SPLHI (1 << 13)
2.84 -#define STFT_REVHI (1 << 12)
2.85 +#define STFT_PSHI (1 << 15)
2.86 +#define STFT_CLSHI (1 << 14)
2.87 +#define STFT_SPLHI (1 << 13)
2.88 +#define STFT_REVHI (1 << 12)
2.89
2.90 -#define SYNC_MASTER (0 << 16)
2.91 -#define SYNC_SLAVE (1 << 16)
2.92 +/* Sync direction (LCD_CFG.SYNDIR). */
2.93 +
2.94 +#define SYNC_MASTER (0 << 16)
2.95 +#define SYNC_SLAVE (1 << 16)
2.96 +
2.97 +/* Data enable polarity (LCD_CFG.DEP). */
2.98
2.99 -#define DE_P (0 << 9)
2.100 -#define DE_N (1 << 9)
2.101 +#define DE_P (0 << 9)
2.102 +#define DE_N (1 << 9)
2.103 +
2.104 +/* Pixel clock polarity (LCD_CFG.PCP). */
2.105
2.106 -#define PCLK_P (0 << 10)
2.107 -#define PCLK_N (1 << 10)
2.108 +#define PCLK_P (0 << 10)
2.109 +#define PCLK_N (1 << 10)
2.110
2.111 -#define HSYNC_P (0 << 11)
2.112 -#define HSYNC_N (1 << 11)
2.113 +/* Horizontal sync polarity (LCD_CFG.HSP). */
2.114
2.115 -#define VSYNC_P (0 << 8)
2.116 -#define VSYNC_N (1 << 8)
2.117 +#define HSYNC_P (0 << 11)
2.118 +#define HSYNC_N (1 << 11)
2.119 +
2.120 +/* Vertical sync polarity (LCD_CFG.VSP). */
2.121
2.122 -#define DATA_NORMAL (0 << 17)
2.123 -#define DATA_INVERSE (1 << 17)
2.124 +#define VSYNC_P (0 << 8)
2.125 +#define VSYNC_N (1 << 8)
2.126
2.127 -/* LCD register base. */
2.128 +/* Inverse output data (LCD_CFG.INVDAT). */
2.129
2.130 -#define LCD_BASE_KSEG1 0xB3050000
2.131 +#define DATA_NORMAL (0 << 17)
2.132 +#define DATA_INVERSE (1 << 17)
2.133
2.134 /* Register offsets. */
2.135
3.1 --- a/stage2/lcd.c Sun Jul 09 18:31:15 2017 +0200
3.2 +++ b/stage2/lcd.c Sun Jul 09 19:04:49 2017 +0200
3.3 @@ -20,6 +20,7 @@
3.4
3.5 #include "board-display.h"
3.6
3.7 +#include "lcd.h"
3.8 #include "jzlcd.h"
3.9 #include "sdram.h"
3.10 #include "cpu.h"
3.11 @@ -333,6 +334,36 @@
3.12 udelay(1000);
3.13 }
3.14
3.15 +static void lcd_display_pin_init()
3.16 +{
3.17 + __lcd_display_pin_init();
3.18 +}
3.19 +
3.20 +static void lcd_display_on()
3.21 +{
3.22 + __lcd_display_on();
3.23 +}
3.24 +
3.25 +static void lcd_set_bpp(uint8_t bpp)
3.26 +{
3.27 + jz4740_lcd_set_bpp(bpp, &panel_info);
3.28 +}
3.29 +
3.30 +static void lcd_enable()
3.31 +{
3.32 + jz4740_lcd_enable(&panel_info);
3.33 +}
3.34 +
3.35 +static void lcd_disable()
3.36 +{
3.37 + jz4740_lcd_disable(&panel_info);
3.38 +}
3.39 +
3.40 +static void lcd_quick_disable()
3.41 +{
3.42 + jz4740_lcd_quick_disable(&panel_info);
3.43 +}
3.44 +
3.45 uint32_t lcd_ctrl_init()
3.46 {
3.47 vidinfo_t *vid = &panel_info;
3.48 @@ -354,8 +385,8 @@
3.49
3.50 void lcd_init()
3.51 {
3.52 - __lcd_display_pin_init();
3.53 - __lcd_display_on();
3.54 + lcd_display_pin_init();
3.55 + lcd_display_on();
3.56
3.57 /* Initialise the member here since the address is otherwise invalid. */
3.58
4.1 --- a/stage2/lcd.h Sun Jul 09 18:31:15 2017 +0200
4.2 +++ b/stage2/lcd.h Sun Jul 09 19:04:49 2017 +0200
4.3 @@ -3,6 +3,8 @@
4.4
4.5 #include <stdint.h>
4.6
4.7 +#define LCD_BASE_KSEG1 0xB3050000
4.8 +
4.9 /* Initialisation functions. */
4.10
4.11 void lcd_init();