1.1 --- a/stage2/cpu.c Tue Apr 26 17:11:47 2016 +0200
1.2 +++ b/stage2/cpu.c Tue Apr 26 17:18:12 2016 +0200
1.3 @@ -152,16 +152,6 @@
1.4 );
1.5 }
1.6
1.7 -void enter_user_mode(void)
1.8 -{
1.9 - asm volatile(
1.10 - "mfc0 $t3, $12\n" /* CP0_STATUS */
1.11 - "li $t4, 0x00000010\n" /* KSU = 2 (UM = 1) */
1.12 - "or $t3, $t3, $t4\n"
1.13 - "mtc0 $t3, $12\n"
1.14 - "nop\n");
1.15 -}
1.16 -
1.17 void init_tlb(void)
1.18 {
1.19 unsigned short first_random = 0, i, limit;
2.1 --- a/stage2/cpu.h Tue Apr 26 17:11:47 2016 +0200
2.2 +++ b/stage2/cpu.h Tue Apr 26 17:18:12 2016 +0200
2.3 @@ -5,7 +5,6 @@
2.4
2.5 void flush_cache_all();
2.6 void handle_error_level();
2.7 -void enter_user_mode();
2.8 void init_registers(u32 *, u32, void (*)(), u32[], u8);
2.9 void invoke_task(u8, u32 *, u32 *);
2.10 void enable_interrupts();