1.1 --- a/stage2/Makefile Sun Oct 02 22:38:07 2016 +0200
1.2 +++ b/stage2/Makefile Mon Oct 03 00:39:16 2016 +0200
1.3 @@ -60,7 +60,7 @@
1.4
1.5 # Configure generic objects.
1.6
1.7 -CORE_SRC = stage2.c cpu.c lcd.c jzlcd.c board.c irq.c paging.c tasks.c
1.8 +CORE_SRC = stage2.c cpu.c lcd.c jzlcd.c board.c irq.c paging.c tasks.c task_gpio.c
1.9 CORE_OBJ = $(CORE_SRC:.c=.o)
1.10
1.11 # Add tasks.
2.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
2.2 +++ b/stage2/task_gpio.c Mon Oct 03 00:39:16 2016 +0200
2.3 @@ -0,0 +1,50 @@
2.4 +/*
2.5 + * GPIO access for tasks.
2.6 + *
2.7 + * Copyright (C) 2016 Paul Boddie <paul@boddie.org.uk>
2.8 + *
2.9 + * This program is free software: you can redistribute it and/or modify
2.10 + * it under the terms of the GNU General Public License as published by
2.11 + * the Free Software Foundation, either version 3 of the License, or
2.12 + * (at your option) any later version.
2.13 + *
2.14 + * This program is distributed in the hope that it will be useful,
2.15 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
2.16 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2.17 + * GNU General Public License for more details.
2.18 + *
2.19 + * You should have received a copy of the GNU General Public License
2.20 + * along with this program. If not, see <http://www.gnu.org/licenses/>.
2.21 + */
2.22 +
2.23 +#include "board.h"
2.24 +#include "mips.h"
2.25 +#include "cpu.h"
2.26 +#include "paging.h"
2.27 +#include "memory.h"
2.28 +#include "task_gpio.h"
2.29 +
2.30 +void task_gpio_init(unsigned short task)
2.31 +{
2.32 + /* Map the I/O region to the task. */
2.33 +
2.34 + init_page_table(STAGE2_PAGE_TABLE,
2.35 + TASK_GPIO_BASE,
2.36 + GPIO_BASE,
2.37 + page_size(GPIO_REGION_SIZE), TLB_WRITE, task);
2.38 +}
2.39 +
2.40 +inline void task_gpio_set_pin(unsigned short pin)
2.41 +{
2.42 + TASK_REG_GPIO_PXDATS(pin / 32) = (1 << (pin % 32));
2.43 +}
2.44 +
2.45 +inline void task_gpio_clear_pin(unsigned short pin)
2.46 +{
2.47 + TASK_REG_GPIO_PXDATS(pin / 32) = (1 << (pin % 32));
2.48 +}
2.49 +
2.50 +inline int task_gpio_get_pin(unsigned short pin)
2.51 +{
2.52 + return TASK_REG_GPIO_PXPIN(pin / 32) & (1 << (pin % 32));
2.53 +}
3.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
3.2 +++ b/stage2/task_gpio.h Mon Oct 03 00:39:16 2016 +0200
3.3 @@ -0,0 +1,24 @@
3.4 +#ifndef __TASK_GPIO_H__
3.5 +#define __TASK_GPIO_H__
3.6 +
3.7 +#include "memory.h"
3.8 +#include "xburst_types.h"
3.9 +
3.10 +/* Special task versions of GPIO operations. */
3.11 +
3.12 +#define TASK_GPIO_PXPIN(n) (TASK_GPIO_BASE + (0x00 + (n)*0x100)) /* PIN Level Register */
3.13 +#define TASK_GPIO_PXDAT(n) (TASK_GPIO_BASE + (0x10 + (n)*0x100)) /* Port Data Register */
3.14 +#define TASK_GPIO_PXDATS(n) (TASK_GPIO_BASE + (0x14 + (n)*0x100)) /* Port Data Set Register */
3.15 +#define TASK_GPIO_PXDATC(n) (TASK_GPIO_BASE + (0x18 + (n)*0x100)) /* Port Data Clear Register */
3.16 +
3.17 +#define TASK_REG_GPIO_PXPIN(n) REG32(TASK_GPIO_PXPIN((n))) /* PIN level */
3.18 +#define TASK_REG_GPIO_PXDAT(n) REG32(TASK_GPIO_PXDAT((n))) /* 1: interrupt pending */
3.19 +#define TASK_REG_GPIO_PXDATS(n) REG32(TASK_GPIO_PXDATS((n)))
3.20 +#define TASK_REG_GPIO_PXDATC(n) REG32(TASK_GPIO_PXDATC((n)))
3.21 +
3.22 +void task_gpio_init(unsigned short task);
3.23 +void task_gpio_set_pin(unsigned short pin);
3.24 +void task_gpio_clear_pin(unsigned short pin);
3.25 +int task_gpio_get_pin(unsigned short pin);
3.26 +
3.27 +#endif /* __TASK_GPIO_H__ */