1.1 --- a/stage2/Makefile Tue Jun 23 23:05:00 2015 +0200
1.2 +++ b/stage2/Makefile Tue Jun 23 23:08:19 2015 +0200
1.3 @@ -30,7 +30,7 @@
1.4
1.5 CFLAGS = -O2 -Wall \
1.6 -fno-unit-at-a-time -fno-zero-initialized-in-bss \
1.7 - -ffreestanding -fno-hosted -fno-builtin \
1.8 + -ffreestanding -fno-hosted -fno-builtin -fno-pic \
1.9 -march=mips32 \
1.10 -I../include
1.11 LDFLAGS = -nostdlib -EL
1.12 @@ -62,8 +62,8 @@
1.13
1.14 # Ordering of objects is important and cannot be left to replacement rules.
1.15
1.16 -SRC = head2.S stage2.c cpu.c lcd.c jzlcd.c board.c $(BOARD_SRC)
1.17 -OBJ = head2.o stage2.o cpu.o lcd.o jzlcd.o board.o $(BOARD_OBJ)
1.18 +SRC = head2.S entry.S handlers.S stage2.c cpu.c lcd.c jzlcd.c board.c irq.c $(BOARD_SRC)
1.19 +OBJ = head2.o entry.o handlers.o stage2.o cpu.o lcd.o jzlcd.o board.o irq.o $(BOARD_OBJ)
1.20
1.21 .PHONY: all clean distclean
1.22
2.1 --- a/stage2/board-minipc.c Tue Jun 23 23:05:00 2015 +0200
2.2 +++ b/stage2/board-minipc.c Tue Jun 23 23:08:19 2015 +0200
2.3 @@ -62,7 +62,7 @@
2.4 unsigned long lastdec;
2.5
2.6 /*
2.7 - * timer without interrupts
2.8 + * Timer without interrupts.
2.9 */
2.10
2.11 int timer_init(void)
2.12 @@ -72,12 +72,25 @@
2.13 __ost_set_count(TIMER_CHAN, TIMER_FDATA);
2.14 __ost_enable_channel(TIMER_CHAN);
2.15
2.16 + __cpm_start_ost();
2.17 +
2.18 lastdec = TIMER_FDATA;
2.19 timestamp = 0;
2.20
2.21 return 0;
2.22 }
2.23
2.24 +/* Timer interrupt activation. */
2.25 +
2.26 +void timer_init_irq(void)
2.27 +{
2.28 + __ost_enable_interrupt(TIMER_CHAN);
2.29 + /* NOTE: Need flag clearing? */
2.30 + __intc_unmask_irq(TIMER_CHAN_IRQ);
2.31 +}
2.32 +
2.33 +/* Board startup detection. */
2.34 +
2.35 int is_started(void)
2.36 {
2.37 return REG_CPM_MSCR != 0;
3.1 --- a/stage2/board-nanonote.c Tue Jun 23 23:05:00 2015 +0200
3.2 +++ b/stage2/board-nanonote.c Tue Jun 23 23:08:19 2015 +0200
3.3 @@ -112,11 +112,12 @@
3.4 unsigned long lastdec;
3.5
3.6 /*
3.7 - * timer without interrupts
3.8 + * Timer without interrupts.
3.9 */
3.10
3.11 void timer_init(void)
3.12 {
3.13 + __tcu_disable_pwm_output(TIMER_CHAN);
3.14 __tcu_select_extalclk(TIMER_CHAN);
3.15 __tcu_select_clk_div256(TIMER_CHAN);
3.16 __tcu_set_count(TIMER_CHAN, 0);
3.17 @@ -128,10 +129,23 @@
3.18 __tcu_start_timer_clock(TIMER_CHAN);
3.19 __tcu_start_counter(TIMER_CHAN);
3.20
3.21 + __cpm_start_tcu();
3.22 +
3.23 lastdec = 0;
3.24 timestamp = 0;
3.25 }
3.26
3.27 +/* Timer interrupt activation. */
3.28 +
3.29 +void timer_init_irq(void)
3.30 +{
3.31 + __tcu_unmask_full_match_irq(TIMER_CHAN);
3.32 + __tcu_clear_full_match_flag(TIMER_CHAN);
3.33 + __intc_unmask_irq(TIMER_CHAN_IRQ);
3.34 +}
3.35 +
3.36 +/* Board startup detection. */
3.37 +
3.38 int is_started(void)
3.39 {
3.40 return REG_CPM_CLKGR != 0;
4.1 --- a/stage2/board-specific.h Tue Jun 23 23:05:00 2015 +0200
4.2 +++ b/stage2/board-specific.h Tue Jun 23 23:08:19 2015 +0200
4.3 @@ -7,6 +7,7 @@
4.4 void cpm_init(void);
4.5 void rtc_init(void);
4.6 void timer_init(void);
4.7 +void timer_init_irq(void);
4.8 int is_started(void);
4.9
4.10 #endif /* __BOARD_SPECIFIC_H__ */
5.1 --- a/stage2/board.h Tue Jun 23 23:05:00 2015 +0200
5.2 +++ b/stage2/board.h Tue Jun 23 23:08:19 2015 +0200
5.3 @@ -6,17 +6,18 @@
5.4 void udelay(unsigned long usec);
5.5 unsigned long get_memory_size(void);
5.6
5.7 +#define TIMER_HZ CONFIG_SYS_HZ
5.8 +#define TIMER_CHAN 0
5.9 +#define TIMER_FDATA 0xffff /* timer full data value, limited to 16 bits */
5.10 +
5.11 #ifdef CONFIG_CPU_JZ4730
5.12 #include "jz4730.h"
5.13 -#define READ_TIMER __ost_get_count(TIMER_CHAN) /* macro to read the 32 bit timer */
5.14 -#define TIMER_FDATA 0xffffffff /* timer full data value */
5.15 +#define READ_TIMER __ost_get_count(TIMER_CHAN) /* macro to read the 32 bit timer */
5.16 +#define TIMER_CHAN_IRQ IRQ_OST0
5.17 #else
5.18 #include "jz4740.h"
5.19 -#define READ_TIMER REG_TCU_TCNT(TIMER_CHAN) /* macro to read the 16 bit timer */
5.20 -#define TIMER_FDATA 0xffff /* timer full data value */
5.21 +#define READ_TIMER REG_TCU_TCNT(TIMER_CHAN) /* macro to read the 16 bit timer */
5.22 +#define TIMER_CHAN_IRQ IRQ_TCU0
5.23 #endif
5.24
5.25 -#define TIMER_HZ CONFIG_SYS_HZ
5.26 -#define TIMER_CHAN 0
5.27 -
5.28 #endif /* __BOARD_H__ */
6.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
6.2 +++ b/stage2/entry.S Tue Jun 23 23:08:19 2015 +0200
6.3 @@ -0,0 +1,48 @@
6.4 +/*
6.5 + * Interrupt handling support.
6.6 + *
6.7 + * Copyright (C) 2015 Paul Boddie <paul@boddie.org.uk>
6.8 + *
6.9 + * This program is free software: you can redistribute it and/or modify
6.10 + * it under the terms of the GNU General Public License as published by
6.11 + * the Free Software Foundation, either version 3 of the License, or
6.12 + * (at your option) any later version.
6.13 + *
6.14 + * This program is distributed in the hope that it will be useful,
6.15 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
6.16 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
6.17 + * GNU General Public License for more details.
6.18 + *
6.19 + * You should have received a copy of the GNU General Public License
6.20 + * along with this program. If not, see <http://www.gnu.org/licenses/>.
6.21 + */
6.22 +
6.23 +.text
6.24 +.extern real_exception_handler
6.25 +.globl _tlb_entry
6.26 +.globl _exc_entry
6.27 +.globl _irq_entry
6.28 +.globl _end_entries
6.29 +.set noreorder
6.30 +
6.31 +_tlb_entry:
6.32 + lui $k0, %hi(real_exception_handler)
6.33 + ori $k0, $k0, %lo(real_exception_handler)
6.34 + jr $k0
6.35 + nop
6.36 +
6.37 +_exc_entry:
6.38 + lui $k0, %hi(real_exception_handler)
6.39 + ori $k0, $k0, %lo(real_exception_handler)
6.40 + jr $k0
6.41 + nop
6.42 +
6.43 +_irq_entry:
6.44 + lui $k0, %hi(real_exception_handler)
6.45 + ori $k0, $k0, %lo(real_exception_handler)
6.46 + jr $k0
6.47 + nop
6.48 +
6.49 +_end_entries:
6.50 +
6.51 +.set reorder
7.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
7.2 +++ b/stage2/handlers.S Tue Jun 23 23:08:19 2015 +0200
7.3 @@ -0,0 +1,168 @@
7.4 +/*
7.5 + * Handler routines.
7.6 + *
7.7 + * Copyright (C) 2008 by Maurus Cuelenaere
7.8 + * Copyright (C) 2015 Paul Boddie <paul@boddie.org.uk>
7.9 + *
7.10 + * This program is free software: you can redistribute it and/or modify
7.11 + * it under the terms of the GNU General Public License as published by
7.12 + * the Free Software Foundation, either version 3 of the License, or
7.13 + * (at your option) any later version.
7.14 + *
7.15 + * This program is distributed in the hope that it will be useful,
7.16 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
7.17 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
7.18 + * GNU General Public License for more details.
7.19 + *
7.20 + * You should have received a copy of the GNU General Public License
7.21 + * along with this program. If not, see <http://www.gnu.org/licenses/>.
7.22 + */
7.23 +
7.24 +.text
7.25 +.extern irq_handle
7.26 +.globl real_exception_handler
7.27 +.set noreorder
7.28 +.set noat
7.29 +
7.30 +#define C0_STATUS $12
7.31 +#define C0_CAUSE $13
7.32 +#define C0_EPC $14
7.33 +#define C0_CONFIG $16
7.34 +#define S_CauseExcCode 2
7.35 +#define M_CauseExcCode (0x1f << S_CauseExcCode)
7.36 +
7.37 +real_exception_handler:
7.38 + addiu $sp, -0x80
7.39 + sw $ra, 0($sp)
7.40 + sw $fp, 4($sp)
7.41 + sw $gp, 8($sp)
7.42 + sw $t9, 0xC($sp)
7.43 + sw $t8, 0x10($sp)
7.44 + sw $s7, 0x14($sp)
7.45 + sw $s6, 0x18($sp)
7.46 + sw $s5, 0x1C($sp)
7.47 + sw $s4, 0x20($sp)
7.48 + sw $s3, 0x24($sp)
7.49 + sw $s2, 0x28($sp)
7.50 + sw $s1, 0x2C($sp)
7.51 + sw $s0, 0x30($sp)
7.52 + sw $t7, 0x34($sp)
7.53 + sw $t6, 0x38($sp)
7.54 + sw $t5, 0x3C($sp)
7.55 + sw $t4, 0x40($sp)
7.56 + sw $t3, 0x44($sp)
7.57 + sw $t2, 0x48($sp)
7.58 + sw $t1, 0x4C($sp)
7.59 + sw $t0, 0x50($sp)
7.60 + sw $a3, 0x54($sp)
7.61 + sw $a2, 0x58($sp)
7.62 + sw $a1, 0x5C($sp)
7.63 + sw $a0, 0x60($sp)
7.64 + sw $v1, 0x64($sp)
7.65 + sw $v0, 0x68($sp)
7.66 + sw $1, 0x6C($sp)
7.67 + mflo $k0
7.68 + nop
7.69 + sw $k0, 0x70($sp)
7.70 + mfhi $k0
7.71 + nop
7.72 + sw $k0, 0x74($sp)
7.73 + mfc0 $k0, C0_STATUS
7.74 + sll $zero, 1
7.75 + sll $zero, 1
7.76 + sll $zero, 1
7.77 + sll $zero, 1
7.78 + sw $k0, 0x78($sp)
7.79 + mfc0 $k0, C0_EPC
7.80 + sll $zero, 1
7.81 + sll $zero, 1
7.82 + sll $zero, 1
7.83 + sll $zero, 1
7.84 + sw $k0, 0x7C($sp)
7.85 +
7.86 + li $k1, M_CauseExcCode
7.87 + mfc0 $k0, C0_CAUSE
7.88 + and $k0, $k1
7.89 + beq $zero, $k0, _int
7.90 + nop
7.91 + j _exception
7.92 + nop
7.93 +
7.94 +_int:
7.95 + /* Invoke the handler. */
7.96 +
7.97 + jal irq_handle
7.98 + nop
7.99 + j _exception_return
7.100 +
7.101 +_exception:
7.102 + move $a0, $sp
7.103 + mfc0 $a1, C0_CAUSE
7.104 + sll $zero, 1
7.105 + sll $zero, 1
7.106 + sll $zero, 1
7.107 + sll $zero, 1
7.108 + mfc0 $a2, C0_EPC
7.109 + sll $zero, 1
7.110 + sll $zero, 1
7.111 + sll $zero, 1
7.112 + sll $zero, 1
7.113 + /* jal exception_handler */
7.114 + j _exception_return
7.115 + nop
7.116 +
7.117 +_exception_return:
7.118 + lw $ra, 0($sp)
7.119 + lw $fp, 4($sp)
7.120 + lw $gp, 8($sp)
7.121 + lw $t9, 0xC($sp)
7.122 + lw $t8, 0x10($sp)
7.123 + lw $s7, 0x14($sp)
7.124 + lw $s6, 0x18($sp)
7.125 + lw $s5, 0x1C($sp)
7.126 + lw $s4, 0x20($sp)
7.127 + lw $s3, 0x24($sp)
7.128 + lw $s2, 0x28($sp)
7.129 + lw $s1, 0x2C($sp)
7.130 + lw $s0, 0x30($sp)
7.131 + lw $t7, 0x34($sp)
7.132 + lw $t6, 0x38($sp)
7.133 + lw $t5, 0x3C($sp)
7.134 + lw $t4, 0x40($sp)
7.135 + lw $t3, 0x44($sp)
7.136 + lw $t2, 0x48($sp)
7.137 + lw $t1, 0x4C($sp)
7.138 + lw $t0, 0x50($sp)
7.139 + lw $a3, 0x54($sp)
7.140 + lw $a2, 0x58($sp)
7.141 + lw $a1, 0x5C($sp)
7.142 + lw $a0, 0x60($sp)
7.143 + lw $v1, 0x64($sp)
7.144 + lw $v0, 0x68($sp)
7.145 + lw $1, 0x6C($sp)
7.146 + lw $k0, 0x70($sp)
7.147 + mtlo $k0
7.148 + nop
7.149 + lw $k0, 0x74($sp)
7.150 + mthi $k0
7.151 + nop
7.152 + lw $k0, 0x78($sp)
7.153 + mtc0 $k0, C0_STATUS
7.154 + nop
7.155 + sll $zero, 1
7.156 + sll $zero, 1
7.157 + sll $zero, 1
7.158 + sll $zero, 1
7.159 + lw $k0, 0x7C($sp)
7.160 + mtc0 $k0, C0_EPC
7.161 + nop
7.162 + sll $zero, 1
7.163 + sll $zero, 1
7.164 + sll $zero, 1
7.165 + sll $zero, 1
7.166 + addiu $sp, 0x80
7.167 + eret
7.168 + nop
7.169 +
7.170 +.set reorder
7.171 +.set at
8.1 --- a/stage2/head2.S Tue Jun 23 23:05:00 2015 +0200
8.2 +++ b/stage2/head2.S Tue Jun 23 23:08:19 2015 +0200
8.3 @@ -20,13 +20,81 @@
8.4 * along with this program. If not, see <http://www.gnu.org/licenses/>.
8.5 */
8.6
8.7 - .text
8.8 - .extern c_main
8.9 -
8.10 - .globl _start
8.11 - .set noreorder
8.12 +.text
8.13 +.extern c_main
8.14 +.extern _tlb_entry
8.15 +.extern _exc_entry
8.16 +.extern _irq_entry
8.17 +.extern _end_entries
8.18 +.globl _start
8.19 +.set noreorder
8.20 +
8.21 _start:
8.22 - add $29, $20, 0x3ffff0 /* sp */
8.23 - j c_main
8.24 + /* Initialise the stack. */
8.25 +
8.26 + la $sp, 0x80080000
8.27 +
8.28 + /* Copy TLB handling instructions. */
8.29 +
8.30 + lui $t0, %hi(_tlb_entry) /* start */
8.31 + ori $t0, $t0, %lo(_tlb_entry)
8.32 + li $t1, 0x80000000
8.33 + lui $t2, %hi(_exc_entry) /* end */
8.34 + ori $t2, $t2, %lo(_exc_entry)
8.35 +_tlb_copy:
8.36 + lw $t3, 0($t0)
8.37 + addiu $t0, $t0, 4
8.38 + sw $t3, 0($t1)
8.39 + bne $t0, $t2, _tlb_copy
8.40 + addiu $t1, $t1, 4 /* executed in delay slot before branch */
8.41 +
8.42 + /* Copy exception handling instructions. */
8.43 +
8.44 + move $t0, $t2 /* start */
8.45 + li $t1, 0x80000180
8.46 + lui $t2, %hi(_irq_entry) /* end */
8.47 + ori $t2, $t2, %lo(_irq_entry)
8.48 +_exc_copy:
8.49 + lw $t3, 0($t0)
8.50 + addiu $t0, $t0, 4
8.51 + sw $t3, 0($t1)
8.52 + bne $t0, $t2, _exc_copy
8.53 + addiu $t1, $t1, 4 /* executed in delay slot before branch */
8.54 +
8.55 + /* Copy IRQ handling instructions. */
8.56
8.57 - .set reorder
8.58 + move $t0, $t2 /* start */
8.59 + li $t1, 0x80000200
8.60 + lui $t2, %hi(_end_entries) /* end */
8.61 + ori $t2, $t2, %lo(_end_entries)
8.62 +_irq_copy:
8.63 + lw $t3, 0($t0)
8.64 + addiu $t0, $t0, 4
8.65 + sw $t3, 0($t1)
8.66 + bne $t0, $t2, _irq_copy
8.67 + addiu $t1, $t1, 4 /* executed in delay slot before branch */
8.68 +
8.69 + /* Initialise interrupts. */
8.70 +
8.71 + mfc0 $t3, $12 /* CP0_STATUS */
8.72 + nop
8.73 + li $t4, 0xffbf00e0 /* BEV = 0 (not bootloader vectors); IM = disable all */
8.74 + and $t3, $t3, $t4 /* ... KSU = 0 (kernel mode); ERL = 0; EXL = 0; IE = 0 */
8.75 + li $t4, 0x0000ff04 /* IM = enable IM7..IM0; ERL = 1 (set by default) */
8.76 + or $t3, $t3, $t4
8.77 + mtc0 $t3, $12
8.78 + nop
8.79 +
8.80 + li $t3, 0x00800000 /* IV = 1 (use 0x80000200 for interrupts) */
8.81 + mtc0 $t3, $13 /* CP0_CAUSE */
8.82 + nop
8.83 +
8.84 + mtc0 $zero, $15 /* CP0_EBASE (should be zero anyway) */
8.85 + nop
8.86 +
8.87 + /* Start the program. */
8.88 +
8.89 + j c_main
8.90 + nop
8.91 +
8.92 +.set reorder
9.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
9.2 +++ b/stage2/irq.c Tue Jun 23 23:08:19 2015 +0200
9.3 @@ -0,0 +1,95 @@
9.4 +/*
9.5 + * Interrupt handling.
9.6 + *
9.7 + * Copyright (C) 2015 Paul Boddie <paul@boddie.org.uk>
9.8 + *
9.9 + * This program is free software: you can redistribute it and/or modify
9.10 + * it under the terms of the GNU General Public License as published by
9.11 + * the Free Software Foundation, either version 3 of the License, or
9.12 + * (at your option) any later version.
9.13 + *
9.14 + * This program is distributed in the hope that it will be useful,
9.15 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
9.16 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9.17 + * GNU General Public License for more details.
9.18 + *
9.19 + * You should have received a copy of the GNU General Public License
9.20 + * along with this program. If not, see <http://www.gnu.org/licenses/>.
9.21 + */
9.22 +
9.23 +#include "board-specific.h"
9.24 +#include "board.h"
9.25 +#include "lcd.h"
9.26 +#include "jzlcd.h"
9.27 +#include "cpu.h"
9.28 +
9.29 +extern vidinfo_t panel_info;
9.30 +static unsigned short pixel_type;
9.31 +static unsigned short x, y;
9.32 +extern unsigned long lastdec;
9.33 +
9.34 +void next_pixel()
9.35 +{
9.36 + x++;
9.37 + if (x >= panel_info.vl_col) {
9.38 + x = 0;
9.39 + y++;
9.40 + if (y >= panel_info.vl_row)
9.41 + y = 0;
9.42 + }
9.43 +}
9.44 +
9.45 +/* Tasks. */
9.46 +
9.47 +void plot_pattern()
9.48 +{
9.49 + while (1) {
9.50 + if (pixel_type)
9.51 + test_pixel(x, y);
9.52 + else
9.53 + clear_pixel(x, y);
9.54 + next_pixel();
9.55 + udelay(100);
9.56 + }
9.57 +}
9.58 +
9.59 +/* Initialisation and handling. */
9.60 +
9.61 +void irq_init()
9.62 +{
9.63 + timer_init_irq();
9.64 + x = 0; y = 0; pixel_type = 1;
9.65 + enable_interrupts();
9.66 +}
9.67 +
9.68 +void irq_handle()
9.69 +{
9.70 + unsigned short i;
9.71 +
9.72 + /* Check interrupt identity. */
9.73 +
9.74 + if (REG_INTC_IPR & (1 << TIMER_CHAN_IRQ)) {
9.75 +
9.76 + /* Update the pixel type. */
9.77 +
9.78 + pixel_type = 1 - pixel_type;
9.79 +
9.80 + /* Clear interrupt status. */
9.81 +
9.82 + __intc_ack_irq(TIMER_CHAN_IRQ);
9.83 + __tcu_clear_full_match_flag(TIMER_CHAN);
9.84 +
9.85 + /* Handle other interrupts, anyway. */
9.86 +
9.87 + } else {
9.88 + for (i = 0; i < 32; i++) {
9.89 + if (REG_INTC_IPR & (1 << i))
9.90 + __intc_ack_irq(i);
9.91 + }
9.92 + }
9.93 +}
9.94 +
9.95 +void start_task()
9.96 +{
9.97 + plot_pattern();
9.98 +}
10.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
10.2 +++ b/stage2/irq.h Tue Jun 23 23:08:19 2015 +0200
10.3 @@ -0,0 +1,9 @@
10.4 +#ifndef __IRQ_H__
10.5 +#define __IRQ_H__
10.6 +
10.7 +/* Initialisation functions. */
10.8 +
10.9 +void irq_init(void);
10.10 +void start_task(void);
10.11 +
10.12 +#endif /* __IRQ_H__ */
11.1 --- a/stage2/lcd.c Tue Jun 23 23:05:00 2015 +0200
11.2 +++ b/stage2/lcd.c Tue Jun 23 23:08:19 2015 +0200
11.3 @@ -32,35 +32,60 @@
11.4 #include "board.h"
11.5
11.6 extern vidinfo_t panel_info;
11.7 +static void *lcd_base;
11.8 +
11.9 +void test_pixel(unsigned short h, unsigned short v)
11.10 +{
11.11 + unsigned short v_max = panel_info.vl_row;
11.12 + unsigned short h_max = panel_info.vl_col;
11.13 + u32 *pix = (u32 *)lcd_base + v * h_max + h;
11.14 +
11.15 + /* NOTE: Code assumes 32 bits/pixel. */
11.16 +
11.17 + *pix = (
11.18 + (((255 * (h_max - h)) / (h_max - 1)) << 16) +
11.19 + ((((255 * h) / (h_max - 1) + (255 * (v_max - v)) / (v_max - 1)) / 2) << 8) +
11.20 + ((255 * v) / (v_max - 1))
11.21 + );
11.22 +}
11.23 +
11.24 +void clear_pixel(unsigned short h, unsigned short v)
11.25 +{
11.26 + unsigned short h_max = panel_info.vl_col;
11.27 + u32 *pix = (u32 *)lcd_base + v * h_max + h;
11.28 +
11.29 + *pix = 0;
11.30 +}
11.31
11.32 static void test_pattern(void *lcd_base)
11.33 {
11.34 unsigned short v_max = panel_info.vl_row;
11.35 unsigned short h_max = panel_info.vl_col;
11.36 unsigned short v, h;
11.37 +
11.38 + for (v = 0; v < v_max; v += 1) {
11.39 + for (h = 0; h < h_max; h += 1) {
11.40 + test_pixel(h, v);
11.41 + }
11.42 + }
11.43 +}
11.44 +
11.45 +void lcd_clear(void *lcd_base)
11.46 +{
11.47 + unsigned short v_max = panel_info.vl_row;
11.48 + unsigned short h_max = panel_info.vl_col;
11.49 + unsigned short v, h;
11.50 u32 *pix = (u32 *)lcd_base;
11.51
11.52 - /* WARNING: Code silently assumes 32 bit/pixel */
11.53 for (v = 0; v < v_max; v += 1) {
11.54 for (h = 0; h < h_max; h += 1) {
11.55 - *pix++ = (
11.56 - (((255 * (h_max - h)) / (h_max - 1)) << 16) +
11.57 - ((((255 * h) / (h_max - 1) + (255 * (v_max - v)) / (v_max - 1)) / 2) << 8) +
11.58 - ((255 * v) / (v_max - 1))
11.59 - );
11.60 + *pix++ = 0;
11.61 }
11.62 }
11.63 }
11.64
11.65 -void lcd_clear(void *lcd_base)
11.66 -{
11.67 - test_pattern(lcd_base);
11.68 -}
11.69 -
11.70 /* LCD initialisation. */
11.71
11.72 -static void *lcd_base;
11.73 -
11.74 void lcd_init(void)
11.75 {
11.76 __lcd_display_pin_init();
12.1 --- a/stage2/lcd.h Tue Jun 23 23:05:00 2015 +0200
12.2 +++ b/stage2/lcd.h Tue Jun 23 23:08:19 2015 +0200
12.3 @@ -5,4 +5,9 @@
12.4
12.5 void lcd_init(void);
12.6
12.7 +/* Output functions. */
12.8 +
12.9 +void test_pixel(unsigned short h, unsigned short v);
12.10 +void clear_pixel(unsigned short h, unsigned short v);
12.11 +
12.12 #endif /* __LCD_H__ */