1.1 --- a/stage2/jzlcd.c Sun Jan 24 21:37:15 2016 +0100
1.2 +++ b/stage2/jzlcd.c Mon Jan 25 00:28:55 2016 +0100
1.3 @@ -103,12 +103,16 @@
1.4 struct jz_fb_info * fbi;
1.5
1.6 fbi = &vid->jz_fb;
1.7 +
1.8 + /* Allocate space for descriptors before the palette entries. */
1.9 +
1.10 descriptors = ((struct jz_fb_dma_descriptor *) fbi->palette) - 3;
1.11 fbi->dmadesc_fblow = (struct jz_fb_dma_descriptor *) &descriptors[0];
1.12 fbi->dmadesc_fbhigh = (struct jz_fb_dma_descriptor *) &descriptors[1];
1.13 fbi->dmadesc_palette = (struct jz_fb_dma_descriptor *) &descriptors[2];
1.14
1.15 - /* populate descriptors */
1.16 + /* Populate descriptors. */
1.17 +
1.18 fbi->dmadesc_fblow->fdadr = fbi->dmadesc_fblow;
1.19 fbi->dmadesc_fblow->fsadr = fbi->screen + lcd_get_size(vid);
1.20 fbi->dmadesc_fblow->fidr = 0;
1.21 @@ -140,12 +144,75 @@
1.22 flush_cache_all();
1.23 }
1.24
1.25 -static int jz_lcd_hw_init(vidinfo_t *vid)
1.26 +static unsigned int jz_lcd_stn_init(unsigned int stnH)
1.27 +{
1.28 + unsigned int val = 0;
1.29 +
1.30 + switch (jzfb.bpp) {
1.31 + case 1:
1.32 + /* val |= LCD_CTRL_PEDN; */
1.33 + case 2:
1.34 + val |= LCD_CTRL_FRC_2;
1.35 + break;
1.36 + case 4:
1.37 + val |= LCD_CTRL_FRC_4;
1.38 + break;
1.39 + case 8:
1.40 + default:
1.41 + val |= LCD_CTRL_FRC_16;
1.42 + break;
1.43 + }
1.44 +
1.45 + switch (jzfb.cfg & STN_DAT_PINMASK) {
1.46 + case STN_DAT_PIN1:
1.47 + /* Do not adjust the hori-param value. */
1.48 + break;
1.49 + case STN_DAT_PIN2:
1.50 + align2(jzfb.hsw);
1.51 + align2(jzfb.elw);
1.52 + align2(jzfb.blw);
1.53 + break;
1.54 + case STN_DAT_PIN4:
1.55 + align4(jzfb.hsw);
1.56 + align4(jzfb.elw);
1.57 + align4(jzfb.blw);
1.58 + break;
1.59 + case STN_DAT_PIN8:
1.60 + align8(jzfb.hsw);
1.61 + align8(jzfb.elw);
1.62 + align8(jzfb.blw);
1.63 + break;
1.64 + }
1.65 +
1.66 + REG_LCD_VSYNC = (0 << 16) | jzfb.vsw;
1.67 + REG_LCD_HSYNC = ((jzfb.blw+jzfb.w) << 16) | (jzfb.blw+jzfb.w+jzfb.hsw);
1.68 +
1.69 + /* Screen setting */
1.70 + REG_LCD_VAT = ((jzfb.blw + jzfb.w + jzfb.hsw + jzfb.elw) << 16) | (stnH + jzfb.vsw + jzfb.bfw + jzfb.efw);
1.71 + REG_LCD_DAH = (jzfb.blw << 16) | (jzfb.blw + jzfb.w);
1.72 + REG_LCD_DAV = (0 << 16) | (stnH);
1.73 +
1.74 + /* AC BIAs signal */
1.75 + REG_LCD_PS = (0 << 16) | (stnH+jzfb.vsw+jzfb.efw+jzfb.bfw);
1.76 +
1.77 + return val;
1.78 +}
1.79 +
1.80 +static void jz_lcd_tft_init()
1.81 +{
1.82 + REG_LCD_VSYNC = (0 << 16) | jzfb.vsw;
1.83 + REG_LCD_HSYNC = (0 << 16) | jzfb.hsw;
1.84 + REG_LCD_DAV =((jzfb.vsw+jzfb.bfw) << 16) | (jzfb.vsw +jzfb.bfw+jzfb.h);
1.85 + REG_LCD_DAH = ((jzfb.hsw + jzfb.blw) << 16) | (jzfb.hsw + jzfb.blw + jzfb.w );
1.86 + REG_LCD_VAT = (((jzfb.blw + jzfb.w + jzfb.elw + jzfb.hsw)) << 16) \
1.87 + | (jzfb.vsw + jzfb.bfw + jzfb.h + jzfb.efw);
1.88 +}
1.89 +
1.90 +static int jz_lcd_hw_init(vidinfo_t *vid)
1.91 {
1.92 struct jz_fb_info *fbi = &vid->jz_fb;
1.93 unsigned int val = 0;
1.94 unsigned int pclk;
1.95 - unsigned int stnH;
1.96 #ifndef CONFIG_CPU_JZ4730
1.97 int pll_div;
1.98 #endif
1.99 @@ -183,103 +250,28 @@
1.100 switch (jzfb.cfg & MODE_MASK) {
1.101 case MODE_STN_MONO_DUAL:
1.102 case MODE_STN_COLOR_DUAL:
1.103 - case MODE_STN_MONO_SINGLE:
1.104 - case MODE_STN_COLOR_SINGLE:
1.105 - switch (jzfb.bpp) {
1.106 - case 1:
1.107 - /* val |= LCD_CTRL_PEDN; */
1.108 - case 2:
1.109 - val |= LCD_CTRL_FRC_2;
1.110 - break;
1.111 - case 4:
1.112 - val |= LCD_CTRL_FRC_4;
1.113 - break;
1.114 - case 8:
1.115 - default:
1.116 - val |= LCD_CTRL_FRC_16;
1.117 - break;
1.118 - }
1.119 + val |= jz_lcd_stn_init(jzfb.h >> 1);
1.120 break;
1.121 - }
1.122
1.123 - val |= LCD_CTRL_BST_16; /* Burst Length is 16WORD=64Byte */
1.124 - val |= LCD_CTRL_OFUP; /* OutFIFO underrun protect */
1.125 -
1.126 - switch (jzfb.cfg & MODE_MASK) {
1.127 - case MODE_STN_MONO_DUAL:
1.128 - case MODE_STN_COLOR_DUAL:
1.129 case MODE_STN_MONO_SINGLE:
1.130 case MODE_STN_COLOR_SINGLE:
1.131 - switch (jzfb.cfg & STN_DAT_PINMASK) {
1.132 - case STN_DAT_PIN1:
1.133 - /* Do not adjust the hori-param value. */
1.134 - break;
1.135 - case STN_DAT_PIN2:
1.136 - align2(jzfb.hsw);
1.137 - align2(jzfb.elw);
1.138 - align2(jzfb.blw);
1.139 - break;
1.140 - case STN_DAT_PIN4:
1.141 - align4(jzfb.hsw);
1.142 - align4(jzfb.elw);
1.143 - align4(jzfb.blw);
1.144 - break;
1.145 - case STN_DAT_PIN8:
1.146 - align8(jzfb.hsw);
1.147 - align8(jzfb.elw);
1.148 - align8(jzfb.blw);
1.149 - break;
1.150 - }
1.151 - break;
1.152 - }
1.153 -
1.154 - REG_LCD_CTRL = val;
1.155 -
1.156 - switch (jzfb.cfg & MODE_MASK) {
1.157 - case MODE_STN_MONO_DUAL:
1.158 - case MODE_STN_COLOR_DUAL:
1.159 - case MODE_STN_MONO_SINGLE:
1.160 - case MODE_STN_COLOR_SINGLE:
1.161 - if (((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL) ||
1.162 - ((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL))
1.163 - stnH = jzfb.h >> 1;
1.164 - else
1.165 - stnH = jzfb.h;
1.166 -
1.167 - REG_LCD_VSYNC = (0 << 16) | jzfb.vsw;
1.168 - REG_LCD_HSYNC = ((jzfb.blw+jzfb.w) << 16) | (jzfb.blw+jzfb.w+jzfb.hsw);
1.169 -
1.170 - /* Screen setting */
1.171 - REG_LCD_VAT = ((jzfb.blw + jzfb.w + jzfb.hsw + jzfb.elw) << 16) | (stnH + jzfb.vsw + jzfb.bfw + jzfb.efw);
1.172 - REG_LCD_DAH = (jzfb.blw << 16) | (jzfb.blw + jzfb.w);
1.173 - REG_LCD_DAV = (0 << 16) | (stnH);
1.174 -
1.175 - /* AC BIAs signal */
1.176 - REG_LCD_PS = (0 << 16) | (stnH+jzfb.vsw+jzfb.efw+jzfb.bfw);
1.177 -
1.178 + val |= jz_lcd_stn_init(jzfb.h);
1.179 break;
1.180
1.181 case MODE_TFT_GEN:
1.182 - case MODE_TFT_SHARP:
1.183 case MODE_TFT_CASIO:
1.184 - case MODE_TFT_SAMSUNG:
1.185 case MODE_8BIT_SERIAL_TFT:
1.186 case MODE_TFT_18BIT:
1.187 - REG_LCD_VSYNC = (0 << 16) | jzfb.vsw;
1.188 - REG_LCD_HSYNC = (0 << 16) | jzfb.hsw;
1.189 - REG_LCD_DAV =((jzfb.vsw+jzfb.bfw) << 16) | (jzfb.vsw +jzfb.bfw+jzfb.h);
1.190 - REG_LCD_DAH = ((jzfb.hsw + jzfb.blw) << 16) | (jzfb.hsw + jzfb.blw + jzfb.w );
1.191 - REG_LCD_VAT = (((jzfb.blw + jzfb.w + jzfb.elw + jzfb.hsw)) << 16) \
1.192 - | (jzfb.vsw + jzfb.bfw + jzfb.h + jzfb.efw);
1.193 + jz_lcd_tft_init();
1.194 break;
1.195 - }
1.196
1.197 - switch (jzfb.cfg & MODE_MASK) {
1.198 case MODE_TFT_SAMSUNG:
1.199 {
1.200 unsigned int total, tp_s, tp_e, ckv_s, ckv_e;
1.201 unsigned int rev_s, rev_e, inv_s, inv_e;
1.202
1.203 + jz_lcd_tft_init();
1.204 +
1.205 pclk = val * (jzfb.w + jzfb.hsw + jzfb.elw + jzfb.blw) *
1.206 (jzfb.h + jzfb.vsw + jzfb.efw + jzfb.bfw); /* Pixclk */
1.207
1.208 @@ -300,10 +292,14 @@
1.209 jzfb.cfg |= STFT_REVHI | STFT_SPLHI;
1.210 break;
1.211 }
1.212 +
1.213 case MODE_TFT_SHARP:
1.214 {
1.215 unsigned int total, cls_s, cls_e, ps_s, ps_e;
1.216 unsigned int spl_s, spl_e, rev_s, rev_e;
1.217 +
1.218 + jz_lcd_tft_init();
1.219 +
1.220 total = jzfb.blw + jzfb.w + jzfb.elw + jzfb.hsw;
1.221 spl_s = 1;
1.222 spl_e = spl_s + 1;
1.223 @@ -320,11 +316,16 @@
1.224 REG_LCD_REV = (rev_s << 16) | rev_e;
1.225 break;
1.226 }
1.227 - case MODE_TFT_CASIO:
1.228 +
1.229 + default:
1.230 break;
1.231 }
1.232
1.233 /* Configure the LCD panel */
1.234 +
1.235 + val |= LCD_CTRL_BST_16; /* Burst Length is 16WORD=64Byte */
1.236 + val |= LCD_CTRL_OFUP; /* OutFIFO underrun protect */
1.237 + REG_LCD_CTRL = val;
1.238 REG_LCD_CFG = jzfb.cfg;
1.239
1.240 /* Timing setting */
1.241 @@ -391,6 +392,8 @@
1.242 __cpm_start_lcd();
1.243 udelay(1000);
1.244
1.245 + /* Configure DMA. */
1.246 +
1.247 REG_LCD_DA0 = (unsigned long) fbi->fdadr0; /* frame descriptor */
1.248
1.249 if (((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL) ||