124:40c8c2cd15f4
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2020-04-16 |
Paul Boddie |
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Added notes on two-bytes-per-cycle ULA accesses and related considerations. |
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ULA.txt
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123:62b4bf8a2511
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2020-04-16 |
Paul Boddie |
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Added benchmark observations and a table of standard bandwidth characteristics. |
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ULA.txt
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122:4f335343eec7
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2020-04-15 |
Paul Boddie |
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Added clarifications about the use of 8MHz cycles with an 8-bit memory channel.
In particular, 16MHz is still required for the pixel clock in MODE 0. |
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Electron.txt ULA.txt
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121:8b00fd59f03a
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2020-04-13 |
Paul Boddie |
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Added notes on 4164 RAM costs referencing historical remarks. |
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Electron.txt ULA.txt
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120:b3383787c26f
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2020-04-12 |
Paul Boddie |
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Added more remarks, particularly regarding direct CPU access to RAM. |
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Electron.txt ULA.txt
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119:2baff40d749c
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2020-04-07 |
Paul Boddie |
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Added remarks on 8-bit wide RAM access and possible 8MHz ULA frequency. |
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Electron.txt ULA.txt
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118:7bef8e6b48a1
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2020-04-07 |
Paul Boddie |
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Added some memory bandwidth and architecture notes. |
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Electron.txt ULA.txt
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117:f1ad140b086b
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2019-11-26 |
Paul Boddie |
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Added a note about keyboard access timings. |
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ULA.txt
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116:69f0c87496c6
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2019-04-09 |
Paul Boddie |
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Added some notes about RAM access and the limitations applying to the CPU. |
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ULA.txt
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115:46bcedba4e27
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2019-02-24 |
Paul Boddie |
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Made clarification about 1MHz RAM access, added 2MHz bandwidth figure.
Fixed service manual link. |
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ULA.txt
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