1.1 --- a/Electron.txt Mon Apr 13 17:05:49 2020 +0200
1.2 +++ b/Electron.txt Wed Apr 15 22:31:08 2020 +0200
1.3 @@ -95,10 +95,11 @@
1.4 1-bit RAM chips in groups of four, perhaps two such groups might have been
1.5 employed, with the resulting memory architecture being simplified, the
1.6 performance requirements for the ULA being reduced (perhaps employing 8MHz
1.7 -cycles instead of 16MHz to coordinate signalling, potentially reducing power
1.8 -consumption and increasing yield and reliability), and the corresponding
1.9 -component cost increase proving to be less than projections made early in the
1.10 -design process, particularly if slower (and smaller) RAM chips became usable.
1.11 +cycles instead of 16MHz to coordinate signalling, although retaining 16MHz
1.12 +cycles for the MODE 0 pixel clock, potentially reducing power consumption and
1.13 +increasing yield and reliability), and the corresponding component cost
1.14 +increase proving to be less than projections made early in the design process,
1.15 +particularly if slower (and smaller) RAM chips became usable.
1.16
1.17 In the document "One of the Most Popular 65,536-Bit (64K) Dynamic RAMs The TMS
1.18 4164", a note is made of 4164 RAM prices dropping from $25 to $5 per unit in