# HG changeset patch
# User Paul Boddie <paul@boddie.org.uk>
# Date 1414100653 -7200
# Node ID ea009faf7e6712a651d1b694a9925a21bd696156
# Parent  789d11d077fcfc2d1389e56c98dd48136c91b806
Added notes about sideways RAM/ROM access, flashing colours, and the ULA socket.

diff -r 789d11d077fc -r ea009faf7e67 ULA.txt
--- a/ULA.txt	Sat Apr 05 00:36:04 2014 +0200
+++ b/ULA.txt	Thu Oct 23 23:44:13 2014 +0200
@@ -275,6 +275,21 @@
 be discharged from providing access to memory, potentially for a range of
 addresses, and for the CPU to communicate with external memory uninterrupted.
 
+Sideways RAM/ROM and Upper Memory Access
+----------------------------------------
+
+Although the ULA controls the CPU clock, effectively slowing or stopping the
+CPU when the ULA needs to access screen memory, it is apparently able to allow
+the CPU to access addresses of &8000 and above - the upper region of memory -
+at 2MHz independently of any access to RAM that the ULA might be performing,
+only blocking the CPU if it attempts to access addresses of &7FFF and below
+during any ULA memory access - the lower region of memory - by stopping or
+stalling its clock.
+
+Thus, the ULA remains aware of the level of the A15 line, only inhibiting the
+CPU clock if the line goes low, when the CPU is attempting to access the lower
+region of memory.
+
 Hardware Scrolling
 ------------------
 
@@ -471,6 +486,10 @@
 combined with other palette data in dedicated memory locations corresponding
 to the palette registers.
 
+Interestingly, although flashing colours on the BBC Micro are controlled by
+toggling bit 0 of the &FE20 control register location for the Video ULA, the
+actual colour inversion is done in hardware.
+
 Enhancement: Palette Definition Lists
 -------------------------------------
 
@@ -880,6 +899,11 @@
 
   ÷13 IN (~1200 baud clock input)
 
+ULA Socket
+----------
+
+The socket used for the ULA is a 3M/TexTool 268-5400 68-pin socket.
+
 References
 ----------