ULA

Shortlog

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2020-04-13 Paul Boddie files Added notes on 4164 RAM costs referencing historical remarks.
2020-04-12 Paul Boddie files Added more remarks, particularly regarding direct CPU access to RAM.
2020-04-07 Paul Boddie files Added remarks on 8-bit wide RAM access and possible 8MHz ULA frequency.
2020-04-07 Paul Boddie files Added some memory bandwidth and architecture notes.
2019-11-26 Paul Boddie files Added a note about keyboard access timings.
2019-04-09 Paul Boddie files Added some notes about RAM access and the limitations applying to the CPU.
2019-02-24 Paul Boddie files Made clarification about 1MHz RAM access, added 2MHz bandwidth figure.
2019-02-22 Paul Boddie files Added some notes about video expansions and ULA simplification.
2017-04-12 Paul Boddie files Noted that the ULA could re-read the character values and just increment an
2017-04-11 Paul Boddie files Added notes about text-only modes, plus character and attribute value retrieval
2017-03-31 Paul Boddie files Added CPU clock input and output notes.
2016-11-14 Paul Boddie files Added a note about the CPU clock phases.
2016-09-04 Paul Boddie files Added explicit reason for 2MHz RAM access not being feasible.
2016-06-23 Paul Boddie files Introduced explicit next_frame calls after updating the screen start address.
2016-06-23 Paul Boddie files Attempted to introduce hardware description language limitations, restructuring
2016-06-22 Paul Boddie files Introduced a separate state-updating method and reordered methods.
2016-06-22 Paul Boddie files Moved pixel generation to after the state update in the negative edge handler.
2016-06-22 Paul Boddie files Moved video signalling into the negative edge handler in order to consolidate
2016-06-21 Paul Boddie files Added notes about RAM access limitations preventing 2MHz RAM access by the CPU.
2016-06-21 Paul Boddie files Removed the width instance attribute.
2016-06-21 Paul Boddie files Moved address preparation onto negative edges and data acquisition onto positive
2016-06-21 Paul Boddie files Shifted the timing states so that cycle 0 is aligned with the positive edge of
2016-06-21 Paul Boddie files Refined and expanded the RAM access timings, moving data transfers to the
2016-06-20 Paul Boddie files Renamed address to pixel_address.
2016-06-20 Paul Boddie files Added initial CPU abstraction support together with read/write selection and
2016-06-20 Paul Boddie files Made the next_vertical control-flow more hierarchical.
2016-06-20 Paul Boddie files Introduced positive and negative signal transition update methods in order to
2016-06-20 Paul Boddie files Tidied, introducing a write_pixels function, removing PIXEL_POSITIONS.
2016-06-20 Paul Boddie files Fixed and tidied up pixel production, employing the general state counter for
2016-06-20 Paul Boddie files Fixed the timing of pixel data decoding. Made the pixel data a plain integer.
2016-06-20 Paul Boddie files Initialise the palette as red/green/blue triples.
2016-06-19 Paul Boddie files Replaced the pixel buffer with translated byte data and a function converting
2016-06-19 Paul Boddie files Changed the processing of pixel data and added remarks about pixel layout.
2016-06-19 Paul Boddie files Replaced row spacing variables with row height and row offset variables.
2016-06-19 Paul Boddie files Renamed reset methods and tidied slightly.
2016-06-19 Paul Boddie files Separated address updating from the NMI-dependent RAM access condition.
2016-06-19 Paul Boddie files Use the horizontal position counter by itself to manage the pixel buffer.
2016-06-18 Paul Boddie files Refined video timings according to measurements and a review of the documents.
2016-06-17 Paul Boddie files Introduced a pixel position counter, eliminating the horizontal position counter
2016-06-07 Paul Boddie files Separated out the screen layout section and described a column-oriented layout.
2016-06-07 Paul Boddie files Updated Amstrad CPC-related notes concerning extra colour information.
2015-10-12 Paul Boddie files Added a note about redirecting zero page accesses as well as stack accesses.
2015-09-30 Paul Boddie files Added a textual MODE 1 enhancement plus remarks about display interrupts.
2015-09-19 Paul Boddie files Added 625-line, 312/313 scanline notes.
2015-09-07 Paul Boddie files Added a note about the 2MHz RAM access enhancement.
2015-09-06 Paul Boddie files Added RAM access corrections related to CPU activity plus bandwidth figures.
2015-08-25 Paul Boddie files Added multiple CPU stack "MMU" enhancement.
2015-03-06 Paul Boddie files Added region blanking and display suspend notes.
2015-03-06 Paul Boddie files Added ByteDelight.com 4164 chips source.
2014-10-23 Paul Boddie files Added notes about sideways RAM/ROM access, flashing colours, and the ULA socket.
2014-04-05 Paul Boddie files Added copyright and licensing information.
2014-02-18 Paul Boddie files Added Amstrad CPC-related note.
2014-02-16 Paul Boddie files Added notes about cartridges, Econet, and region filling.
2014-02-01 Paul Boddie files Merged general changes. shedskin
2014-02-01 Paul Boddie files Added an explicit branch to track Shedskin-specific changes. shedskin
2014-02-01 Paul Boddie files Introduced a shift register abstraction for the ULA's internal state.
2013-11-17 Paul Boddie files Added Unicorn Electronics references for RAM and CPU chips.
2013-07-05 Paul Boddie files Added more RAM timing details and compared different ICs.
2013-05-26 Paul Boddie files Added a note about a possible memory filling capability.
2013-05-18 Paul Boddie files Added notes about a display suspend capability.
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