17:4980cefab1ae
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2017-05-16 |
Paul Boddie |
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Introduced a screen start address register. |
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vga.S
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16:81f546b285e4
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2017-05-16 |
Paul Boddie |
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Fill the display by using a 30MHz clock and adjusted timings. |
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vga.S
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15:20ec7f1e54f8
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2017-05-16 |
Paul Boddie |
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Switched to using PORTB instead of PMDIN for pixel data output.
Added a second DMA channel to reset the output level after each line. |
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README.txt pic32.h vga.S
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14:5d521fefe5a6
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2017-05-15 |
Paul Boddie |
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Update the cache status in the config register. |
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mips.h vga.S
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13:df379ca22bec
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2017-05-15 |
Paul Boddie |
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Added initial documentation. |
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README.txt
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12:9241bbce066f
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2017-05-15 |
Paul Boddie |
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Fixed bitfield information in comment. |
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vga.S
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11:46c6e8d5307e
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2017-05-15 |
Paul Boddie |
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Tidied up the comments somewhat. |
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vga.S
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10:4a66779421fc
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2017-05-14 |
Paul Boddie |
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Simplified the horizontal line details; introduced bus arbitration mode 2 usage. |
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vga.S
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9:e6fa4e9b4e4f
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2017-05-14 |
Paul Boddie |
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Introduced interrupt and exception initialisation fixes plus a revised state
machine for signal generation and use of two output compare units for the sync
pulses. This does generate a signal but refinement is needed.
Moved framebuffer initialisation to a point where it does not cause an exception
for some undiagnosed reason. |
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mips.h pic32.h vga.S vga.ld
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8:c2f73f8a609c
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2017-05-11 |
Paul Boddie |
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Update the DMA source address without disabling the channel. |
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vga.S
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